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Giorgia Meloni is Italy’s great political survivor. Could one man be about to bring her down?
With elections looming in 2027, Roberto Vannacci’s new far-right movement could fatally outflank the prime minister, says Riccardo Alcaro, head of research at Istituto Affari Internazionali
Six Flags Sinks 10%, United Parks & Resorts Drops 5%: Is the Goliath Accident Still Weighing on Theme Park Stocks?
A fatal roller coaster accident cast a shadow over one theme park operator, but now a second company with no connection to the ride is getting pulled down alongside it, raising questions about how far the damage spreads through the sector.
Blakeman uses fatal subway shooting as campaign cudgel
Hochul’s team hit back, pointing to state taxpayer dollars she’s put towards NYPD overtime.
Pennsylvania issues alert on congenital measles—something US hasn't seen for decades
Congenital measles can be fatal, and survivors require monitoring for years.
Kansas girls flag football championship halted following fatal crash
Depositphotos Kansas championship games suspended after fatal incident at soccer complex Kansas’ inaugural girls high school flag football championship was interrupted on October 17 after a fatal incident at Stryker Sports Complex in Wichita left 2 people dead and 10 others injured. The incident occurred on a nearby youth soccer field, prompting the Kansas State…
High-end sports car spontaneously ignites in police storage after crash that killed OC influencer
The wreckage of a 2019 McLaren involved in the fatal crash that killed two people in Orange County spontaneously caught fire while in storage.
Cher Admits She Loves to Ski Despite Ex-Husband Sonny Bono’s Fatal Accident on the Slopes
1 dead, 1 charged with murder after argument at Garland business
Police say an argument inside a business ended with a fatal shooting in the parking lot. A 31-year-old suspect is charged with murder.
Downtown Portland businesses weigh safety and signs of progress after deadly shooting
Downtown Portland business owners react after police fatally shot a man on SW Broadway. Merchants describe chaos, shifting street behavior, and cautious optimism as crime data shows assaults up, homicides down.
Brain-infecting fungus that can kill 7 in 10 patients is on the rise across America
Cladophialophora bantiana, a neurotropic black mold with a 60%-70% fatality rate, surged nearly fourfold in U.S. detections between 2023 and 2025.
The Fatal Flaw of 911
A new book argues that as long as 911 defaults to police, people in mental health crises will be at risk for violent confrontations.
Four fatal flaws that doomed the Dodgers’ bid for a historic three-peat
Winter has come early in Los Angeles this year.
Pa. health officials continue to investigate Franklin County measles-related death
A measles-related death reported by the Franklin County coroner Monday has still not been recorded in Pennsylvania data as state health officials say they continue to investigate the fatality. The Franklin County coroner’s office announced that a 39-year-old woman with “several underlying conditions” died Saturday after a “past diagnosis of
Suspect in fatal Mason business shooting not competent for trial
He is accused of shooting and killing 29-year-old Vincent "Vinny" Stoetzel.
Justice Department cuts off evidence sharing with Minnesota investigators probing fatal ICE shootings
Federal investigators in Minnesota abruptly stopped sharing evidence last month with state authorities investigating the fatal ICE shootings of Renee Good and Alex Pretti.
Paris Paloma shares spellbinding set at The Sylvee
Paris Paloma performed at The Sylvee as a part of “The Fatal Flaw” tour, singing to themes of feminism, toxic masculinity and shared female resilience
First Friday on pause after deadly Arts District shooting; businesses support safety review
Organizers say the future of the longtime event is being reevaluated following a fatal shooting, while business owners call for stronger security measures before its return.
Six Flags Stock After Fatal Roller Coaster Accident Has The Bull Case Changed?
Six Flags Entertainment reported that a man died and several guests were injured after falling from the Goliath roller coaster at Six Flags Over Georgia on October 12, 2026, and stated that the park is cooperating fully with local authorities. The incident adds fresh scrutiny to Six Flags Entertainment's ride safety practices and could affect operating costs, legal exposure, and capital priorities related to park maintenance and attraction upgrades. This article now examines how Six Flags...
'Football 301' diagnoses fatal flaws of 6 NFL contenders: What could derail Bills, Chiefs, Seahawks and more?
Six Flags Entertainment Investigation Notice: SueWallSt Notifies Investors of Pending Investigation Into Six Flags Entertainment (FUN)
/PRNewswire/ -- Six Flags Entertainment (NYSE: FUN) fell $1.02 in overnight trading to open at $10.90, a decline of about 8.56%, following reports of a fatal...
Six Flags Entertainment plunges 14% after fatal roller coaster incident
Six Flags (FUN) stock plunges 14% to a 52-week low after a fatal coaster incident and ride closures; see key metrics, risks, and what’s next—read now.
Man, 20, allegedly confesses to stabbing coworker to death at San Rafael business
San Rafael police arrested a 20-year-old man who allegedly confessed to fatally stabbing a coworker over an ongoing dispute.
A list of US roller coaster fatalities dating back to 2003
A man who fell to his death from a roller coaster at an Atlanta-area amusement park was not the first to die on such a ride in recent years. Authorities
A list of US roller coaster fatalities dating back to 2003
A man who fell to his death from a roller coaster at an Atlanta-area amusement park was not the first to die on such a ride in recent years. Authorities have not released information about how...
Australia: NSW Health warns against handling bats due to lyssavirus
NSW Health is advising the public not to handle, or otherwise handle bats, following a recent increase in people being bitten or scratched across the state. In the two weeks from 28 September to 10 October, 43 people were assessed by NSW Health after being bitten or scratched by bats. This includes in coastal areas in Hunter New England, the Mid North Coast, Northern NSW, and the Central Coast. This is a significant increase when compared with 10 reported cases of bat bites or scratches for the same two-week period in 2025. Keira Glasgow, Director in Health Protection at NSW Health, said, “We want people to assume that any bat could carry Australian bat lyssavirus, which is a close relative to the rabies virus and very dangerous to humans.” “If you see a bat that is injured or in distress, call your local wildlife rescue service and do not touch it. Only trained, protected and vaccinated wildlife handlers should interact with bats. “It is incredibly rare for Australian bat lyssavirus to transmit to humans, but once symptoms of lyssavirus start in people who are scratched or bitten by an infected bat, sadly there is no effective treatment. “If you are bitten or scratched by a bat, urgent medical assessment is crucial.” Rabies virus and Australian bat lyssavirus (ABLV) belong to a group of viruses called lyssaviruses. These viruses transmit via a bite from an infected ("rabid") animal. They all cause a similar illness known as rabies, which affects the central nervous system and is usually fatal. Rabies and ABLV infection cause similar symptoms. The early symptoms are flu-like, including headache, fever and fatigue. The illness progresses rapidly to paralysis, delirium, convulsions and death, usually within a week or two. Rabies cases and the three known human cases of ABLV infection have shown a wide variability in the time it takes for symptoms to appear following exposure to an infected animal (from several days to several years). The best way to protect yourself from infection is to not touch bats. If you see a bat in distress, injured or trapped on the ground, do not try to rescue it. Instead, contact trained experts. Outbreak News Today is a reader-supported publication. To receive new posts and support my work, consider becoming a free or paid subscriber. Subscribe
Six Flags Entertainment (FUN) Moved, So What Is Drawing Attention Now?
A fatal accident on the Goliath roller coaster at Six Flags Entertainment (FUN) Over Georgia has become the central focus for investors watching the stock after a sharp after hours selloff. The latest move leaves Six Flags Entertainment trading at US$11.92, with a 1-day share price gain of 4.47%. This partly offsets a 30-day share price decline of 9.15% and a 90-day share price fall of 36.63% as investors reassess operational and legal risk after the accident. The 1-year total shareholder...
Mental health concerns emerge after Tamarac man accused of fatally stabbing mother
Neighbors say concerns about the suspect’s behavior were well known.
Man fatally beaten outside adult entertainment store in Chelsea, suspect arrested, NYPD says
A suspect is in custody after a man was allegedly beaten to death outside an adult entertainment store in a late-night attack in Manhattan, the NYPD said.
Fatal Motorcycle Collision Followed by Separate Vehicle Crash Into Local Business
Emergency responders were dispatched to two serious motor vehicle crashes Sunday afternoon, October 11, including a fatal motorcycle collision and a subsequent crash involving a vehicle striking a…
Fatal Motorcycle Collision Followed by Separate Vehicle Crash Into Local Business
Emergency responders were dispatched to two serious motor vehicle crashes Sunday afternoon, October 11, including a fatal motorcycle collision and a subsequent crash involving a vehicle striking a…
Ebola spreads in eastern DRC as Kenya confirms imported case
New cases in eastern DRC and a fatal imported infection in Kenya highlight the challenges of containing Ebola.
Deadly 2026 heat season shatters state records for heat-related emergency calls, fatalities
The annual Maryland heat season ended with record-breaking heat-related illnesses and deaths: The 61 fatalities shattered the 2012 record of 42 deaths, and 1,657 emergency calls topped last year's 1,634, the previous record. Health experts point to climate change.
Fatal Fury: City of the Wolves DLC character Reina from Tekken announced
SNK has announced Fatal Fury: City of the Wolves downloadable content characters Reina from the Tekken series. She will launch in December.
Tekken 8’s Reina Teased as the Next Guest Character for Fatal Fury: City of the Wolves
Reina, who made her debut in Tekken 8, is coming to Fatal Fury: City of the Wolves. The announcement comes from a short teaser trailer from SNK Official.
Fatal Fury: City of the Wolves DLC characters Manjiro Sano and Ken Ryuguji trailers, screenshots
SNK has released a new set of trailers and screenshots for Fatal Fury: City of the Wolves downloadable content characters Manjiro “Mikey” Sano and Ken “Draken” Ryuguji from …
Joe Manganiello opens up about near-fatal autoimmune disease battle
Joe Manganiello opened up about his health struggles, including a harrowing battle with autoimmune disease, in a new interview with People magazine.
Joe Manganiello claims ex Sofía Vergara ridiculed him during his near-fatal health battle
Amazon crash attorneys say pilot pairing may have been key flaw behind fatal incident
The attorneys’ claims followed preliminary NTSB findings that the pilots faced excessive speed and failed to deploy key braking systems.
Brazil: Lessons from a Disaster
By Antonio Martins (Outras Palavras) Defeats become deeper and more prolonged when we misunderstand what caused them, avoid correcting course, and embrace “solutions” that only compound our mistakes. Lula’s government and the Brazilian left suffered a disaster in Sunday’s election. Contrary to every poll, the president finished the first round 2.2 million votes behind Flávio Bolsonaro—and, more significantly, 3.4 million votes below his total four years ago, when the machinery of the state was working against him and in favor of his opponent. His vote share declined in 98 percent of Brazil’s municipalities. The PL, the main party of the far right, elected 121 deputies and 28 senators, becoming the largest caucus in both houses of Congress. The parties aligned with the Centrão—Brazil’s bloc of transactional center-right parties—were somewhat diminished, but will still hold roughly 250 seats in the Chamber of Deputies and 35 in the Senate. That will make it easier to assemble the majorities needed to amend the Constitution or impeach Supreme Federal Court justices. If elected, Flávio Bolsonaro could appoint four members of the Court, substantially altering its internal balance of power. What produced these results? How can the far right be prevented from consolidating them into a prolonged political hegemony? And what is the essential change of direction the left now needs? Explaining the Disaster Across the commercial media and the exuberant chaos of digital platforms, interpretations are multiplying. Some focus on specific episodes: Lula’s absence from the Globo debate, his very close relationship with Alexandre de Moraes, or his emphasis on issues supposedly remote from most people’s everyday concerns, such as rare earth minerals. Among the more systemic interpretations, three seem especially questionable. One argues that the principal defeat was not the left’s, since its congressional representation declined only slightly. The decisive movement captured at the ballot box, according to this view, was a shift within the right itself—from the more moderate and transactional forces of the Centrão toward the more ideological and radicalized forces of the PL and Novo. A second interpretation holds that the nature of electoral and political processes has changed. The material interests and aspirations of society, it argues, no longer play the central role they once did; they have given way to forms of subjective self-identification that the left has yet to understand. And a third concludes that, because of these two developments, we should expect a political winter: a prolonged period in which the far right and the broader right dominate Brazilian political life. There are important elements in all three interpretations. The problem lies in what they deny or leave out: Lula’s third government was a small-bore government. It offered the majorities that elected it neither a clearly better life nor reasons to believe again in politics and its power to transform society. These failures flowed from two fatal accommodations, which I will examine below. As a result, the government suffered a slow but steady erosion of support. And, as has happened in so many Western countries, it gave the far right the opportunity to present itself as anti-system and to benefit from popular frustration and distress. The interpretation that emphasizes the migration of votes from the center-right and traditional right toward the far right has been advanced, among others, by the courageous journalist Leonardo Sakamoto. In his UOL column on Monday, October 5, he highlights the miserable behavior of the traditional conservative parties. Over the past four years, they repeatedly joined forces with the “neo”-fascists, helping to “normalize” them—a criticism that could equally be directed at almost the entire corporate media. Believing they could use the far right as a stepping stone, they instead ended up partly devoured by it. This was especially true in the Senate, where the PL’s gain of 13 senators and Novo’s gain of two came at the expense of the PSD, which lost nine; the MDB, which lost two; the PSDB, which lost two; and the PP, which lost one. Sakamoto’s observation is accurate and necessary, but it leaves uncomfortable questions unanswered. Why did the erosion of the Centrão benefit the far right rather than, for example, producing growth for the left—as has happened so many times before, both in Brazil and elsewhere? The answer is not difficult. Throughout its four years in office, Lula’s third government was almost invariably associated with the Centrão. Here lies its first accommodation: accepting the limits imposed by conservative institutions; avoiding, as much as possible, any attempt to strain those limits through popular pressure; and believing only in the modest changes that could be squeezed through openings in Congress. The failure of the campaign to end the six-day workweek is emblematic. Lula could have electrified the presidential race by pairing it with a popular campaign for passage of the measure. Instead, he chose to place his hopes in the hands of Senate president Rodrigo Alcolumbre. He generated no mass mobilization, did not force his opponents onto an uncomfortable defensive, and won no victory. In September 2025, the government squandered the greatest of its many opportunities to shake up conservative power in Congress. Popular opposition to the so-called Shielding Amendment—which, if approved, would have restricted criminal proceedings against members of Congress—brought crowds into the streets, mobilized primarily by artists and social movements. This opened the possibility for a broader political education: a campaign that could begin exposing the limits and dysfunctions of Brazil’s political system while putting Bolsonaro’s movement on the defensive for its predictable support of political privilege. The amendment was defeated. But the executive branch then backed away from the fight. It remained associated with an institutional world widely seen as corrupt, elitist, and indifferent to ordinary people’s struggles. In doing so, it forfeited its credibility as a vehicle for the protest vote. On Sunday, it reaped the bitter fruits. Are We Doomed? Taking a different approach from Sakamoto, the philosopher Moysés Pinto Neto and other writers have drawn attention, in their first analyses of October 4, to the fragmentation of the public sphere produced by Big Tech platforms. Through their algorithms, these platforms present each person with a different view of social reality. As a consequence, it becomes much harder to identify common material problems and demands—for example, the fight for labor rights or for a properly funded public health system. Voters no longer embrace such demands, these authors argue, because they no longer see themselves as part of a collective. Instead, they tend to value the identities assigned to them by neoliberal subjectivity—the role of the entrepreneur, for example. On this interpretation, the left’s possible error lies in clinging to outdated illusions. Moysés’s warning is highly relevant and resonates with arguments such as Naomi Klein and Astra Taylor’s “Apocalyptic Fascism and the Billionaires’ Bet.” Unlike a century ago, the far right no longer promises a radiant future. It concentrates instead on resentment—especially that of young men. “They belong to a generation that fears it may never own a home, but compensates with the pleasure it gets from constantly provoking progressives online. Convinced their future has been stolen, they share memes romanticizing historical authoritarian regimes,” the authors write. But Moysés seems to confuse this danger with inevitability. He fails to see that the left’s answer cannot be adaptation. On the contrary, it must strengthen the possibility of politics as collective action. Nor does he recognize that precisely such a reversal is already becoming possible in some of the most promising mobilizations of the twenty-first century: the election, at the end of 2025, of the young Muslim Zohran Mamdani as mayor of New York, on a platform centered on the intensely material fight for an affordable city; the Left Party’s victory in Berlin two weeks ago, built around the demand to expropriate private real-estate corporations; and the very recent wave of demonstrations in Spain—including an occupation of Madrid’s Puerta del Sol—in which tens of thousands of young people mobilized by the Tenants’ Union have demanded limits on rents. By putting itself in the straitjacket of the “fiscal framework” in the first months of 2022, Lula’s third government adopted the second fatal accommodation of its term. Faced with conservative institutions and a country devastated by four years of Bolsonaro, increased public investment was the government’s remaining weapon for offering a more dignified life to the majority and forging an anti-conservative pact with them. The same state that disburses 1 trillion reais a year to enrich a small class of rentiers could instead spend money to extend the Family Health Strategy to every Brazilian, at a cost of 30 billion reais; provide full-day public schooling and childcare to all adolescents and children—and, especially, relief to their mothers; achieve universal sanitation while cleaning up polluted urban rivers; multiply metro systems; begin transforming the urban peripheries; and undertake many other urgently needed projects. In April 2023, an article in Outras Palavras warned that the fiscal framework could “shrink the Lula government and preserve the forces that condemn the country to inequality and regression.” A year later, another article showed that restraints on public spending were strangling policies vital to ordinary people and undermining the president’s popularity. In November 2024 came a reality check, in the form of the government’s humiliating defeat in the municipal elections. Even then, the fiscal lock was neither removed nor loosened. On the contrary: throughout the government’s four years, fiscal restraint remained central to its political narrative. The administration proudly proclaimed that it had “put the state’s accounts in order,” without grasping either how misleading that phrase was—given the payment of 1 trillion reais in interest—or how badly the message was hurting it politically. Lula finally woke up in September 2026. The increase in Bolsa Família benefits, after four years of being frozen; the announcement that anti-obesity drugs would be offered through Brazil’s public health system; and the ban on online betting showed that the state has the power to act decisively on behalf of the majority when those in government are willing to confront obstacles. The huge marches that closed the campaign in Fortaleza, Salvador, Rio de Janeiro, and São Paulo on the eve of October 4 showed how such initiatives can mobilize activists and the broader public. But it was too late—and too little to change the outcome of the first round. History has not ended The possibility of a turnaround in the three weeks leading up to November 25 cannot be ruled out. It will not be simple or easy. Lula must not only make up a deficit of 2.2 million votes; he must also offset the movement of voters who backed other right-wing candidates in the first round, most of whom are likely to move toward Flávio Bolsonaro. Pulling that off will require a broad, grassroots effort to win over voters, potentially reinforced by new initiatives from Lula. The coming hours and days will be decisive. If Bolsonaro’s movement also wins the presidency, the result will create a high-risk situation for Brazilian sovereignty and democracy. The enormous challenges posed by such an outcome would require the left to reexamine, in depth and with a genuine willingness to engage in self-criticism, its political projects—or its lack of them—and its practices. But would that mean we are condemned to the long winter of far-right hegemony that some analyses are beginning to forecast? It is far too early to say, suggests a recent text by Álvaro García Linera, the thinker who served as vice president of Bolivia under Evo Morales. His central hypothesis is that this political current will prove short-lived. At a moment when the entire world is once again talking about sovereignty and protecting national economies, the far right offers a stale, recolonizing neoliberalism. Its submission to the United States is as blatant and pathetic as Flávio and Eduardo Bolsonaro’s overtures to Donald Trump. Its project amounts to something like every man for himself: greater inequality, capitalism without limits, devastation, and supremacism. Will it work? In the United States, just two years into his second term, Trump himself is reaching record levels of unpopularity and may be on the verge of losing Republican control of both the House and Senate in November. Every new beginning is difficult. Whatever the outcome of the second round, the defeats of October 4 show how profoundly the Brazilian left will have to rethink and rebuild. But just as it would be foolish to underestimate the seriousness of its mistakes, it would be equally foolish to conclude that rebuilding a political project is no longer possible. History has not ended. The times are moving faster than ever. Originally published in Portuguese by Outras Palavras. English translation by Eric Blanc; I’ve added the subtitles. More We can’t stop the far right at home or abroad without a revitalized labor movement, which is yet another reason why you should become a sustaining supporter of the Emergency Workplace Organizing Committee (EWOC) — one of US labor’s pivotal bright spots. Relatedly, Jacobin published a short piece of mine reflecting on a decade of Bernie Sanders inspiring a whole new generation of young worker organizers.
Modern forensic science uncovers human sacrifice in ancient Egypt
Reinvestigation of mass burial sites around royal tombs finds evidence of fatal blunt force trauma on skulls
Family seeks answers after business owner fatally shot in South Philadelphia
It has been over two months since a man was gunned down in South Philadelphia.
Southport fire chief files lawsuit against Novant Health after mother’s fatal fall
Southport’s fire chief has filed a wrongful-death lawsuit against Novant Health and an attending doctor, alleging hospital staff ignored warnings that his 67-year-old mother was at high risk of falling before a fatal bathroom fall triggered an untreated brain bleed.
Southport fire chief files lawsuit against Novant Health after mother’s fatal fall
Southport Fire Chief Charles Drew has filed a wrongful-death suit against Novant Health, alleging lapses in care led to his mother’s fatal fall and brain bleed.
Coroner warns of risk of future deaths at mental health unit where patient was killed
Hugo Flint-Cahan, 34, was fatally attacked by Rolando Torres-Pena, 22, at a mental health trust in east London.
Man fatally shoots 2 co-workers at a Virginia business before killing himself, police say
MANASSAS, Va. — A man shot three co-workers during an altercation Wednesday at a northern Virginia business, killing two of them, before he took his own life during a police standoff along an interstate highway, police said. Marvin Grant, 37, of Charlotte, North Carolina, opened fire at an equipment rental
Man fatally shoots 2 co-workers at a Virginia business before killing himself, police say
A shooting at a northern Virginia business has left two workers dead. Police in Manassas say the suspect later took his own life during a standoff on Interstate 81. Manassas Police Chief Doug Keen says 37-year-old Marvin Grant opened fire at an equipment rental business Wednesday morning. Two wor...
Michele Singer Reiner's sister opens up about family's 'unimaginable' loss
Michele Singer Reiner‘s sister is opening up about the photographer's death nine months after she and husband Rob Reiner were fatally stabbed in their Los Angeles home in December.
Saint Louis County reports public health alert due to spike in non-fatal overdoses
Saint Louis County reports public health alert due to spike in Non-fatal Overdoses
NY Times exec allegedly slain by in-laws in California was reportedly mired in bitter divorce dispute
Police in Northern California are investigating the circumstances around the killing of a 40-year-old New York Times executive who was fatally shot by his in-laws in a parking lot over
Man identified in fatal shooting at Hyde Park business
The man who was fatally shot inside a business in Hyde Park on Saturday has been identified.
Smart Headlights Finally Trickle Down to Cars in the U.S.
Federal data shows that half of all traffic fatalities happen after dark, but only one-quarter of driving happens at night. So any help is welcome.
Verbal altercation ends in fatal stabbing outside Downtown Las Vegas business
A man has died after being stabbed following a verbal altercation in front of a business in Downtown Las Vegas.On Saturday at around 2:51 a.m., Las Vegas Metrop
Main sponsor? Firm 🔞 offers millions to Corinthians and Flamengo
Amid the controversy over the end of betting companies, the +18 platform Fatal Model offered MILLIONS in an attempt to become the main sponsor of Corinthians and Flamengo.The adult content company off...
Quansah: England Were Punished For Their Mistakes Against Spain
Jarell Quansah warns that squandered chances and missed penalties proved fatal against the world champions, emphasizing the unforgiving margins England must bridge to conquer elite international opposition.
Investigation underway after man fatally shot inside business in Hyde Park - Boston News, Weather, Sports
BOSTON (WHDH) - Boston police are investigating after a man was fatally shot inside a business in Hyde Park on Saturday afternoon.Officers responding to aRead More
Man shot and killed inside Hyde Park business, police say
Police are investigating a fatal shooting inside a Boston business on Saturday afternoon.
Intel Panther Lake Teardown, 18A, BSPD, GAAFET, SemiAnalysis STEEL
Panther Lake debuts the first commercial implementation of backside power delivery (BSPDN), introduces Intel’s first iteration of gate-all-around (GAA) transistors, and showcases their advanced packaging capabilities with its Foveros-S assembly. With Panther Lake, Intel’s manufacturing arc has shifted from nebulous roadmaps to shipped silicon, a significant milestone on their long road back to competitive semiconductor manufacturing. To evaluate the extent of Intel’s comeback, we tore down Panther Lake. The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. Our teardown traces 18A from its four-sheet RibbonFETs (Intel’s marketing name for GAAFETs) and gate stacks through contacts, frontside and backside wiring, and the bonded carrier. We explain how these material and integration choices improve gate control and reduce resistance, while adding capacitance, thermal resistance, and process complexity. Our measurements put Panther Lake’s 18A compute logic and TSMC N3E GPU logic at similar logic density. However, 18A does not lead TSMC N3P, N2 or Samsung SF2 in peak density. Panther Lake’s CPU cores are incremental updates, and the high-end GPU still uses TSMC N3E. Panther Lake assembles one compute tile, one GPU tile, and one I/O tile atop a passive base tile using Intel’s Foveros-S advanced packaging. Both compute tile variants use Intel 18A. The Xe3 GPU options are a 4-core GT1 tile on Intel 3 and a larger 12-core GT2 tile on TSMC N3E. Both I/O tile variants use TSMC N6. [1], [2] Our analysis centers on the PTL-U compute tile, both the 4-core and 12-core GPU tiles, as well as the 12-lane I/O tile. In conventional chips, power and signal are routed through the same frontside metal stack towards the device frontend. Power rails consume scarce routing resources near the transistors, while tall via stacks carry VDD and VSS from the coarse upper wires to local rails. Backside power delivery (BSPD) moves the main power network behind the transistor layer, to the backside, separating it from frontside signal routing. We covered BSPD and its impacts in 2024. [3], [4], [5] Intel’s BSPD implementation, branded as “PowerVia”, routes power through dedicated backside metals to nano-TSVs, which connect those rails to local source/drain (S/D) contacts. Implementing that separation requires Intel to build the interconnect stacks from both sides of the wafer. The frontside comprises the M0-M14 signal stack, while the backside comprises the BM0-BM5 power stack. M0 and BM0 are closest to the transistors. The nano-TSVs connect the two sides, but Intel patterns and etches each via from the front after forming the contacts. A narrow via runs from the side of the contact deep into the silicon substrate. Intel then completes the frontside signal metal stack, bonds the wafer to a carrier, flips it and removes the original substrate until the buried via tips are exposed. The backside metal stack is then deposited directly on the revealed vias. The nano-TSV and backside-via profiles taper in opposite directions because Intel forms them from opposite sides of the wafer. The transistor structures form the FEOL. Local contacts and nano-TSVs connect them to the wiring. M0 begins the frontside interconnect stack. The silicon carrier remains attached above the frontside interconnects. It supports the device wafer during substrate removal and backside processing and remains part of the finished chip’s thermal path. PowerVia removes the main power distribution from the congested frontside metals, routing supply through shorter and wider backside wires. Its lateral landing still occupies area in the standard cell, so it recovers less cell area than a direct backside contact. [3] Nano-TSVs beside the logic devices carry VDD or VSS from the backside power network, while signal connections continue upward through the frontside metals. Backside Interconnects Samsung SF2 data is included for comparison to Panther Lake’s within this article. SF2 is the incumbent GAA foundry node but lacks BSPD, serving as a useful reference to evaluate 18A. A full teardown of Samsung’s S26 products, processed on SF2, will be shared soon.Nanosheet-cut EDS comparison. The PowerVia supply path runs from the backside Cu rails through Mo-lined W nano-TSVs to the local transistor contacts. In this cross section, the tapered connection spans roughly 150 nm from the contact level to BM0. The Ta liner confines Cu and promotes adhesion to the surrounding stack; the AlOₓ etch stop controls the next dielectric etch above the rail. Dielectric beneath the ribbons electrically separates the devices from the backside wiring and removes the conducting silicon body below the channel. [6] AlOₓ serves as an etchstop (ES), enabling endpointing and protecting the underlying layers. Low-volatility aluminum fluoride reaction products resist the fluorinated plasma, allowing a thin AlOₓ film to protect the metal while the surrounding low-k dielectric is removed. [6], [7]. While the BM0 and layers above the M1 lines show double AlOx layers, Our SMIC N+3 teardown showed single AlOₓ layers. SMIC uses a simpler local AlOₓ substack, while the remaining cap and etch sequence provide the required landing protection. So why double layers? The closely spaced AlOₓ doublets provide two protected endpoints in the etch sequence. Intel documents an AlOₓ/SiN/AlOₓ stack that explains the benefit. The main dielectric plasma etch stops on the first AlOₓ film; a selective wet clear opens that film; a second plasma etch removes the intermediate SiN and stops on the second AlOₓ film. The final wet clear exposes the metal landing surface. SiN is the intermediate dielectric in Intel’s published example. [8] The second stop protects the metal through a cap breakthrough. Wide openings can etch faster than narrow ones, and etch depth varies across the wafer. Metal under an early-clearing opening would otherwise be exposed while other openings still need more etching. Staged protection widens the process window and reduces metal erosion, corrosion and void formation. [8] TSMC documents AlN/AlOₓ/SiOC/AlOₓ above Cu, with AlN blocking Cu diffusion, and a simpler AlN/SiOC/AlOₓ variant that omits one AlOx film. [9] Levels with different opening sizes, aspect ratios, pattern densities and cap materials need different etch margins. A double AlOx stop is useful where another protected endpoint justifies the added processing. The extra film adds formation, selective opening and cleaning steps, plus another set of interfaces to control adhesion, moisture, and stress. These blanket films are opened through the existing via pattern, so each film does not require another lithography mask. AlOₓ adds parasitic capacitance when it replaces lower-k dielectric; two thin AlOₓ films can nevertheless contain less AlOₓ than one thick film. Total thickness, placement, and theintermediate dielectric determine the electrical cost. Deposition chemistry also changes AlOx permittivity and residual hydroxyl content, which can oxidize the underlying metal. [7], [8], [10], [11] The backside stack separates into relatively fine BM0-BM2 wiring near the devices and coarser BM3-BM5 power distribution. The largest pitch increase occurs between BM2 and BM3. BM0’s pitch closely matches the logic-row height, fitting local power delivery to the cell rows. Higher levels aggregate current through larger conductors: routing density becomes less important than low resistance and current capacity as the network approaches the package. This hierarchy provides wide power wiring for the power delivery network without consuming scarce frontside signal-routing resources. [3] The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. Frontside Interconnects Intel 18A combines Mo-lined W contacts and nano-TSVs with a separate backside Cu power network. Samsung SF2 keeps power on the frontside, using Ti-based contact interfaces and Ta-based barriers and Co liners around Cu wiring. In 18A standard-cell rows, backside power rails supply the devices through nano-TSVs within the cells, freeing frontside routing resources. Samsung’s M0 accommodates both power and signal connections. From the device toward M0, the connection runs through a Ti-based S/D interface, W contact fill, a Mo-lined W via, and the Cu M0 wire. Mo supplies a conductive nucleation and adhesion layer for W, replacing the resistive TiN liner used in conventional W integration. This increases the effective conduction volume within the feature while retaining W fill and its established polishing, cleaning and etching processes. Intel’s Mo/W patent describes this integration tradeoff. The nano-TSV uses the same Mo-lined W construction in the backside supply path. [12] The move from TiN to Mo is an incremental change. While a full Co or Mo fill can also reduce the volume lost to liners in very small features, it requires new integration schemes that increase complexity and risk. Cu remains attractive for wider wires due to its low resistance. As wires and vias shrink, the diffusion barrier consumes an increasing fraction of their cross-section. [12], [12], [14] Intel uses Co/Ru liners at M0-M1, Co at M2-M4, and Nb at M5-M9. The lower-level liners help Cu adhere and reduce void formation during trench fills. Applied Materials’ Endura has new thermal control that facilitate wetting process, so the thin film continuity is good enough that good capillary pressure will drive Cu atoms to the via bottom without voiding. Intel’s choice to use Nb is particularly interesting. Intel’s Nb patent describes a conductive diffusion barrier intended to reduce the barrier’s contribution to resistance relative to conventional Ta-based barriers, particularly at via bottoms where all current crosses the barrier. The patent pairs Nb in coarser levels with the option of lower-cost PVD processing. [15], [16] The upper metal layers support thicker barriers formed through physical vapor deposition (PVD) despite its worse coverage and uniformity. Meanwhile, the lower metal layers require thinner barriers deposited through conformal atomic layer deposition (ALD). Co/Ru adds another material interface and requires controlled deposition and Cu fill. Changing liners and barriers by metal layer allows Intel to optimize interconnect resistance, process complexity, and reliability. [15, 16] RibbonFET, Intel’s name for its gate-all-around FETs (GAAFETs), replaces the FinFET’s vertical fins with four stacked horizontal silicon nanosheets, allowing the gate to surround the channel on every side. The path to GAAFET begins with the planar transistor. A planar MOSFET places the gate above the channel between its source and drain. Pairing an NMOS with a PMOS transistor creates a CMOS inverter, in which the NMOS pulls the output low for a high input, and the PMOS pulls it high for a low input. The gate must retain electrostatic control of the channel to ensure clean switching. As gate lengths shrank, the drain began to compete with the gate for that control, increasing off-state leakage. Electrostatic control was restored through an architectural evolution that raised the channel into a vertical fin and wrapping the gate around three sides. Called “FinFET”, this new architecture packed more effective channel width into a smaller footprint. Further scaling made it harder to maintain both drive current and leakage within smaller cells, and reintroduced the same problems planar MOSFETs faced. Nanosheet GAAFETs close the fourth side by replacing the vertical fin with a stack of horizontal nanosheets, each surrounded by the gate. The tighter electrostatic control suppresses leakage at shorter gate lengths while stacking adds effective channel width within the cell footprint. In a FinFET process, channel width changes in discrete steps as designers must add or remove whole fins. Nanosheet width can instead be adjusted continuously within the process’s design rules. Wider sheets increase drive current, while narrower sheets reduce capacitance at the cost of drive current. Intel 18A uses stacks of four nanosheets each and varies their widths across logic and SRAM. At the process level, adding more sheets to each stack increases effective channel width and drive current, but complicates fabrication. RibbonFET vs MBCFET Samsung began GAAFET production in 2022 with SF3E, following with SF3 and now SF2. Its ‘MBCFET’ provides a useful structural comparison with Intel’s first RibbonFET implementation. [17] STEEL is digging deeper into SF2, used in the Exynos 2600, and TSMC’s GAAFET N2, used in Apple’s A20 Pro, in upcoming newsletter articles. We’re throwing some teasers on X. Let’s compare Samsung SF2’s MBCFET with Intel 18A’s RibbonFET. Subscribe Even to the untrained eye, Intel’s extra nanosheet is obvious. Intel stacks four ribbons to Samsung’s three. Samsung’s sheets are much wider in these fields, so both sheet count and width matter to the available channel perimeter. Sheet width also changes which silicon surfaces carry current. On conventional (001) silicon, wide nanosheets emphasize the broad top and bottom surfaces, favoring electron transport; the larger sidewall contribution in a narrow sheet favors hole transport. Thinner sheets improve gate control but increase confinement and scattering. This makes width and thickness part of the NMOS/PMOS balance, alongside strain and threshold voltage. [18], [19] GAAFET designs like 18A use different work-function-metal (WFM) stacks for NMOS and PMOS. Around each ribbon, a thin SiOx interfacial layer separates the silicon channel from the HfOx high-k dielectric, with La providing dipole tuning and the WFM wrapping the dielectric. NMOS uses a TiAl-based stack, while PMOS uses TiN WFM. W fills the remaining gate trench, providing a lower-resistivity path where the work-function layers are no longer needed. In this field, the PMOS stacks leave room for W between ribbons, while the NMOS stacks occupy more of those gaps. A silicon-based dielectric marks the P/N boundary, allowing the PMOS and NMOS gates, sharing the same gate trench, to be processed sequentially. Fast logic paths, retention circuits, and SRAM need a family of threshold options. Changing threshold without substantially changing device dimensions, capacitance or fabrication complexity is valuable. FinFET processes typically use different work-function-metal stacks. In a four-ribbon GAA stack, the narrow sheet-to-sheet gap limits how much WFM can fit around each channel. La in the gate dielectric creates interfacial dipoles at the SiOx/HfOx boundary, shifting effective work function and tuning threshold voltage. This gives Intel another control alongside its NMOS and PMOS WFM stacks. Low-threshold devices improve critical-path drive; higher thresholds reduce leakage elsewhere. Dipole tuning is especially useful in GAA because it changes threshold without consuming the narrow intersheet gap with thicker WFM. Precise control of La incorporation, diffusion and interface quality has long been a challenge, limiting viability in high volume production but is now seen from every leading-edge foundry. Intel’s patent describes depositing a dipole-forming oxide above HfOx and annealing it toward the interfacial oxide before completing the work-function and fill metals. This separates threshold tuning from the space available for metal. Newer research addresses the thermal cost: imec’s 2026 dipole-middle research inserts the shifter between two HfOx depositions, shortening the diffusion path while protecting SiOx during patterning. [20], [21]Matched-cut EDS, Intel 18A (left) vs. Samsung SF2 (right). Intel retains raised source/drain epi beneath its contacts, while Samsung recesses W deep into the epi to form a V-shaped Ti-lined interface. The deeper contact increases metal-to-semiconductor area and shortens the current path from the lower sheets, reducing contact and spreading resistance. It also removes epi volume and brings the contact etch closer to the channel ends. Retaining more epi preserves the material available for strain transfer, especially from SiGe into PMOS. These geometries balance contact access against stress engineering and etch margin. [22], [23] Samsung stacks three sheets to Intel’s four ribbons, and both processes use sheet width to tune drive strength. In our Samsung cross-sections, widths range roughly from 19 to 30 nm in the NPU rows and 37 to 50 nm in the CU cell. The Samsung nanosheets taper, with the widest sheet at the bottom and the narrowest at the top. Both processes use HfOx gate dielectric and Ti-based work-function stacks, with Al in the NMOS stack. In the Samsung devices shown here, the dielectric and WFM occupy the intersheet gaps, leaving W above the top sheet. Intel’s PMOS stack leaves more room between ribbons, and W fills those gaps while the thicker NMOS stack leaves W mainly in the upper trench. Gate-stack EDS maps. The W between Intel’s PMOS ribbons provides a conductive path close to the lower gates. Where WFM fills the entire gap, the gate still surrounds the channel, but voltage reaches it through the more resistive work-function films. Thinner WFM and dipole tuning preserve room for low-resistivity fill; Mo and Ru are alternative fill metals being developed for further scaling. [24] A masked, sequential WFM flow explains the different gate heights and inter-nanosheet fill. The proposed sequence below shows how separate NMOS and PMOS work-function steps produce that geometry. Enabled by the BSPDN process, Intel replaces the dense-logic silicon subfin with dielectric, removing the parasitic conduction path below the ribbons and reducing substrate-related capacitance. A retained silicon body as in classical, non-SOI, planar and FinFET designs needs junction and punchthrough-stop engineering to suppress leakage. Dielectric isolation makes that leakage less sensitive to the subfin doping profile but adds removal and fill steps. It also weakens the direct thermal path through silicon, making the contacts, metal stacks and package more important for heat extraction. [24], [26] Fluorine is concentrated around selected Intel device structures in the maps. WF6 is a standard precursor for W nucleation and fill, while barrier films protect adjacent dielectrics from fluorine attack. Low-fluorine W processes reduce the residual-F burden. Chloride-based precursors avoid introducing F during W deposition, but require control of chlorine attack, nucleation and fill quality. The integration target is a continuous, low-resistance W path with a thin protective liner and minimal chemical damage to the surrounding stack. [20], [27], [28] The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. We measured cell height, gate pitch, metal geometry, and ribbon dimensions at the XTEM sites shown below. The tables group these dimensions by site and device polarity. Our “sheet cuts” cross the silicon channel and show the ribbons end-on. “gate cuts” run along the channel through successive gates. The 18A logic cell dimensions point to a five-track logic library while the N3E and Intel 3 cell dimensions evidence a seven-track logic library. The DDR-PHY uses wider M0 wires and much larger spacing than core logic. That trades routing density for lower wire resistance and weaker coupling between neighboring nets. The geometry suits the current delivery and coupling requirements of analog, clock, and I/O circuitry. PowerVia lets 18A combine a compact cell height with wider M0 geometry by moving the main power rails off the signal-routing tracks. That relaxes local wire scaling while preserving a small cell footprint. Cell height and gate pitch set the geometric density; pin access and routability determine how much of it a real block can use. [29] The biggest takeaway from our gate-pitch measurements is that Intel 18A compute logic and TSMC N3E GPU logic have similar density in the Bohr representative-cell model. The 18A example is 18.6% denser than the Intel 3 GPU example. Gate pitches are nearly identical across the three sites, so cell height drives most of the difference. The Bohr model combines a four-transistor NAND2 spanning three gate pitches and a 32-transistor scan flip-flop (SFF) spanning nineteen pitches, weighting their densities 60:40. The sensitivity column shows how independently changing cell height and gate pitch by ±1 nm changes the result. This compares representative cell geometries; whole-die density also depends on cell mix and placement. The 18A P-core gives M0 substantially more metal cross section than the N3E vector engine. Treating each profile as a trapezoid gives 2.63 times the area per line and 1.84 times the area after normalization by routing pitch. The larger section reduces the geometric contribution to line resistance and lowers current density for a given current. Taller and wider wires also add capacitance, so circuit delay depends on the balance of resistance and capacitance. The DDR-PHY has less metal area per routing width than the 18A core fields, while remaining above N3E. [30] Area = height × (top CD + bottom CD) / 2, including liners. Area/pitch normalizes by routing width. Taper is the symmetric sidewall angle from vertical, with the largest angle belonging to the DDR-PHY. Compute tile The measurements show how ribbon dimensions and gate-stack geometry vary across the compute tile and between NMOS and PMOS to balance channel drive, gate load and the space needed for the dielectric/WFM stack across logic, SRAM and the DDR-PHY. Width mainly changes available channel perimeter; thickness also changes electrostatic control and carrier confinement. Gate-stack thickness then determines the space left for low-resistivity fill P-core and LP E-core logic Both the P-core and LP E-core use multiple nanosheet widths. Widths are measured on high-magnification XTEMs while wider-field images demonstrate additional width choices within the LP E-core. Multiple widths are expected even within an LP E-core. Timing-critical paths, buffers and cells with different fanout need different drive strengths. The lower-magnification fields show this width diversity beyond the sites quantified in the table. L2 and L3 SRAM GAA gives SRAM designers another way to balance the pull-up (PU), pass-gate (PG), and pull-down (PD) transistors. FinFET bitcells set device strength through fin count while GAA adds nanosheet width as a sizing knob. In a 6T SRAM cell, a strong pull-down relative to the pass-gate limits read disturbance, while a strong pass-gate relative to the pull-up improves writability. During a write, the pass-gate and write driver pull the node storing “1” below the inverter trip point. During a read, the pull-down holds the node storing “0” low. Bias, threshold voltage, mismatch and assist circuitry set the remaining margin. FinFET high-current cells commonly use a PU:PG:PD fin-count pattern of 1:2:2, a device-sizing ratio rather than a current ratio. Ribbon width lets Intel balance SRAM strengths without adding whole fins. The L2 cell uses its narrowest ribbons for PU and widest for PD, improving writability and read stability respectively. Intel’s disclosed HCC operates without assist; its denser HDC uses negative-bitline write assist. Pulling the selected bitline briefly below ground increases pass-gate overdrive so it can overpower the pull-up at lower supply voltage. That buys density and low voltage writability at the cost of boosting circuitry, switching energy, and additional voltage stress that must be controlled. [31], [32] Four rectangular ribbons give the perimeter = 8 × (width + thickness), before corner rounding. PG/PU is 1.49 and PD/PG is 1.16. The L3 structures closely resemble L2 in layout and cell height. Fewer L3 nanosheet widths are tabulated because fewer high-magnification images were available. DDR PHY The DDR-PHY trades density for controlled analog behavior and reliable off-chip signaling. It contains drivers, receivers, delay circuits, and calibration logic that set drive strength, sampling time, and voltage margin. Repeated four-sheet devices with similar widths fit the use of regular transistor units for matching and programmable drive. Its wider local wiring provides room for current delivery and separation of sensitive signals, while consuming more area than a dense core-logic grid. The layout serves the memory channel’s electrical requirements as well as digital logic density. [33] The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. Intel 3 GPU devices Vector engine logic Intel 3’s XVE logic uses two-fin PMOS and NMOS devices with power rails in M0. Its cell height and M0 pitch give a seven-track geometry, two tracks more than the 18A logic. One-fin groups also appear among the two-fin devices. Intel 3 L2 SRAM The Intel 3 L2 SRAM uses the familiar HCC sizing pattern: one PU fin, two PG fins, and two PD fins. N3E GPU devices Vector engine logic The N3E XVE field contains repeated two-fin devices with seven-track cell geometry. N3E remains a FinFET process, giving Panther Lake a direct FinFET-to-RibbonFET comparison. N3E L2 SRAM The N3E L2 SRAM uses the same PU:PG:PD fin-count pattern of 1:2:2. Panther Lake-U follows Lunar Lake’s floorplan quite closely. Both pair 4 P-cores with 4 LP E-cores and NPU, media and display engines in similar locations. Lunar Lake also uses Xe2, the direct predecessor to Panther Lake’s Xe3 GPU. This makes Lunar Lake the most direct basis for our comparisons. Arrow Lake differs in core count and uses the older Xe-LPG GPU architecture, so we only use it where it offers a more direct component-level comparison. Compute tile Panther Lake compute-tile floorplans remain sparse even months after launch. Intel 18A’s backside metal and dielectric stack must be removed without damaging the underlying structures before a clean transistor-level floorplan can be imaged. Most published die shots hide or heavily process the background, but we are quite proud of the die shot we achieved and are excited to show the work we have done. We measured the areas of the key components on the compute tile and compared them with their Lunar Lake predecessors on TSMC N3B. These help us to capture changes in block area and compare the two chips across process nodes and designs. Our total tile areas exclude the scribe-line area. The compute-plus-GPU subtotal below uses the PTL-U compute tile and GT1 GPU; it excludes the I/O tile and passive base. Individual block areas use the boundaries marked on the floorplans The compute-plus-GPU row is recomputed from the displayed PTL-U and GT1 areas. Component rows use their stated per-region counts and are not an additive partition of the whole tile. The P-core area remains almost unchanged between Lunar Lake and Panther Lake, despite L2 capacity increasing from 2.5 MiB to 3 MiB. Arrow Lake uses the same Lion Cove core as Lunar Lake but also has a 3 MiB L2. Cougar Cove fits 20% more L2 into the same P-core area. The larger private cache keeps more of each core’s working set close to its execution units, reducing access to shared L3 and DRAM. Extra capacity adds storage leakage and lookup energy, so designers balance it against avoided lower-level accesses. The shared P-core L3 cache also shrank by 14.8%. [2] Cougar Cove combines a similar footprint with Intel’s reported power-efficiency improvements. RibbonFET’s tighter channel control reduces leakage, while PowerVia reduces supply droop and allows tighter voltage guardbands. [1] Darkmont’s four-core LP E-core cluster is 5.0% smaller than Skymont’s on Lunar Lake, with most of the reduction in its L2 regions. The 1 MiB region shrank by 8.4% and the 1.5 MiB region by 14.9%. The tag arrays also use one fewer visible row. Tags identify which memory addresses the data array holds, so rearranging them changes the cache’s layout and wiring without requiring less data capacity. [2] The LP E-cores share one L2. This pools capacity and avoids duplicating all the cache machinery, but the four cores contend for its banks and bandwidth. Their separate cluster also keeps light work away from the performance cluster and its L3, allowing that larger domain to sleep. [1], [2] Cache area includes more than the storage cells. Tags identify each line, decoders select rows, sense amplifiers read the small bitline signal, and wires connect to the banks. Splitting an array into smaller sections shortens wordlines and bitlines, improving access speed, but duplicates peripheral circuits. Panther Lake’s smaller cache regions therefore reflect the complete memory implementation, including how much of each region is devoted to storage. [34] Unlike Meteor Lake and Arrow Lake, Panther Lake has no separate SoC tile. The NPU, LP E-cores, memory controllers, PHYs, media and display engines now share the compute tile. This removes an active die and keeps CPU memory traffic on one die. The cost is moving PHY and I/O-related circuitry onto 18A: drivers, receivers and analog circuits must still meet external voltage, loading and signal-integrity requirements, so their area does not shrink like dense digital logic. [1], [2] The biggest shrink comes from the NPU, which occupies 36.9% less area. NPU 5 consolidates the same total INT8 MAC count into half as many neural compute engines. Each of the three NCEs has a larger MAC array to make the complete NCE envelope 22.6% larger than an NPU 4 engine. Consolidation also halves the number of scratchpads and SHAVE DSPs, from 12 to 6. The MAC array handles matrix multiplication and convolution, while SHAVE executes vector and custom operations that fit the array poorly. [1], [2], [35] The paired floorplans identify each NCE envelope and its scratchpad, MAC, and SHAVE regions. Each measured MAC polygon is counted once per NCE in the area accounting below. The scratchpads store weights, activations, and intermediate results near the MAC arrays, allowing repeated use without fetching them again from DRAM. Halving their number delivers the largest measured area saving but leaves less local storage for the same total MAC count. Layers that no longer fit locally require smaller working tiles or more transfers of intermediate data. The benefit depends on keeping the enlarged arrays busy while managing that tighter storage budget. [36] NPU 5 also adds native FP8. Using half the operand width of FP16 reduces storage and transfer demand, helping workloads fit the smaller local memory budget. Lower precision and format-dependent range make scaling and model validation part of deployment. Hardware activation functions further reduce work that would otherwise occupy the programmable DSPs. [1], [2] Microsoft requires an NPU to deliver at least 40 TOPS for Copilot+ PCs. Both Lunar Lake and Panther Lake meet this threshold, but Panther Lake uses significantly less silicon. GPU tiles Panther Lake is Intel’s first product with Xe3, its latest GPU architecture. It offers two different GPU tiles: a smaller GT1 tile with 4 Xe3 cores on Intel 3 and a larger GT2 tile with 12 Xe3 cores on TSMC N3E. Panther Lake allows us to compare the same GPU architecture across both Intel 3 and TSMC N3E. Wildcat Lake adds a third Xe3 implementation on Intel 18A. A future newsletter will detail Xe3 and its implementation differences across all three process nodes. GT2 scales Xe3 to a different physical layout, with render slices arranged vertically instead of GT1’s horizontal arrangement. Slice placement sets the distances to shared cache banks and the D2D interface. Those wires consume area and add delay, so scaling the number of Xe cores also requires a new balance of cache placement, routing and timing. [1] What’s immediately obvious is that the GT2 tile on TSMC N3E has much smaller Xe cores than GT1. These block areas include logic, caches, and routing. An Xe core on the GT1 tile is ~69% larger than one on Lunar Lake, and ~55% larger than one on GT2. Intel 3 therefore uses substantially more area per Xe core. The block-area gap exceeds the measured logic and SRAM density gaps, bringing routing, timing targets, cell mix, and floorplan allocation into the comparison. The measured vector/matrix engine region is almost unchanged between Lunar Lake and Panther Lake’s GT2 tile. Xe3 retains eight 512-bit vector engines and eight 2048-bit XMX engines per core. Its gains also come from feeding those engines more effectively: more resident threads hide stalls, and variable register allocation lets shaders trade registers per thread against the number of threads kept active. [1] The shared L1/SLM capacity increased by 33% from 192 KiB to 256 KiB, while its area increased only 5%, raising effective density by 27%. L1 retains reused cache lines, while software-managed SLM lets a thread group share data locally. Both reduce traffic to more distant memory. Allocating more SLM per group can also limit how many groups reside on a core at once. [1], [37] The GT1 tile carries 4 MiB of L2 against 16 MiB on the GT2 tile. GT1 divides its L2 cache into four 1 MiB banks, while GT2 uses eight 2 MiB banks. Each bank contains 128 macros, but each N3E macro stores 16 KiB, twice the Intel 3 macro’s 8 KiB capacity. The N3E macro is only 54% larger while holding twice as many bits, giving it 30% higher density: ~23.7 Mbit/mm² versus 18.3 Mbit/mm². Including bank-level circuitry, the gap widens to ~16.9 Mbit/mm² on GT2 versus ~10.4 Mbit/mm² on GT1. GT2 gains density with its macros storing more bits per unit area, and those macros occupy more of each cache bank. Larger macros spread decoder and sense-amplifier overhead across more storage, while a more compact bank layout reduces the share spent on control and routing. The compromise is longer wordlines and bitlines that carry more capacitance. [34] I/O tile Panther Lake uses two I/O tile variants, both fabricated on TSMC N6. The smaller one provides 4 PCIe 5.0 and 8 PCIe 4.0 lanes and serves lower-tier systems as well as those without a discrete GPU, while the larger one adds 8 PCIe 5.0 lanes, bringing the total to 20 lanes, for discrete-GPU connectivity. Panther Lake SKUs with the larger 10- or 12-Xe GPUs use the smaller I/O tile. [38] The smaller I/O tile adds a PCIe 4.0 block and a Thunderbolt block to Lunar Lake’s I/O layout, providing four additional PCIe 4.0 lanes and another Thunderbolt 4 port. Its repeated N6 blocks retain nearly identical areas and layouts. Reusing these proven PHYs and controllers avoids porting and requalifying external interfaces on 18A, where faster digital logic offers less benefit to circuits constrained by the off-chip link. [38] SemiAnalysis’s teardown lab (STEEL) dives deep into the world’s advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. We’re hiring technical experts from system to transistor and everywhere in between. Check out our Careers page. Panther Lake offers scalability and modularity through its disaggregated packaging that partition compute, GPU, and I/O silicon into separate tiles allowing for a suite of tile configurations. This partitioning makes the package part of Intel’s node economics as it determines how much leading-edge wafer area each product consumes, which functions can remain on other processes, and how much configuration freedom Intel can offer from a shared set of tiles. Furthermore, fabricating the compute and GPU tiles separately confines the new 18A process to the compute tile and allows graphics and I/O to use other, more established, and more cost-effective processes. For Panther Lake, the GPU and I/O tiles are assembled alongside the compute tile on a passive silicon base using Foveros-S. Intel’s current technology brief lists a nominal 36 µm pitch for Foveros-S. Through-silicon vias (TSVs) in the base connect the fine wiring above to the larger package connections below. The functional tiles sit side by side on that passive base in a 2.5D configuration. [39] Our cross-section through the compute and GPU tiles shows the package’s wiring hierarchy. Microbumps connect each active tile to the passive silicon base; its fine redistribution layer (RDL) carries the short, dense tile-to-tile links. TSVs carry connections through the base to the package substrate, which fans them out to the much coarser motherboard solder joints. The base supplies interconnect, while computation remains in the active tiles above it. [39] At the compute-tile edge, the higher-magnification inset shows a local microbump spacing of approximately 25.24 µm and a feature width of 12.33 µm. These local spacings are finer than Intel’s nominal Foveros-S value. The X-ray fields further confirm tighter neighboring bumps, consistent across every die-to-die area found on each tile. Additional X-ray analysis is offered after the paywall. Putting the memory controller beside the CPU removes the D2D transfer that CPU memory requests required in Meteor Lake and Arrow Lake. This avoids the extra transmitter, receiver, and link traversal, saving interface energy and latency. Panther Lake’s separate GPU still crosses a D2D link to reach DRAM, so its larger local caches also help contain package traffic. [1], [40] Smaller dies are less likely to contain a random fatal defect, and screening them before assembly prevents one bad tile from consuming a complete package of good silicon. Reuse also spreads design and qualification work across more products. Against those gains, Intel pays for the passive base, D2D circuits, extra bonding and test steps, and losses during assembly. Cost per working product across the portfolio captures the combined effect of wafer yield, reuse, test, and assembly. [29] Wildcat Lake packaging Intel launched Core Series 3, formerly Wildcat Lake, on 16 April 2026 for value mobile and edge systems. Wildcat Lake keeps 18A but removes the passive base and combines more functions on one die to simplify the package. The two products therefore reveal two distinct ways to commercialize the same leading-edge process. [41] Wildcat Lake’s 18A die combines up to two Cougar Cove P-cores, four Darkmont LP E-cores, two Xe3 cores and a smaller NPU. A separate platform-controller die supplies I/O, connected through UCIe, Intel’s first processor implementation of the standard. Consolidating graphics remove a tile boundary and the passive base, reducing assembly complexity for a modest-bandwidth value product. It also ties CPU and graphics scaling to the same die, giving up Panther Lake’s ability to swap in a much larger GPU. [42], [43] In July 2021, Intel CEO Pat Gelsinger set out an ambitious process roadmap aimed at regaining performance leadership by 2025, later described as five nodes in four years. Five years and one CEO later, Intel’s comeback story is not as unambiguously positive as Pat may have hoped. [44], [45] Intel once set the pace for process technology, bringing high-k metal gate technology and FinFETs into volume production years ahead of the rest of the industry. Its 22 nm FinFET process reached consumers with Ivy Bridge in 2012. [46] Intel’s integrated device manufacturing (IDM) model allowed its architects and process engineers to co-optimize products and processes. Starting with Sandy Bridge, Intel dominated x86, while AMD struggled with Bulldozer. That lead faltered at 14 nm and broke at 10 nm. Intel targeted a massive 2.7× density increase, but the node arrived years late and required several revisions before it could support Intel’s full lineup. This delay forced Intel to stretch 14 nm across six generations, while TSMC moved ahead in process technology and AMD recovered in x86. By 2019, Intel was still shipping 14 nm across most of its product stack, with its 10 nm client ramp focused on Ice Lake mobile processors. Meanwhile, TSMC was shipping N7 and N7+, and AMD’s Zen 2 compute chiplets used N7 to raise core counts and improve efficiency. Intel’s process failures were central to its decline, but unsound business decisions furthered their downward slide. Product delays compounded product mistakes, pushing client, server, and FPGA roadmaps off schedule. Several attempts to enter AI (Nervana and Gaudi) and networking (Tofino) also failed to establish lasting businesses. Intel’s recovery has focused on consumer CPUs and advanced packaging. Tiger Lake, Alder Lake, Lunar Lake and now Panther Lake have restored Intel’s consumer roadmap. On the process side, Intel 4 shipped with Meteor Lake, Intel 3 with Granite Rapids and Sierra Forest, and Intel 18A with Panther Lake. Intel has also made advanced packaging part of its foundry offering. However, Intel is still playing catch-up in servers. Several Xeon generations arrived years late and trailed contemporary AMD and Arm server CPUs in performance, efficiency, and core count. The process roadmap is back, but Intel does not hold the same process-technology leadership position it held prior to 10 nm. The introduction of gate-all-around nanosheets and backside power delivery are two of the biggest changes to transistor integration in a decade. Intel took on both changes at once: 18A paired its first RibbonFET with PowerVia in Panther Lake. Panther Lake is a substantial manufacturing milestone. Our cross-sections show how RibbonFET and PowerVia reshape local contacts and wiring, while the floorplans show where architectural consolidation and process choices save area. A sustained competitive lead depends on product performance, cost, yield, and the next implementation. The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page.. [1] Intel, “Intel Tech Tour 2025 Panther Lake recap,” Doc. 866361, 2025. Accessed: Sep. 14, 2026. [Online]. Available: https://cdrdv2-public.intel.com/866361/ITT_2025_Panther_Lake_Recap1.pdf [2] Intel, “Core Ultra processors Series 3 datasheet, volume 1,” Doc. 872188-001, Jan. 2026. Accessed: Sep. 14, 2026. [Online]. Available: https://cdrdv2-public.intel.com/872188/872188-001.pdf [3] N. Horiguchi and E. Beyne, “Backside power delivery: How to power chips from the backside,” imec Reading Room, Nov. 25, 2022. Accessed: Sep. 14, 2026. [Online]. Available: https://www.imec-int.com/en/articles/how-power-chips-backside [4] W. Hafez et al., “Intel PowerVia technology: Backside power delivery for high density and high-performance computing,” in Proc. IEEE Symp. VLSI Technol. Circuits, Kyoto, Japan, Jun. 2023, pp. 1–2, doi: 10.23919/vlsitechnologyandcir57934.2023.10185208. [5] K. Fischer et al., “Intel 18A platform technology featuring RibbonFET (GAA) and PowerVia for advanced high-performance computing,” in Proc. Symp. VLSI Technol. Circuits, Kyoto, Japan, Jun. 2025, pp. 1–3, doi: 10.23919/vlsitechnologyandcir65189.2025.11075006. [6] K.-F. Cheng, C.-L. Teng, H.-Y. Huang, and H.-C. Chen, “Metal oxide composite as etch stop layer,” U.S. Patent 12 176 247 B2, Dec. 24, 2024. Accessed: Sep. 14, 2026. [Online]. Available: https://patents.google.com/patent/US12176247B2/en [7] S. W. King, “Dielectric barrier, etch stop, and metal capping materials for state of the art and beyond metal interconnects,” ECS J. Solid State Sci. Technol., vol. 4, no. 1, pp. N3029–N3047, 2015, doi: 10.1149/2.0051501jss. [8] A. V. Mule’, D. J. Towner, D. Seghete, C. R. Ryder, and A. A. Gonzalez, “Multi-layer etch stop layers for advanced integrated circuit structure fabrication,” U.S. Patent Appl. 20220102343 A1, Mar. 31, 2022. Accessed: Sep. 14, 2026. [Online]. Available: https://patents.google.com/patent/US20220102343A1/en [9] C.-C. Wang and J. H. Wang, “Interconnect structure with dielectric cap layer and etch stop layer stack,” U.S. Patent Appl. 20230253247 A1, Aug. 10, 2023. Accessed: Sep. 14, 2026. [Online]. Available: https://patents.google.com/patent/US20230253247A1/en [10] Y. J. Wu, K.-F. Cheng, C.-C. Lee, H.-K. Chang, and H.-Y. Huang, “Etch stop layer for interconnect structures,” U.S. Patent Appl. 20240332070 A1, Oct. 3, 2024. Accessed: Sep. 14, 2026. [Online]. Available: https://patents.google.com/patent/US20240332070A1/en [11] M. G. Rainville, N. Shankar, K. S. Reddy, and D. M. Hausmann, “Deposition of aluminum oxide etch stop layers,” U.S. Patent Appl. 20180197770 A1, Jul. 12, 2018. Accessed: Sep. 14, 2026. [Online]. Available: https://patents.justia.com/patent/20180197770 [12] J. S. Leib et al., “Conductive lines having molybdenum liner and tungsten fill for advanced integrated circuit structure fabrication,” U.S. Patent Appl. 20240429126 A1, Dec. 26, 2024. Accessed: Sep. 14, 2026. [Online]. Available: https://patents.justia.com/patent/20240429126 [13] M. Naik, “Cobalt enables power and performance scaling at single-digit logic nodes,” Applied Materials, Dec. 17, 2018. Accessed: Sep. 14, 2026. [Online]. Available: https://www.appliedmaterials.com/us/en/blog/blog-posts/cobalt-enables-power-and-performance-scaling-at-single-digit-logic-nodes.html [14] Lam Research, “Breaking through AI’s invisible barrier with molybdenum,” Lam Research Newsroom, May 6, 2025. Accessed: Sep. 14, 2026. [Online]. Available: https://newsroom.lamresearch.com/molybdenum-metallization-ai-revolution [15] P. Yashar, G. Malyavanatham, and H. Vijwani, “Integrated circuit interconnect structures with niobium barrier materials,” U.S. Patent Appl. 20240112951 A1, Apr. 4, 2024. Accessed: Sep. 14, 2026. [Online]. Available: https://patents.google.com/patent/US20240112951A1/en [16] Applied Materials, “Applied Materials unveils chip wiring innovations for more energy-efficient computing,” Applied Materials Investor Relations, Jul. 8, 2024. Accessed: Sep. 14, 2026. [Online]. Available: https://ir.appliedmaterials.com/news-releases/news-release-details/applied-materials-unveils-chip-wiring-innovations-more-energy [17] Samsung, “Samsung showcases AI-era vision and latest foundry technologies at SFF 2024,” Samsung Semiconductor, Jun. 13, 2024. Accessed: Sep. 14, 2026. [Online]. Available: https://semiconductor.samsung.com/news-events/news/samsung-showcases-ai-era-vision-and-latest-foundry-technologies-at-sff-2024/ [18] C. W. Yeung et al., “Channel geometry impact and narrow sheet effect of stacked nanosheet,” in Proc. IEEE Int. Electron Devices Meeting (IEDM), Dec. 2018, pp. 28.6.1–28.6.4, doi: 10.1109/iedm.2018.8614608. [19] S. Mochizuki et al., “Evaluation of (110) versus (001) channel orientation for improved nFET/pFET device performance trade-off in gate-all-around nanosheet technology,” in Proc. Int. Electron Devices Meeting (IEDM), Dec. 2023, pp. 1–4, doi: 10.1109/iedm45741.2023.10413854. [20] D. G. Ouellette et al., “Fabrication of gate-all-around integrated circuit structures having molybdenum nitride metal gates and gate dielectrics with a dipole layer,” U.S. Patent 12 051 698 B2, Jul. 30, 2024. Accessed: Sep. 14, 2026. [Online]. Available: https://patents.google.com/patent/US12051698B2/en [21] imec, “Advancing the CFET-based device roadmap with novel integration modules and standard-cell architectures,” imec, 2026. Accessed: Sep. 14, 2026. [Online]. Available: https://www.imec-int.com/en/articles/advancing-cfet-based-device-roadmap-novel-integration-modules-and-standard-cell [22] A. Reznicek, X. Miao, C. Lee, and J. Zhang, “Wrap around contact for nanosheet source drain epitaxy,” U.S. Patent 11 302 813 B2, Apr. 12, 2022. Accessed: Sep. 14, 2026. [Online]. Available: https://patents.google.com/patent/US11302813B2/en [23] J. A. Kittl, J. G. Hong, D. R. Palle, and M. S. Rodder, “Methods for varied strain on nano-scale field effect transistor devices,” U.S. Patent 9 978 833 B2, May 22, 2018. Accessed: Sep. 14, 2026. [Online]. Available: https://patents.google.com/patent/US9978833B2/en [24] S. Gandikota et al., “Method of reducing metal gate resistance for next generation NMOS device application,” Int. Patent Appl. WO 2024/137272 A1, Jun. 27, 2024. Accessed: Sep. 14, 2026. [Online]. Available: https://patents.google.com/patent/WO2024137272A1/en [25] J. Zhang et al., “Full bottom dielectric isolation to enable stacked nanosheet transistor for low power and high performance applications,” in Proc. IEEE Int. Electron Devices Meeting (IEDM), Dec. 2019, pp. 11.6.1–11.6.4, doi: 10.1109/iedm19573.2019.8993490. [26] C. Yoo, J. Chang, Y. Seon, H. Kim, and J. Jeon, “Analysis of self-heating effects in multi-nanosheet FET considering bottom isolation and package options,” IEEE Trans. Electron Devices, vol. 69, no. 3, pp. 1524–1531, Mar. 2022, doi: 10.1109/ted.2022.3141327. [27] S. S. Pradhan, D. B. Bergstrom, J.-S. Chun, and J. Chiu, “Tungsten gates for non-planar transistors,” European Patent Appl. EP 3 506 367 A1, Jul. 3, 2019. Accessed: Sep. 14, 2026. [Online]. Available: https://patents.google.com/patent/EP3506367A1/en [28] L. Schloss and X. Ba, “Tungsten films having low fluorine content,” U.S. Patent 9 754 824 B2, Sep. 5, 2017. Accessed: Sep. 14, 2026. [Online]. Available: https://patents.google.com/patent/US9754824B2/en [29] Intel Foundry, “Accelerating AI and HPC with advanced process and packaging technologies,” Doc. 367370-001US, Jun. 2026. Accessed: Sep. 14, 2026. [Online]. Available: https://www.intel.com/content/dam/www/central-libraries/us/en/documents/2025-11/intel-foundry-hpc-ai-brief.pdf [30] M. Lofrano, X. Chang, H. Oprins, and Z. Tokei, “Mitigating the thermal bottleneck in advanced interconnects,” imec, Sep. 28, 2023. Accessed: Sep. 14, 2026. [Online]. Available: https://www.imec-int.com/en/articles/mitigating-thermal-bottleneck-advanced-interconnects [31] S. Bair, “Intel at ISSCC 2025: Navid Shahriari invited talk, eight papers, forums, panelist & product details,” Intel Community, Feb. 19, 2025. Accessed: Sep. 14, 2026. [Online]. Available: https://community.intel.com/t5/Blogs/Tech-Innovation/Edge-5G/Intel-at-ISSCC-2025-Navid-Shahriari-Invited-Talk-Eight-Papers/post/1667592 [32] D. Chandra, E. Potladhurthi, D. R. S. Reddy, and K. S. Rengarajan, “Tunable negative bitline write assist and boost attenuation circuit,” U.S. Patent Appl. 20160203857 A1, Jul. 14, 2016. Accessed: Sep. 14, 2026. [Online]. Available: https://patents.google.com/patent/US20160203857A1/en [33] Synopsys, “Advantages of firmware-based training in high-speed DDR IP,” Synopsys IP Technical Bulletin. Accessed: Sep. 14, 2026. [Online]. Available: https://www.synopsys.com/articles/firmware-based-training-ddr-ip.html [34] N. Muralimanohar, R. Balasubramonian, and N. P. Jouppi, “CACTI 6.0: A tool to understand large caches,” Hewlett-Packard Laboratories, 2009. Accessed: Sep. 14, 2026. [Online]. Available: https://users.cs.utah.edu/~rajeev/cacti6/cacti6-tr.pdf [35] Intel, “Intel Tech Tour 2024 Lunar Lake AI hardware accelerators,” Doc. 824436, 2024. Accessed: Sep. 14, 2026. [Online]. Available: https://cdrdv2-public.intel.com/824436/2024_Intel_Tech%20Tour%20TW_Lunar%20Lake%20AI%20Hardware%20Accelerators.pdf [36] Y.-H. Chen, J. Emer, and V. Sze, “Eyeriss: A spatial architecture for energy-efficient dataflow for convolutional neural networks,” in Proc. 43rd ACM/IEEE Annu. Int. Symp. Comput. Archit. (ISCA), Jun. 2016, pp. 367–379, doi: 10.1109/isca.2016.40. [37] Intel, “Introduction to the Xe-HPG architecture,” Doc. 758306, Nov. 4, 2022. Accessed: Sep. 14, 2026. [Online]. Available: https://www.intel.com/content/www/us/en/developer/articles/technical/introduction-to-the-xe-hpg-architecture.html [38] Intel, “Core Ultra processors Series 3 for the edge,” Doc. 855291. Accessed: Sep. 14, 2026. [Online]. Available: https://cdrdv2-public.intel.com/855291/Intel%C2%AE%20Core%E2%84%A2%20Ultra%20Processors%20Series%203%20for%20Edge%20Overview_2.pdf [39] Intel Foundry, “Foveros technology brief,” Doc. 366411-001US, Feb. 2026. Accessed: Sep. 14, 2026. [Online]. Available: https://www.intel.com/content/dam/www/central-libraries/us/en/documents/2025-07/foveros-25d-product-brief.pdf [40] D. Das Sharma, “UCIe: Building an open chiplet ecosystem,” UCIe Consortium, 2022. Accessed: Sep. 14, 2026. [Online]. Available: https://www.uciexpress.org/_files/ugd/0c1418_c5970a68ab214ffc97fab16d11581449.pdf [41] Intel, “Intel launches Intel Core Series 3 processors,” Intel Newsroom, Apr. 16, 2026. Accessed: Sep. 14, 2026. [Online]. Available: https://www.intel.com/content/www/us/en/newsroom/news/client-computing/intel-launches-intel-core-series-3-processors-changing-the-game-for-everyday-computing.html [42] Intel, “Core Series 3 launch press deck,” Apr. 2026. Accessed: Sep. 14, 2026. [Online]. Available: https://download.intel.com/newsroom/2026/Intel-Core-Series-3/Intel-Core-Series-3-Launch-Press-Deck.pdf [43] Intel, “Intel outlines architectures for agentic AI at Hot Chips 2026,” Intel Newsroom, Aug. 24, 2026. Accessed: Sep. 14, 2026. [Online]. Available: https://www.intel.com/content/www/us/en/newsroom/news/client-computing/intel-outlines-architectures-for-agentic-ai-at-hot-chips-2026.html [44] Intel, “Intel accelerates process and packaging innovations,” Intel Investor Relations, Jul. 26, 2021. Accessed: Sep. 14, 2026. [Online]. Available: https://www.intc.com/filings-reports/all-sec-filings/content/0001193125-21-224438/d199788dex991.htm [45] Intel, “Intel reports third-quarter 2021 financial results,” Intel Investor Relations, Oct. 21, 2021. Accessed: Sep. 14, 2026. [Online]. Available: https://www.intc.com/news-events/press-releases/detail/1505/intel-reports-third-quarter-2021-financial-results [46] Intel, “3rd generation Intel Core processors bring exciting new experiences and fun to the PC,” Intel Investor Relations, Apr. 23, 2012. Accessed: Sep. 14, 2026. [Online]. Available: https://www.intc.com/news-events/press-releases/detail/577/3rd-generation-intel-core-processors-bring-exciting
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The politics and possibilities of ‘AI could kill us all’
I found myself fielding a lot of questions from folks who don’t usually talk much about AI this week. They were mostly along the lines of “do you think AI is going to kill us all?” or “how worried should I be about this human extinction stuff?” Motivating this wave of existential anxiety was the highly dramatic resignation of now-former Anthropic employee Jacob Coxon, who quit his job while publicly sharing his concerns about safety practices at the leading AI companies. More specifically, he declared that almost everyone at OpenAI and Anthropic, the leading AI labs, believes that there’s a decent chance the AI systems they’re producing could “kill us all” by the end of the decade, and the companies aren’t “acting responsibly.” Other AI safety researchers, including those still employed at Anthropic and OpenAI, all confirmed that yes, Coxon is correct, they’re all worried that their company’s products might prove fatal for the entire human race as well. Two more AI employees quit and joined the chorus. Now, the warning shot has been covered everywhere from the Wall Street Journal to Fox News to WIRED to the Guardian. I understand why all this sounds scary, but my response to those who have asked, has generally been: No, you don’t need to worry that AI will kill go rogue and kill us all. But that does not mean we shouldn’t worry, period. Far from it. The companies building AI products are now among the wealthiest and most powerful entities in the world. And they very much are building enormous engines of mass surveillance, extraction, and automation. They can and have allowed their AI systems to carry out felony hacks of other companies, provided the government with autonomously generated kill lists, and sold enterprise technology to firms around the world that is explicitly intended to replace jobs. But “AI” has done these things not because they have all-powerful minds of their own but, ultimately, because people have programmed, calibrated, and directed them to. In other words, it’s not AI we need to worry the most about. It’s the people and corporations working to profit from and gain power by deploying it. The technology is sophisticated, sure, and, especially in cybersecurity contexts, potentially disruptive to plenty of existing systems. But if we want to stop this predatory, profiteering, and extractive form of AI—and it’s worth noting that at this point, most people do—we absolutely can. A quick note/plea: I can only do all of this with the support of readers like you, so if you find value in independent, critical tech journalism and analysis, please consider becoming a paid subscriber. I want to keep as much of this un-paywalled as absolutely possible, and I need your support to do so. Many thanks to all who continue to chip in, it’s very much appreciated. Onward. Subscribe First, some context: AI industry folks like Coxon have been discussing the prospect that AI will destroy humanity for years. Even before the beginning of the AI boom, many working in the industry, from the executive staff to the rank and file researchers, have obsessed over ‘x-risk’, or the possibility that AI will become sentient or semi-sentient and move one way or another to exterminate humanity. This is ostensibly why Elon Musk bankrolled OpenAI in the first place, and is the grounds for his lawsuit alleging OpenAI betrayed its charter by abandoning its nonprofit status to become a commercial enterprise. Many AI engineers and startup founders have calculated their own personal p(doom), or the probability that the tech product they are working on will initiate an actual humanity-extinguishing apocalypse. 10-25% p(doom)s are pretty common. (I wrote about a long weekend I spent among these folks at one of their top conferences here, to give you an idea of their ideas and belief systems.) Sam Altman himself drove the narrative of the imminent rise of a super-powerful AI, or artificial general intelligence, to prominence by declaring that the technology he was building posed an existential risk to humanity. This idea is in other words baked into the DNA of modern AI companies and into the products they engineer. It’s also why the industry is routinely accused, by myself and others, of “doom marketing,” ie, using such proclamations and framings to impart the sheer power of the technology behind your product onto investors, partners, consumers, and the state. Some ambient understanding of this tendency may have helped prevent the press from repeating the claim every time one of the x-risk folks made it over the years, including when they quit their jobs at AI companies while doing so. Yet Coxon’s AI x-risk alarm has broken containment, as they say, and has exposed the idea to the mainstream media once again. This has happened, I think, for a number of reasons. First, when AI CEOs were going around saying AI might kill everyone in 2023, their companies were well-capitalized, but not nearly to the extent they are today. They were more easily dismissed as eccentric geeks of the sort that Silicon Valley is supposed to produce. Now, not only do their products have much greater market saturation, but people are more aware of a) the often unethical ways the executives and companies comport themselves b) the other adverse impacts of AI that have already arrived, and c) the physical cost of building these systems, particularly when it comes to data centers. Finally, toss in the constant stream of headlines in 2026 about AI models going rogue or potentially upending the world’s infrastructure. [ ](https://www.bloodinthemachine.com/p/with-the-backlash-to-data-centers) [ With the backlash to data centers, Flock and AI glasses, a mass opposition to big tech is underway. Silicon Valley is in denial. ](https://www.bloodinthemachine.com/p/with-the-backlash-to-data-centers) Brian Merchant · Aug 27 [ Read full story ](https://www.bloodinthemachine.com/p/with-the-backlash-to-data-centers) As a result, general sentiment was already overwhelmingly skeptical of AI and its overlords, so the table was pretty well set for someone to come along and say ‘just a reminder, the companies that are building the product that promises to take your job and leave a data center in your neighborhood also think that it might exterminate the human race’ and get a strong reaction from the media and the public. The question is: Should we understand this stuff as hype, strategically fanned to feed already swelling valuations? Is it doom marketing? Genuine cause for alarm that the infrastructure that undergirds modern life is facing a novel threat vector? Or reason to be sincerely worried that AI companies are amassing too much power, and that their products are genuinely dangerous? The answer, I’m afraid, is “yes.” Let me try to untangle all of this a bit, because arguments over how to navigate this moment are extremely heated right now, as they are essentially arguments over how to approach the politics of AI at a moment where there may be a unique opening for action. Those sympathetic to AI alignment concerns and x risk arguments—which increasingly includes a faction on the left who want to shut down AI over safety concerns—argue that people who dismiss AI as all hype have their heads in the sand. Meanwhile, critics of the x-risk narrative—which I might note includes a cadre of investors and tech folks on the right, too—argue that it is hype and can be used to further inflate valuations or for pursuing regulatory capture. The challenge is that many feel that dismissing AI as just hype or purely marketing also diminishes the urgency of taking on the AI industry as the novel and threat to labor, civil society, and the public sphere it is; others that by accepting the industry’s own terms, we imbue it with undue power and enable it. But let’s be clear: Declarations that AI is so powerful it might end the world are a kind of marketing, and anyone who says otherwise is just as off base as those who say that’s all that it is. If you don’t think that these sub-trillion dollar companies have higher-ups who noticed that when their founders talked about super-powerful dangerous AI they got spikes in media interest and phone calls from investors, or that those founders didn’t notice that themselves, and lean into certain narratives to advantage their products, then I don’t know what to tell you. Not all marketing is a Pepsi ad campaign with a celebrity spokesperson. Yet confronting the AI industry should certainly be considered an urgent project. Do I share the x-riskers’ fear that out-of-control, super-intelligent AI agents might end the world? I do not. I’ve read a good deal of AI extinction literature over the last couple of years and I have not come across a credible, step-by-step documentation of how exactly AI might move from self-recursively improving AI to killing every single human on the planet. Most of what I’ve read seems predicated on a sort of reverse Ian Malcolmian logic: Eventually, it becomes smart enough and AI, uh, finds a way (to exterminate humanity). Are the AI companies also overstating and dramatizing what their products can do? Yes, pretty much all the time. They’re in a knife fight for market share and are trying to win customers and government contracts before their investors come knocking. And yet. They have concentrated enormous amounts of compute, have extensive data collection and surveillance capacities, have inserted themselves into the state in numerous capacities, including military kill chains, and they are being run by egomaniacal billionaires who are rushing to monopolize an entire new market. The way I think about their most recent frightening-seeming exploits is not as a “swarm of rogue AI agents building a new civilization” or whatever, but as corporations with a hitherto-unimaginable amount of compute at their disposal recklessly experimenting with automation programs, completely unafraid of any repercussions because we have been unwilling or unable to impose any on them. So I think we should welcome any newfound imperative to hold them accountable. I also think that ultimately, the AI critics, Pause AI folks, leftists, doomers, effective altruists, and, honestly, most of the public, want a lot of the same things: legitimate checks and limits on AI companies’ power, actual transparency into what the companies are doing, and for more of AI to be under public control. (Ultimately, a lot of what animates the x-risk fears are rooted in just that: a fear of losing control.) How we move towards all this, exactly, is the question of the day, and while there’s much to be argued over in terms of building a viable political platform to challenge the AI industry’s power, I do want to cast a vote against one particular approach. Not to pick on Chris here, as there are a lot of folks out there proposing stuff like this, and the policy ideas actually stem from AI safety groups. But not only would this be challenging to land politically (I can already hear the ‘China will beat us to AGI’ calls) and all but unworkable in practice, this approach is a) far too limiting, b) fails to address the current harms caused by AI and c) would likely only wind up serving Anthropic and OpenAI; it’s what regulatory capture looks like in action. Full model transparency is the floor for what should be on offer here. If these companies believe their products will kill us, the very least we deserve is to know how. It’s in the public interest. I would also argue we might get a lot of the way to stopping any currently envisioned robot apocalypse simply by forcing AI companies to assume liability, and to submit to the full brunt of the law. If Sam Altman were liable to be charged with a felony for approving the hack on Hugging Face1, if Google was forced to pay defamation fines each time it published a false and injurious AI Overviews, these companies might suddenly find cause to restrain their models’ output, and we might hear less about rogue AI. We would need to introduce new frameworks and available tools for tracking automated lawbreaking, to be sure, but I’d wager that little would frighten the AI companies more than actually being held accountable for what their products enable. To that end, Illinois has passed an AI liability law, which the industry fought tooth and nail, and Florida is considering one. The next steps would be towards moving AI under public control; again, it’s only reasonable, since everyone, not just AI insiders, should get a say over how a technology whose developers say might kill us is developed and deployed. Dismantling the whole industrial project as currently structured should be on the table, too, pending democratic input. But that’s for another post. For now, suffice to say that while I won’t be losing any sleep about an AI-enabled extinction event, Mr. Coxon and co. have given us an opportunity to underscore the urgency of the clear and present damage AI companies are doing, the extreme power they wield and the extent to which they hold themselves unaccountable, and the abundance of political capital there is out there for taking them on. Subscribe 1 Purely speculative! I do not know if he did or not.
Health officials see a jump in human rabies exposures and mistakes in treatments, CDC says
Rabies is a viral disease that is practically always fatal but preventable when the proper treatment is given before the patient shows symptoms.
Health officials see a jump in human rabies exposures and mistakes in treatments, CDC says
Rabies is a viral disease that is practically always fatal but preventable when the proper treatment is given before the patient shows symptoms.
Health officials see a jump in human rabies exposures and mistakes in treatments, CDC says
Rabies is a viral disease that is practically always fatal but preventable when the proper treatment is given before the patient shows symptoms.
Health officials see a jump in human rabies exposures and mistakes in treatments, CDC says
Rabies is a viral disease that is practically always fatal but preventable when the proper treatment is given before the patient shows symptoms.
Ebola outbreak in DR Congo expands to new health zone, bringing total to 61: WHO
6,757 confirmed cases reported in 6 provinces, with 3,267 deaths, says agency, adding case fatality ratio at 48.3% | Anadolu
When the call involves a mental health crisis, Bridgeport sends more than police
The fatal police shootings of two Hartford men during separate mental health emergencies earlier this year put a spotlight on how Connecticut law enforcement agencies respond to people in crisis and the role mental health professionals can play in those encounters.
27-year-old man fatally shot inside Detroit business on Woodward Avenue
A 27-year-old man was fatally shot inside a business on Woodward Avenue in Detroit.
WIS360 Top Stories for Tuesday, September 8th: Health Alert: Farm Fatality report
Health Alert: Farm Fatality report
Scientists Uncover a Surprising Gut Connection in Fatal Asthma
The lungs may not be where a fatal asthma attack begins.
Phoenix family says call for help during son’s mental health crisis ended in fatal police shooting
Phoenix family says their call to police for help during their son’s mental health crisis ended with him being shot and killed by officers.
CPS report details mental health concerns before Marlene Vidal was charged in children’s deaths
A newly released Child Protective Services fatality report offers new details about concerns involving Marlene Vidal’s mental health and stability in the year before she was charged with killing her two children and setting a car on fire with them inside.
San Jose Police Arrest 3 Adults and 5 Teens in Connection with Fatal Shooting near World Cup Entertainment Zone
Six of the suspects, including a 17-year-old juvenile, were charged with murder, while two others, including an 18-year-old female, were arrested for being accessories after the fact. All are from San Jose.
Nine-year-old boy hospitalized with brain-eating amoeba, health ministry says
The boy is sedated and on a ventilator at a Haifa hospital. The rare infection has a 97 percent fatality rate, according to the Health Ministry
Letitia James’ Times Square shooting probe draws GOP criticism over New York’s mental health crisis
Saritha Komatireddy proposes a new Office of Civil Commitment after the Times Square fatal stabbing, saying New York fails mentally ill people.
RFK Jr. acknowledges one measles death in Pennsylvania
Secretary Robert F. Kennedy Jr acknowledged the infant's death but suggested the federal government would not yet recognize the fatality in official data.
Kennedy acknowledges one measles death in Pennsylvania
U.S. Health Secretary Robert F. Kennedy Jr acknowledged on Friday that measles caused the recent death of an infant in Pennsylvania, citing information from a county coroner, but suggested the federal government would not yet recognize the fatality in official data amid a fast-growing national outbreak.
Epinephrine injection recalled over potentially fatal health risks
Consumers, retailers and health care facilities should stop using the product and discard or return it, the FDA said.
Epinephrine injection recalled over potentially fatal health risks
Consumers, retailers and health care facilities should stop using the product and discard or return it, the FDA said.
Epinephrine injection recalled over potentially fatal health risks: FDA
Consumers, retailers and health care facilities should stop using the product and discard or return it, the FDA said.
Cyclosporiasis outbreak exposes a weakened US public health system
The parasitic disease causes explosive diarrhea, abdominal pain and fatigue but is rarely fatal.