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Mississippi Medicaid open enrollment underway as members review health plan options
Mississippi Medicaid members have until Dec. 15 to review their health plan options, including a newer choice offering benefits beyond traditional medical care.
Sundar Pichai: Google’s Frontier Imperative, Compute Scarcity Dilemmas, Future AI Products and Businesses
Alphabet CEO Sundar Pichai has little patience for doubts about Google’s willingness or capacity to compete at the frontier of AI. His company’s latest Gemini 4 Argon model — long-promised and recently delivered — beats OpenAI and Anthropic’s latest public models on coding, math, science, and knowledge-work benchmarks and has placed Google’s AI back among the world’s best. Amid chatter that Google was fine with good-enough lightweight ‘Flash’ models, Pichai pushed back hard against any suggestion that company is limiting its research ambitions. “We won’t do it any other way,” he told me in a Big Technology Podcast interview recorded this week at Google’s Mountain View headquarters. Pursuing cutting-edge research is costly for Google, requiring compute and chips that otherwise could be sold at a high markup by its cloud business. But Pichai said allocating resources to frontier AI development is “ground zero” for Google. “Our cloud business is at any given moment in time forgoing short-term revenues because we are making compute trade-offs to support frontier AI development,” Pichai told me. In our conversation, we discussed Argon (which Pichai says processed three times as many tokens as Gemini 3 in the 72 hours after launch), AI’s role in developing better models, the AI interface of the future, competition with OpenAI, Google’s partnerships with Anthropic and Apple, data centers in space, and the nature of his optimism. You can read the full conversation, lightly edited for length and clarity, below, or listen to it on Apple Podcasts, Spotify, YouTube, or your podcast app of choice. Alex Kantrowitz: Google is back at the frontier with Gemini 4 Argon, which beats OpenAI’s and Anthropic’s public models on benchmarks spanning coding, math, science, and knowledge work. The conventional wisdom was that Google had given up on the frontier to focus on fast, good-enough models for its products. That was wrong? Sundar Pichai: Very wrong. Look, we are so committed to being at the frontier. It’s in our DNA. We won’t do it any other way. We’ve been thinking about the AI frontier for well over a decade now. The frontier is very dynamic. It’s very competitive. It’s very exciting. I couldn’t be more pleased with how Argon has come together. We took our time with it. We made sure we tested it safely and deployed it carefully. We took a bit longer than our other models, given its capabilities. Across the board, be it for agentic work, knowledge work, coding, creative tasks, Argon is one of the really good frontier models. The first 72 hours since we launched, it’s almost up to 25 trillion tokens used, which is about three times what Gemini 3.0 had in the first 72 hours. And we are capacity constrained as we are serving it. Excited, but there are always areas….. You know, the frontier is very dynamic, and you have to keep evolving the models. There are areas which we can see we need to improve as well. We’ll be at work on all of that as well. Which areas? On any given model, Argon would be across the board better at everything if you just look even two months back. But the space is so evolving. Even on coding, for example, there are pockets where we know we need to do better, and there’s clear feedback. We’ll make it better. The argument for standard models is that they’re already good enough to build great products, with the frontier valuable only for certain tasks. Meta built Muse with good models rather than the best, and Google could put standard models into Maps, Gmail, and Search. Why isn’t that sufficient? It’s definitely not how I have thought about it at all. We are deeply committed to driving the state of the art and actually pushing where this technology can go, all the way from transformers. That’s a journey we’ve been on. You will see us continue to do that. When you’re at the frontier, you get an earlier look into the emerging capabilities, earlier than others, which helps you better prepare for the future. We are fortunate to have a wide set of opportunities across consumer and enterprise. Some of our cloud customers, for sure, want the model at the frontier. The frontier models will be better at developing the next set of models in an era of recursive self-improvement. I would argue it matters there. Internally, we have definitely seen a steep point of inflection by deploying Argon to our developers. It definitely tackles problems which our previous models could not do. Being at the frontier puts you at the innovation frontier and helps you drive that as well. There is room for models of all sizes and capabilities. That’s why we did Flash, Flash-Lite, etc. I agree with you that you can develop very good product experiences with not necessarily the most frontier model, because they tend to be slower and more expensive too. But we care about the Pareto frontier, and we’re committed to doing all of that. You said developing frontier models gives you a look at what’s coming. What do you see on the horizon? What makes this moment so exciting is you build something which you think is a culmination of months of work, and you put it out. You already see clear headroom ahead. We’ve all been working on these agentic, long-horizon capabilities, but clearly the frontier is going to have multiple of these agents working together to do things. That’s an example of an exciting paradigm underway. It’s also clear to me that users, both in consumer and enterprise, will have access to some multi-agent framework for them, working all the time doing things. It feels like a moment of infinite possibilities. Sergey Brin said one of Argon’s core innovations was relying more on the model to help develop the model. Yet incidents involving OpenAI’s bots breaking containment and Google’s bots accessing a site they shouldn’t have suggest these systems still aren’t perfectly aligned. Isn’t there reasonable cause for concern about accelerating toward recursive self-improvement? There are three parts to your question. Let’s first talk about RSI itself. You’re right, Sergey mentioned RSI being a critical contributor as we are developing Argon. But to be very clear, today, in a continuum, we are pretty far from the end state of RSI or something like that. The right way to describe it is you have RSI loops along with AI researchers in various aspects of model development. You almost have agents helping AI researchers in some automated way work together to build these models. It’s good to at least understand where we are today, and it’s super exciting. I expect that continuum to keep making progress as we go into next year. The second question is around safety. Security comes from defense in depth. You’re talking about alignment, obviously. We all are doing a lot of work to make sure the models are as aligned as possible. But it’s an active area of research, and there are clear gaps. That’s not the only thing we rely on. You have the work you do on alignment, but beyond that, we put a lot of effort into real-time monitoring as these models are working. Making sure you have good telemetry into what’s happening so that you can intervene in real time if you see unexpected behaviors. How you do that, the architecture with which you do that, how you make sure it’s all sandboxed and isolated in a way that it can continue doing its job during real-time monitoring — these are all areas of investment. Obviously, when we deploy these models, giving customers, enterprises, control, both with real-time monitoring, but their ability to decide where they deploy, what type of data which models ever have access to, etc. All that work is very, very important, and we are doing a lot of that. As an industry, we need to constantly up our game and take the time to do all this stuff, including dedicating the compute required to make sure you can safely deploy these models. The third part is: Is it all enough? This is why there are a lot of conversations in the industry, and I think it’s reasonable to be worried. The right way to approach something you worry about is early on thinking about what more we can do. As an industry, you’re definitely seeing increased levels of work on alignment, testing for safety, etc., as we deploy these models. The next step would be developing better standards so there are cross-industry standards of how we do these things, including the ability to evaluate using independent evaluators. If you look at areas like financial controls, we have accounting standards, we have independent auditors. Those are all the next natural steps for us as an industry to work toward, and regulation will end up playing a role as we go through all of that as well. Google pursues both language models and world models, while some other AI companies like OpenAI have focused more heavily on LLMs as the path to AGI. Why is world-model research important to you? As humans, you obviously perceive the world around you, and you’re taking all those inputs. Making sure these models are able to understand the laws of physics, simulate the world in high fidelity. All that, I think, are key enabling blocks for intelligence. We are working across all possible applications of this. Take an area like robotics. It’s not an accident: If you look at embodied reasoning benchmarks, Argon is state of the art. That all comes from our experience building world models. Inherently, I would expect there will be architectures which will converge all of this in the future. But for us, we view this as, today, this jagged frontier that is intelligence. We want to be at the frontier of all the possible approaches, and that will help us both drive better research, better insights, and develop a much better AGI model, is how we think about it. Some people argue Google should focus on selling its computing resources rather than using them for AI research. Cloud wants to sell compute at a high markup, while researchers need a very big computer to build the best models. How do you balance those demands? Ground zero for us is making sure we are investing in the compute that’s needed to be at the AI frontier. In 2015, I set the company to be AI-first. AI is that key horizontal ingredient across everything we do, all the way from Search to Cloud to Waymo. That is ground zero for us, making sure both for research and developing the models that we have enough compute needed. Beyond that, we have these independent businesses which each have their own long-range plans. They’re using those long-range plans to project forward, and we plan for compute for all of them. The cloud team, they have a business and they have a projection and they have demand signals. They have committed contracts. With that help, we can plan on a long-term compute trajectory for them. We’re fortunate to have this wide set of opportunities. There’s no company in the world which isn’t making trade-offs at any given moment in time. But the first principles we operate on is making sure we have enough compute to invest in the frontier, and that’s non-negotiable, and everything else works on top. Remember, we are building our own compute, our own data centers. There are long lead times. The compute we have today is a function of decisions I made in 2024. Even if you think back to a year from today, last year the agentic coding takeoff hadn’t happened. Today, obviously, when you sit and look at anything, everyone is short—not just us, other companies—and everyone wishes you had two times what you had planned for. That comes with the territory. At any given moment in time, we are planning for what we would need two to three years out in the future. You’re going to find some decisions you make may look suboptimal two years out, depending on where the state of the art is. I don’t spend too much time thinking about it. The way I think about compute allocation is making sure Google DeepMind, both for research and frontier model development, is cutting edge in terms of compute access. After that, we plan for all our businesses. It’s great we can provide our compute to other people too, like we have done. It allows us to scale that up, get real tests for it in the widest application set possible, test it in the real world, and make sure we are at the cutting edge of technology at every layer of our AI stack as well. Ben Horowitz relayed on a podcast that Andy Jassy had said compute was sold out until 2028. Are you seeing the same thing? If today a customer is coming out and asking us for compute in ’27, that is incredibly difficult to do. Even last year we went out and leased some short-term compute to accommodate some customers and help them out. But yes, we are all dealing with similar timelines. Every major technology shift seems to involve overbuilding, from railroads to fiber. Do you think that’s happening here? It depends on the time frames you’re looking at. This level of build, if I take a long enough time frame, it makes complete sense to me. We are at early stages of the most consequential technology ever, and this is not like fiber. It’s not dark. We are using it. We are capacity constrained on a daily basis. The applications, the underlying technology is improving rapidly. But running a company, the way I work through the moment is you look at your demand signals. You look at your committed revenue opportunities that you’re getting in the form of contracts. You balance that with the underlying technical capability, or internally you balance how we are using it internally, the model trajectories. Based on all that, you take a disciplined approach—a confident, aggressive, but disciplined approach—to plan out compute. But when you talk about the broader economy as a whole, you’re having people operate with various levels of risk. I focus on what I can control as a company and plan through it. If your question is, can there be an overbuild? Yes, because you can have some constrained components. Remember, what matters is a set of everything you need to build out that compute. Memory, electricity, electricians…. Land. Like 2,000 components or more. You could get constrained at some point. There could be things which cause bottlenecks, and then you could have overbuilds. There could be external shocks to the economy. There are macro risks. All that is possible at any given time. But am I confident that the compute we are planning for, we will have uses for it given enough time? Absolutely, yes. I was in the room when you said AI would be as profound as fire and electricity. If you believe that, shouldn’t you give researchers the biggest possible computer, even at the expense of today’s cloud profits? We’re all doing some form of that. Our cloud business is at any given moment in time forgoing short-term revenues because we are making compute trade-offs to support frontier AI development. What you’re seeing is true already. But you want to be thoughtful. Even our AI researchers have some constraints, which are also good. That’s what inspires creativity. That’s what helps you come up with a more efficient algorithmic breakthrough, maybe to use less memory. What we are committed to is to invest what’s needed to stay at the frontier. OpenAI President Greg Brockman told me a few months ago that the ideal AI product might have no interface at all—just as natural as conversation. What do you think the interface looks like in the age of AI? Computing historically has been humans adapting to computing. With AI, it’ll be the other way around. The technology will adapt seamlessly to how humans live and go about their day-to-day life. You want to be able to speak to that AI when you want to. It has context. It can be persistently running somewhere, give you continuity. You’re not dealing with a lot of complexity. It’s natural. All that makes sense to me. That doesn’t mean it won’t have any interface, however. Nowadays, even on my phone, Gemini voice models are so good. I can just press the microphone button. I can just ramble. That’s why we call it Rambler. I can ramble. It intelligently corrects with my personal context. Even my friends’ names, weird names, it gets it right, even if it first guesses it wrong. It’s amazing. I’m not going in, backspacing, editing once I finish saying it. It’s remarkable how good it’s gotten. But there are going to be moments you will need an interface. You may want to entertain yourself. You may want to watch a video. You may ask your AI to create something, and you want to watch it, consume it. The way I think about it is, you want it to be as seamless and as natural as possible, and that you are not doing the hard work adapting to whatever the interface is. The technology is adapting to how you’re working at any given moment in time. When I asked Sam Altman about competition from Google, he argued that OpenAI was building AI-native products and implied Google was bolting AI onto existing ones. Do you accept that framing, and can a “bolt-on” compete with an AI-native product? First of all, it’s a very dynamic moment. We are all pushing each other. OpenAI has pushed us as a company too. This is not just we are doing something to them. Far from it. Yes, Google went into its own version of a code red too. In the AI moment, all of us have to respond with varying levels of urgency at any given moment in time. We are constantly building new products as well. Gemini was built from the ground up as a product—the Gemini app I’m talking about. Or tomorrow, as all of us are adapting to agents, are you bolting agents onto ChatGPT, or are they building it natively? How would you think about that? You can always put these questions back. I don’t think of it that way. I think of it as you want to build world-class product experiences that are AI-native and they are winning. Some of it is adapting products, some of it is rethinking new experiences. They will all be part of how you approach this moment. How do you expect to make money from these AI interfaces? If an agent recommends a product and I buy it, should it take a cut of the sale, even if that’s disclosed? I’m going to put enterprise aside. Consumers are going to increasingly value this technology. Take software developers today. Developers are willing to pay for these coding models because it really helps make them more productive. Nobody would want to code the way they were coding three years ago, or even the same time last year. When you’re delivering value, there’s value to be had. I’ve never seen examples where consumer products really scale to billions of users, where people are using it intensely, and haven’t had monetization to go along with it. If you’re providing value to people, there is inherent value to be had. The nature of it may change. You’re asking a scenario in which agents are doing stuff for you. At the end of the day, you will have commercial needs. The agents need to fulfill those commercial needs. The providers on the other side are going to see value in that. There’s going to be some mechanism by which it gets fleshed out. That’s what an efficient system does. But what matters is that you’re building those world-class consumer experiences. I promised myself one product feature request: Can you make Gemini-powered search in Gmail as good as searching Gmail through ChatGPT? What’s going on here? One of the exciting things we announced recently is the unified Gemini agent for enterprise, and we’re bringing that to consumers. These are persistent agents which run 24/7 in the cloud. We’re spinning up a micro VM effectively for every query, and from the runtime, the harness, the model—it’s all a headless service. It’ll work everywhere, and it has your context with you. You can address this agent whether you’re in Workspace, in Search, in Gemini. Agents are going to drive this unification from a customer experience, which people are looking for. When you have a broad product portfolio and you’re moving forward fast, there are always areas where you’re moving forward faster than some other areas. That’s valid feedback. But we are putting a lot of time and effort into making sure, as we build out our agentic experience, that unification and that capability works well across all these services. People have asked where Google’s equivalent of Muse or Dots is. Do you anticipate creating a new product to compete with them? Our goal with Gemini is to be a personal, proactive, and powerful assistant. That’s what we are working toward. You saw us describe the early versions of it at Google I/O this year with Spark. Effectively, already, if you open the Gemini app as a Pro or an Ultra user, you see Chat and Task, and they start giving you that agentic experience. With Argon now, that capability is dramatically accelerated. What we announced recently in our enterprise event, we are bringing that to consumers as well. Soon in Gemini, you will be able to ask something, and it’s a continuum. You don’t need to think about whether you’re asking a chat or an agentic task. It’ll just automatically do the right thing, and it can work persistently in the background securely and get things done for you. Already, empirically, when I look at what’s coming into Gemini in our app, last year you would have tagged them and most of them would have been chats. But a steadily growing percentage is already agentic tasks in Gemini. Yes, we are going to bring personal agents to our consumers. It’ll work in the Gemini app. It’ll work in Google Search. It’ll work in Gmail. You can address it, call it, etc. We want to make sure we’re getting it right. It’ll be powered by Argon, and we are very excited to bring it to our users. Google has invested and committed tens of billions of dollars to Anthropic. What do you see in Dario Amodei that makes you want such a deep investment and partnership? Very early on, when we looked at the founding team of Anthropic, it was very clear to us this was a world-class team which was involved in some of the earliest GPT models. We were quickly able to assess that they would be at the frontier. We’ve always tried to identify and partner with companies which would be at the cutting edge of technology. We’ve done that with SpaceX. We’ve done that with Anthropic. That’s what we saw, and we had a chance to partner. Is your partnership with Apple to license Gemini for Siri expanding, contracting, or standing still? For both us and Apple, that partnership was about translating the capabilities of AI into better experiences for users. I thought Apple has done a phenomenal job of incorporating—they customize these models and build it into Siri—and it’s been great to see the reception. We are committed to doing more. You’re going to do more with them? There’s nothing specific to comment, but it’s a partnership. It’s working well. What have you learned so far about the feasibility of data centers in space? It’s a very exciting project. Projects like this remind me—I still recall that moment in the desert for the DARPA Grand Challenge, watching the Stanley car compete in it, which ended up being the basis for Waymo. With all these technologies, you’re at a moment in time where it looks a bit like sci-fi, but 10 to 20 years down the line, it’s actually working in a meaningful way. I feel the same in space. We’ve always believed in betting big on these technologies. Quantum has been a great example of it. We’re probably 10 years into the journey. Waymo, we are almost 20 years into the journey. Space, we are two to three years into the journey. It’s clear to me that it’s an approach which will make a lot of sense in the future. Being in sub-synchronous orbits with 24/7 access to the most abundant form of energy we have access to will make a lot of sense for this exponential increase in compute that we are going to need. Having said that, this is a challenging project. The team has disciplined milestones. It was a super exciting milestone to send the TPUs up to space. Sometime, as we are speaking, we are expecting a “hello world” moment from them. I look forward to seeing that happen, and we’ll continue investing here too. You previously said 25% of the code written within Google was written by AI. What’s the number today? That number in our world today is meaningless in the sense that every part of what we now touch is influenced by AI deeply. What we are tracking with Argon, for example, it’s been a point of inflection. People are using Argon to really go tackle complex projects, including projects which affect millions of lines of code. In the four weeks since we have launched Argon, we have seen a 30% increase in CLs, and more importantly, almost a similar increase—a one-third decrease in rollbacks. People are writing code more productively and better code with it. We are tracking it with newer metrics now. How are you dealing with opposition to data centers? If you can’t build in the U.S. the way you want to, where else do you go? We’re very committed to building our data centers very responsibly. When I look at our largest data centers in some of the communities where we have been the longest, I visit them, I talk to people. There are people who come and tell us their kids have gone to college because of our investments in these communities, and we’ve grown in those communities. To me, this is about doing it right. Engaging with the communities early, doing it transparently. We are committed to making sure we are bringing incremental power, and we cover 100% of the cost of our power needs for these projects. It’s understanding the impact on neighborhoods and making sure you’re working thoroughly to address them. Done rightly, you can continue making progress. But we are constantly taking feedback into account. I do worry not everyone operates the same way. People have been surprised by data centers showing up in their backyard. Those are all important. As an industry, we should continue to do better. But part of the reason, in a 20-year time frame, we are thinking about things like data centers in space is making sure we are able to put these data centers where maybe the trade-offs will be different. What unproven area of AI is Google working hardest to crack? Is it continual learning—getting models to keep updating after release—or something else? There are multiple parallel paths. You saw with Argon we have a million output tokens. With our Gemini models early on, we had a one-million context window on the input side. These are all examples of breakthroughs we are constantly working on. How do you think about synthetic data? How do you think about continual learning? How do you think about more efficient architectures? We do dedicate a meaningful percentage of our compute to these research bets too. It always goes hand in hand, including our world models. Those are all bets we are placing. Sometimes, as part of these bets, there are ideas that emerge which just make their way into the mainline models. Maybe we don’t fully talk about it, but we have multiple steps in these areas. Working in technology requires optimism that building something will improve the world, but those bets can leave real consequences when they fail. I recently returned to a town in El Salvador where enthusiasm for Bitcoin had given way to unfinished construction and something resembling a ghost town. How do you maintain the optimism you spoke about in your Stanford commencement address while accounting for those risks? I genuinely have a deep conviction that improving technology and improving access to technology makes people’s lives better. It’s been my personal experience in my life, out of which comes that deep conviction, optimism. But with that, I’ve always felt humanity’s journey is always about working hard to harness that technology to make it work well for society. The optimism is not an optimism that you just build whatever you want, whenever. You work hard to make sure you’re building technology in the service of humanity, to make the human condition better. That’s got to be the defining goal as we are approaching it. With that framework, I’m very, very optimistic. We are in very early stages of the kind of progress that we are going to see on many areas. We’re all talking about areas like healthcare. A lot of the progress is ahead. The ability to make things in a fundamentally cheaper way on many things where things have been getting expensive for a long, long time, discovering new materials, etc., which really bend the curve—it’s tough to step today and understand the impact of all that, but they’re going to be very profound. I’m very optimistic, but we have to be rightfully concerned about all the ways this technology can go wrong. Sundar, I know you don’t do many of these. Thank you. Thanks, Alex. Appreciate it.
iOS 27's new CarPlay features are great, but only these iPhones can actually use them
With iOS 27, car owners with CarPlay support can enjoy lots of cool new features. The problem is, only the iPhone 15 Pro and newer can support them all.
Can AI solve our mental health access problem?
Last week I asked you what worries you most about AI in health. It was close, but your top answer was “AI giving bad health advice.” Last week’s poll results: You’re in good company. This concern was top of mind at a conference I joined at Stanford last week, where researchers, clinicians, and people who build AI systems spent a day debating trust and safety in health AI. Stepping back, I’m also hearing your emerging concerns about AI’s impact on our well-being generally. I see this as a matter of public health, and we’ll take it in pieces as we learn together. Today we’ll focus on AI chatbots used for therapy for mental health. Early this month, Governor Newsom vetoed Senate Bill 903, California’s most ambitious attempt to regulate AI use for mental health. It’s at the center of active debate, and raises the questions patients, family members, citizens, and voters will face as AI moves deeper into health care. Let’s work through it. What is “AI-based therapy”? It’s really two things: purpose-built mental health apps designed to deliver structured support, and general chatbots like ChatGPT, Claude, and Gemini that people increasingly use for emotional support—even if they weren’t built for it. Spoiler alert: I don’t know whether the shift toward AI therapy is good or bad. The evidence isn’t there yet. But I do know it’s already happening, and I have some ideas about how we can roll it out with safety in mind. The therapy dilemma, in a nutshell Mental health challenges are common, and strain health and well-being across populations. Therapy (interactive dialogue with a trained, empathetic practitioner) helps many people heal. The demand for licensed therapists far exceeds the supply in California, and AI-based therapy can narrow that gap. AI-based therapy remains novel, unproven, and not well tested. Right off the bat, we can see we’re dealing with trade-offs here. Since the main driver of demand for therapy from a robot is lack of access to therapy from a human, we’ll start there. It’s too hard to find and afford a human therapist California is short roughly 55,000 licensed, non-prescribing therapists and counselors, about 40% of what we need. Psychiatrists, who rely on talk therapy as a complement to prescribed medications, are even more scarce. Eight counties have none, and density ranges from 1.7 per 100,000 residents in San Benito County, to 68.1 in Marin County. My wife is a psychiatrist in Marin, and even here access is tight. If it’s hard in the best-supplied county, imagine rural Sierra County, or the San Joaquin Valley. In 2024, more than half of Californians who tried to make a mental health appointment struggled to find a provider who took their insurance, compared with 14% for physical health care. When Senate staff posed as “secret shopper” patients and called 120 mental health providers in Medicare Advantage networks, they landed an appointment less than once for every five tries. Insurers pay behavioral health clinicians about 22% less than medical and surgical clinicians for comparable office visits. On top of that, billing denials and prior authorizations hit hardest at the solo and small practices common in mental health. Psychiatrists opt out of Medicare at the highest rate of any specialty. In many places, a cash practice for therapy fills quickly with patients paying $250 or more an hour, with no insurance paperwork at all. Families who can pay cash find providers more easily. Those who rely on insurance, including Medi-Cal enrollees, older adults, rural residents, and non-English speakers, compete for what’s left. So we can’t pretend the human system works, and we can’t blame people for turning to AI for support when they’re in distress. AI is filling the gap It’s estimated that roughly a quarter of AI users use it for mental health support. If you have internet, it’s available 24/7, it’s cheap, and it speaks your language. Uninsured adults are about twice as likely as insured adults to do it (30% vs. 14%). It feels anonymous in ways that may enable people to ask things they’re unsure or embarrassed about. The largely hidden, personal use makes it hard to study whether it’s actually helping people with their mental health issues, but researchers are trying. Does AI therapy work? A 2026 analysis of nearly 40 randomized trials found chatbots showed a real but small reduction in depression symptoms. But most of these trials were compared to an alternative of no therapy, not a human therapist. So the benefit of AI therapy is probably real, but modest, and mostly untested against the alternative of human contact. We need more studies. Serious concerns OpenAI’s own estimate is that more than a million ChatGPT users each week show signs of suicidal planning or intent. These are high stakes encounters, and AI doesn’t always get it right. That’s partly because a chatbot can sound like a therapist, but it has no license, no duty of care, and it’s not clear who to hold accountable when it gets things wrong. AI is also designed to help users in whatever task they’re seeking to accomplish. People may feel like they’re getting therapy, but they’re mainly getting a convincing conversation. It’s easy for an AI companion to wander into gray areas, like playing along with “creative writing” that may be about the user’s own suicidal intent. Courts are driving safety conversations A wave of lawsuits have been filed on behalf of families claiming that chatbots pushed people they loved toward self-harm, including teens who died by suicide. The first settlements came this year. OpenAI is headquartered in San Francisco, and dozens of cases alleging that ChatGPT drove users to suicide or self-harm are now before a San Francisco judge. Character.ai has filed for bankruptcy after several states brought lawsuits accusing the chatbot of pushing dangerous content to kids. But the technology seems to be improving. Last month, an independent evaluation found that newer AI models “almost never endorse suicide.” That’s progress, but our societal appetite for even one preventable death is very low. So how do we move forward? Finding a middle ground Earlier this month the governor vetoed Senate Bill 903, a bill designed to place guardrails on the use of AI for therapy. The bill would have prohibited any AI-based platform from being advertised as psychotherapy, and would have required a licensed professional to review and approve each encounter where AI was used to support therapeutic decisions. Newsom called it overly broad, since even routine screening questions would have needed clinician sign-off. Knowing we’re already short on mental health providers, requiring human review of AI encounters may not relieve our access problems. Still, the answer isn’t no oversight. Here’s one feasible short term solution. Rather than reviewing each encounter, a licensed clinician can design the guardrails: what counts as a crisis, what triggers an immediate handoff to a human, and what gets sampled for audit each month. The AI runs inside that structure. Conversations get checked, failures get reported, and a real clinician owns the framework. Medicine already has models to learn from. The FDA process for rolling out newly approved medications is an example. After a product reaches patients, we keep watching for adverse events. Patient-facing AI needs the same “digital pharmacovigilance”: systematic tracking of harms, near misses, and the types of groups that get hurt and why. It’s also critical that users know that they can reach a human if they’re in crisis. Most chatbots now include messages like these: Bottom line The rush to use unproven AI tools for mental health support is mostly a workaround, a sign of a health system people can’t get into. We need better access to proven care from licensed clinicians. That takes reimbursement that makes accepting insurance viable, and a bigger workforce. But, built and tested well, AI could be part of the answer. It could be the 2 a.m. check-in when no one else is awake, or a way for patients to practice skills their therapist taught them. It could be the first step to get someone the right level of care, and take paperwork off clinicians’ plates so they spend more time with patients. None of this is simple. The SB 903 veto doesn’t end the debate, and the legislature will be back. In the meantime, those of us using these tools need to stay informed, ask hard questions, and hold the companies building them accountable. I’ll try to do my part, and we’ll keep learning together. Love,Matt P.S. If you or someone you know is struggling with mental health challenges, emotional distress, substance use problems, or just needs to talk, call or text 988- you’ll reach a real person— or chat at 988lifeline.org 24/7. Dr. Matt Willis is the author of Your Local Epidemiologist in California. A California native, he’s served as a primary care physician, CDC epidemiologist, and public health officer for Marin County, where he guided the pandemic response. He lives in Marin with his family and their dogs, Teddy and Ramona. Thank you Cynthia He, MD, PhD, and Parnika Saxena, MD, for their guidance in preparing this article. Cynthia works in an outpatient mental health clinic, treating patients who have Medi-Cal or, sometimes, no insurance. Parnika works in an inpatient psychiatric unit, treating patients with public or private insurance or self-pay ability. All opinions are their own and do not represent their employers.
Retiring from Farming
Start now to ensure your farm passes to the next generation Deborah Jeanne Post [caption id=attachment_11062 align=alignright width=405] Adam C. Howell, outreach director at Cornell’s NY FarmNet: “Retirement from farming is atypical planning,” he says.[/caption] Roughly 70% of family-owned farms will transfer ownership withing the next two decades, according to data from to the USDA census. Only 30% of those will remain in the family. The number of farms in New York is shrinking as the size of farms increases. In other words, there are fewer farms in the state, but they’re much larger. This is why succession planning is so important for family farms. A farm represents not only a way to make a living but a legacy and family tradition. Many families want to preserve the small farm segment of agriculture and the values it represents. Passing the family farm to the next generation can’t be left to chance. And it shouldn’t be left for “the kids to figure out” after the older generation dies. Succession planning in agriculture isn’t like other types of business retirement planning or personal final planning. “Retirement from farming is atypical planning,” said Adam C. Howell, outreach director at Cornell’s NY FarmNet. “Most farmers, their assets and the way they live and survive in retirement is tied up in the equity in the farm. Those conversations must take place a lot earlier than they think. They’re dealing with something asset-heavy that may require a trust and tax planning.” NY FarmNet offers farmers free, confidential consultation services regarding financial and business management, and family, and mental health support for farmers in New York state. It’s a program of Cornell University in Ithaca. Howell urges farmers to begin the conversation early. Most family farms are run by generations with the oldest generation most involved and typically with fewer of the middle-aged adults and young adults involved. Some of the younger generation may have off-farm jobs and not live on the homestead. “Different people have different expectations on their legacy,” Howell said. “Intergenerational conflict and discussions can be difficult. It may be good to check with NY FarmNet or Ag Mediation to help mediate these conversations with a third party. A lot of farms have broken up because people can’t decide how to divide things.” New York State Agricultural Mediation Program is a USDA‑certified, free or low‑cost service for farmers. Fair is not always equal. A sole owner simply stating that he wants to divide things equally among his children may leave one-quarter of the farm operation to an adult child who moved away and hasn’t sat in a tractor for decades. The three adult children who have toiled on the farm for 30 years may need to buy out the fourth, non-farming sibling but cannot because all of their money is tied up in the equipment, land and stock that supports their livelihood. Their payrate may not allow them to set aside much to buy out the non-farming sibling. As a result, they may need to sell parts of the farm off in order to keep it. However, doing so may limit their ability to sufficiently support their families. The farm owner may need to bequeath more assets to the farming siblings because their efforts have kept the farm going and without those assets and their work, the farm will cease operations. Howell advises seeking professional help on tax and legal issues. Without it, families can be exposed to expensive problems and infighting. A third-party expert can help farm families navigate what is truly fair in the family’s succession plans. Beyond the practical aspects of inheritance, succession also relies upon planning who will operate the farm and how. “I think it’s important that farmers understand the means and methods of farming are always changing,” Howell said. For example, many young adult farmers earn a degree at a school such as Cornell, SUNY Cobleskill or Morrisville, work on a different farm for a while and then return to their family farm with big ideas on how to improve the farm — if only their dad and uncles will agree. Intergenerational conflict is often centered on newer ideas such agritourism, online marketing and shipping goods. “It causes conflict,” Howell said. “A lot of it comes down to communication and respect within the family. If no one in the family wants to take on farming, what we’ll see is older farmers start to help trusted managers buy into the farm.” The middle-aged generation, now in their 40s and 50s, often struggle with wresting the helm from their parents. Howell said that many older farmers don’t discuss with their grown children their vital business information such as vendors, ordering supplies, pricing, recordkeeping and farm planning. They even claim that “the kids” aren’t ready yet. These gaps in cross-training may cause significant problems even before the older generation dies, if there’s an illness or injury. Howell urges farmers to document these processes and cross-train others on the farm how to handle these areas “to make sure if one person is incapacitated, the entire operation is not at risk,” he said. Mark Modzeleski, financial adviser, financial planner and president at Legacy Wealth Advisors of NY in Syracuse, advises families to talk sooner than later about who should be operating the farm. “Someone is driving the farm,” he said. “Have you decided who? Be honest when you have that conversation. Who do they turn to when there’s a question? Or who has the potential to be leaders?” Planning for leadership continuity is vital. Unfortunately, talking like this can become fraught with emotions if it’s only the family involved. Modzeleski advised finding a third party who can help drive the conversation. “Invite the right people to the conversation who can get you from point A to point B,” he said. “This is a marathon, not a sprint.” It may take sitting down a few times with an estate planning attorney who specializes in farm transition, along with a tax professional and others who can help moderate and plan. Family members, owners and possibly, integral farm managers should attend the meetings. “Figure out what you want your legacy to be,” Modzeleski added.
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Bishop’s computer science chair says AI is eliminating ‘grunt work’ and reshaping digital jobs
Dr. Russell Butler, chair of Bishop’s University’s Department of Computer Science, says artificial intelligence is increasingly taking over routine digital “grunt work,” changing the skills students and workers may need in the years ahead. Photo courtesy of Bishop’s University. Click here to read our platform! Get local news like this every morning. Subscribe free below. Subscribe Pulse Newsroom Artificial intelligence is already taking over some of the routine digital work once performed by entry-level employees, according to Bishop’s University Computer Science chair Dr. Russell Butler — a shift he believes will make expertise, judgement and the ability to evaluate AI-generated work increasingly important. Butler described the change as automation reaching what he calls the “bottom of the cognitive pyramid” during an interview with The Pulse about AI, university education and the future of digital work. His argument is not that humans are disappearing from the workplace. Instead, he sees their role changing as AI becomes capable of handling more of the repetitive tasks involved in computer-based work. “Everything’s converging on just AI basically doing all the grunt work,” Butler said. The bottom of the cognitive pyramid Butler is from Lennoxville, completed his undergraduate studies at Bishop’s and later earned his PhD at the Université de Sherbrooke. He joined Bishop’s in 2019 and now chairs its Department of Computer Science. He uses AI in research, teaching and other creative work, and said the technology is increasingly capable of handling routine digital tasks that once required substantial human time. “You’ve got the grunt work, like moving things around in Excel, doing basic programming tasks,” Butler said. “That’s like the bottom grunt work that the entry-level worker would have done two or three years ago.” Butler went further, saying in his view that much of this type of work has already been absorbed by AI tools. He connected that change to a shift he sees taking place in computer science, where entry-level roles have declined while experienced workers can use AI to increase what they can produce. “A senior developer now has access to essentially an unlimited amount of junior developers on demand,” Butler said. He was describing AI systems metaphorically, not literal employees. His point was that one experienced developer can now ask AI tools to produce code or other technical work that might previously have been assigned to more junior workers. That raises a broader question for universities and employers. If some of the simpler work traditionally given to newcomers can now be done by machines, how do people gain the experience needed to become senior workers themselves? Students doing work that once required years of programming Butler said he is already seeing the change inside his classroom. He created a Bishop’s course called CS208, Coding in Plain English, to show students — including those without traditional programming backgrounds — what they can accomplish using AI. Some come from disciplines such as psychology or neuroscience with no previous programming experience. “What I’m finding is that students who have zero programming experience, they come in from another discipline like psychology or neuroscience or something, they are now able to get up and running with real data sets,” Butler said. Butler’s own doctoral work involved neuroimaging, and he said he has assigned students work he considers comparable to the kinds of analysis he performed during his PhD. He described giving students a real dataset, an expected result and instructions to use AI to complete the analysis. Butler said those students have been able to carry out work at a level he associates with tasks he once performed after years of programming experience. That does not mean a student using AI instantly acquires the same knowledge as an experienced computer scientist. But Butler sees it as evidence that AI can dramatically lower the technical barrier between having a problem to solve and producing a working result. The role of the person using the system then changes. They need to know what to ask for, understand enough about the subject to judge the answer and take responsibility for what is ultimately produced. What about AI hallucinations? One persistent concern surrounding generative AI is hallucination — when a system produces information that sounds convincing but is false or unsupported. Butler said that problem has improved substantially in newer systems and is not as severe as it was with earlier models. He pointed in particular to newer AI systems’ ability to search the web, consult scientific databases and return source links rather than simply generating a citation from their internal model. Butler nevertheless said users should verify what AI produces. “You should verify,” he said while discussing citations generated with AI. His position is that hallucinations have become less common in the systems he uses, not that incorrect AI output is impossible. Human checking remains part of the process. Hours of work compressed Butler offered another example from his administrative work at Bishop’s. The university has been comparing CEGEP courses with first-year Bishop’s courses to determine where students may qualify for advanced standing. Traditionally, Butler said, that means reviewing two sets of course descriptions and manually matching one institution’s courses with another’s. As department chair, that could require hours of reading and comparison. He said AI can now be given both sets of material and asked to generate an initial mapping automatically. “It saves me hours and hours of work,” Butler said. Butler said the AI-generated mapping can also produce a better result than he would produce himself. He sees similar opportunities in businesses. A company may receive specifications, drawings, emails or other digital material from customers and then have employees convert that information into an internal format before anything can be manufactured or delivered. AI can increasingly perform parts of that intermediate processing. In Butler’s view, the employee does not necessarily disappear. Instead, the job becomes more about checking the result. “The human is still there,” he said. Judgement could become more valuable That change is central to Butler’s view of where digital work may be headed. If AI can produce a first draft, write basic code, compare documents or process large amounts of information, he argues that knowledge and judgement become increasingly important. “The real scarce resource going forward is going to be domain knowledge, expertise, and… credentials, authority, the ability to work with other people,” Butler said. He is therefore encouraging students not only to learn AI tools but also to broaden their education. He mentioned acting, fine art and photography as examples of courses that can help develop what he described as taste and intuition — the ability to recognize what is good, what is not and what should be changed. “And that’s the skill that they need now because the grunt work has been automated and now it’s about evaluating what the AI produces and telling it how to improve or expand the output,” Butler said. That does not remove the need for technical knowledge. Butler’s argument is that the emphasis may shift away from manually completing every step of a task and toward directing, checking and improving work produced with AI assistance. He also stressed that humans remain responsible for final decisions. “At the end of the day, the human has to make the final call,” Butler said, pointing to the question of accountability. Physical work may be different Butler draws a distinction between digital work and jobs requiring people to manipulate the physical world. He expects AI to continue advancing quickly in tasks performed almost entirely on computers. He is more cautious about claims that humanoid robots will soon be able to replace workers such as plumbers or electricians. Butler said those trades would not be replaced “anytime soon” in his view and described some current robotics demonstrations as overhyped. He described the situation as counterintuitive. “It’s almost like we solved the highest level first,” he said, contrasting advances in digital AI with the harder problem of building robots capable of operating reliably in the physical world. Butler’s argument is that some digital occupations could face automation sooner than trades requiring complex physical work. The wider AI shift in the Townships Butler’s comments come as local institutions are increasingly grappling with how AI should be used. The federal government recently announced up to $162 million over five years for 10,000 AI-related placements through Mitacs. The Université de Sherbrooke told The Pulse that the number of its collaborative research and innovation projects supported through Mitacs has approximately doubled since 2018-19, while the number of placements has approximately tripled. UdeS also said it already has projects involving both AI adoption and the application of AI to other fields. At Bishop’s, Butler said part of his role involves building the Computer Science department’s local presence, connecting students with regional partners and strengthening relationships with the Sherbrooke technology ecosystem. Those developments put universities in a difficult position. They have to prepare students to use the tools employers increasingly have available while also making sure graduates understand enough to recognize when those tools are wrong, incomplete or being applied to the wrong problem. The risk of losing human skills Butler does not see AI as risk-free. Later in the interview, he raised a separate concern: as AI becomes better at reading, writing, programming and other cognitive tasks, people could lose some of the underlying skills that historically helped produce new ideas. “The other danger is that we’re going to lose the human skills,” Butler said. He specifically mentioned reading and writing and argued that people could lose some of the lower-level understanding that contributes to breakthroughs. Butler said AI systems are based on existing human knowledge and argued that they become much more powerful when paired with a capable person. That tension runs through his view of the technology. AI can remove hours of routine work. It can allow beginners to perform tasks that once required substantial technical training. It can give experienced workers significant leverage. But the more capable the technology becomes, the more important it may be for people to develop the judgement needed to decide what should be done in the first place. For Butler, that is where education may have to change. Students still need to understand their field. They still need to know when something is wrong. And they still need to be able to make the final decision. But if AI increasingly handles the bottom of the cognitive pyramid, the value of a worker may depend less on how quickly they can perform the grunt work and more on whether they understand what the work is supposed to accomplish. Don’t miss the next story that affects your community. Join thousands of readers getting The Pulse every morning—plus breaking news alerts when it matters most. If you value this kind of local journalism, consider supporting it. Subscribe, share and like! Subscribe Share
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Intel Panther Lake Teardown, 18A, BSPD, GAAFET, SemiAnalysis STEEL
Panther Lake debuts the first commercial implementation of backside power delivery (BSPDN), introduces Intel’s first iteration of gate-all-around (GAA) transistors, and showcases their advanced packaging capabilities with its Foveros-S assembly. With Panther Lake, Intel’s manufacturing arc has shifted from nebulous roadmaps to shipped silicon, a significant milestone on their long road back to competitive semiconductor manufacturing. To evaluate the extent of Intel’s comeback, we tore down Panther Lake. The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. Our teardown traces 18A from its four-sheet RibbonFETs (Intel’s marketing name for GAAFETs) and gate stacks through contacts, frontside and backside wiring, and the bonded carrier. We explain how these material and integration choices improve gate control and reduce resistance, while adding capacitance, thermal resistance, and process complexity. Our measurements put Panther Lake’s 18A compute logic and TSMC N3E GPU logic at similar logic density. However, 18A does not lead TSMC N3P, N2 or Samsung SF2 in peak density. Panther Lake’s CPU cores are incremental updates, and the high-end GPU still uses TSMC N3E. Panther Lake assembles one compute tile, one GPU tile, and one I/O tile atop a passive base tile using Intel’s Foveros-S advanced packaging. Both compute tile variants use Intel 18A. The Xe3 GPU options are a 4-core GT1 tile on Intel 3 and a larger 12-core GT2 tile on TSMC N3E. Both I/O tile variants use TSMC N6. [1], [2] Our analysis centers on the PTL-U compute tile, both the 4-core and 12-core GPU tiles, as well as the 12-lane I/O tile. In conventional chips, power and signal are routed through the same frontside metal stack towards the device frontend. Power rails consume scarce routing resources near the transistors, while tall via stacks carry VDD and VSS from the coarse upper wires to local rails. Backside power delivery (BSPD) moves the main power network behind the transistor layer, to the backside, separating it from frontside signal routing. We covered BSPD and its impacts in 2024. [3], [4], [5] Intel’s BSPD implementation, branded as “PowerVia”, routes power through dedicated backside metals to nano-TSVs, which connect those rails to local source/drain (S/D) contacts. Implementing that separation requires Intel to build the interconnect stacks from both sides of the wafer. The frontside comprises the M0-M14 signal stack, while the backside comprises the BM0-BM5 power stack. M0 and BM0 are closest to the transistors. The nano-TSVs connect the two sides, but Intel patterns and etches each via from the front after forming the contacts. A narrow via runs from the side of the contact deep into the silicon substrate. Intel then completes the frontside signal metal stack, bonds the wafer to a carrier, flips it and removes the original substrate until the buried via tips are exposed. The backside metal stack is then deposited directly on the revealed vias. The nano-TSV and backside-via profiles taper in opposite directions because Intel forms them from opposite sides of the wafer. The transistor structures form the FEOL. Local contacts and nano-TSVs connect them to the wiring. M0 begins the frontside interconnect stack. The silicon carrier remains attached above the frontside interconnects. It supports the device wafer during substrate removal and backside processing and remains part of the finished chip’s thermal path. PowerVia removes the main power distribution from the congested frontside metals, routing supply through shorter and wider backside wires. Its lateral landing still occupies area in the standard cell, so it recovers less cell area than a direct backside contact. [3] Nano-TSVs beside the logic devices carry VDD or VSS from the backside power network, while signal connections continue upward through the frontside metals. Backside Interconnects Samsung SF2 data is included for comparison to Panther Lake’s within this article. SF2 is the incumbent GAA foundry node but lacks BSPD, serving as a useful reference to evaluate 18A. A full teardown of Samsung’s S26 products, processed on SF2, will be shared soon.Nanosheet-cut EDS comparison. The PowerVia supply path runs from the backside Cu rails through Mo-lined W nano-TSVs to the local transistor contacts. In this cross section, the tapered connection spans roughly 150 nm from the contact level to BM0. The Ta liner confines Cu and promotes adhesion to the surrounding stack; the AlOₓ etch stop controls the next dielectric etch above the rail. Dielectric beneath the ribbons electrically separates the devices from the backside wiring and removes the conducting silicon body below the channel. [6] AlOₓ serves as an etchstop (ES), enabling endpointing and protecting the underlying layers. Low-volatility aluminum fluoride reaction products resist the fluorinated plasma, allowing a thin AlOₓ film to protect the metal while the surrounding low-k dielectric is removed. [6], [7]. While the BM0 and layers above the M1 lines show double AlOx layers, Our SMIC N+3 teardown showed single AlOₓ layers. SMIC uses a simpler local AlOₓ substack, while the remaining cap and etch sequence provide the required landing protection. So why double layers? The closely spaced AlOₓ doublets provide two protected endpoints in the etch sequence. Intel documents an AlOₓ/SiN/AlOₓ stack that explains the benefit. The main dielectric plasma etch stops on the first AlOₓ film; a selective wet clear opens that film; a second plasma etch removes the intermediate SiN and stops on the second AlOₓ film. The final wet clear exposes the metal landing surface. SiN is the intermediate dielectric in Intel’s published example. [8] The second stop protects the metal through a cap breakthrough. Wide openings can etch faster than narrow ones, and etch depth varies across the wafer. Metal under an early-clearing opening would otherwise be exposed while other openings still need more etching. Staged protection widens the process window and reduces metal erosion, corrosion and void formation. [8] TSMC documents AlN/AlOₓ/SiOC/AlOₓ above Cu, with AlN blocking Cu diffusion, and a simpler AlN/SiOC/AlOₓ variant that omits one AlOx film. [9] Levels with different opening sizes, aspect ratios, pattern densities and cap materials need different etch margins. A double AlOx stop is useful where another protected endpoint justifies the added processing. The extra film adds formation, selective opening and cleaning steps, plus another set of interfaces to control adhesion, moisture, and stress. These blanket films are opened through the existing via pattern, so each film does not require another lithography mask. AlOₓ adds parasitic capacitance when it replaces lower-k dielectric; two thin AlOₓ films can nevertheless contain less AlOₓ than one thick film. Total thickness, placement, and theintermediate dielectric determine the electrical cost. Deposition chemistry also changes AlOx permittivity and residual hydroxyl content, which can oxidize the underlying metal. [7], [8], [10], [11] The backside stack separates into relatively fine BM0-BM2 wiring near the devices and coarser BM3-BM5 power distribution. The largest pitch increase occurs between BM2 and BM3. BM0’s pitch closely matches the logic-row height, fitting local power delivery to the cell rows. Higher levels aggregate current through larger conductors: routing density becomes less important than low resistance and current capacity as the network approaches the package. This hierarchy provides wide power wiring for the power delivery network without consuming scarce frontside signal-routing resources. [3] The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. Frontside Interconnects Intel 18A combines Mo-lined W contacts and nano-TSVs with a separate backside Cu power network. Samsung SF2 keeps power on the frontside, using Ti-based contact interfaces and Ta-based barriers and Co liners around Cu wiring. In 18A standard-cell rows, backside power rails supply the devices through nano-TSVs within the cells, freeing frontside routing resources. Samsung’s M0 accommodates both power and signal connections. From the device toward M0, the connection runs through a Ti-based S/D interface, W contact fill, a Mo-lined W via, and the Cu M0 wire. Mo supplies a conductive nucleation and adhesion layer for W, replacing the resistive TiN liner used in conventional W integration. This increases the effective conduction volume within the feature while retaining W fill and its established polishing, cleaning and etching processes. Intel’s Mo/W patent describes this integration tradeoff. The nano-TSV uses the same Mo-lined W construction in the backside supply path. [12] The move from TiN to Mo is an incremental change. While a full Co or Mo fill can also reduce the volume lost to liners in very small features, it requires new integration schemes that increase complexity and risk. Cu remains attractive for wider wires due to its low resistance. As wires and vias shrink, the diffusion barrier consumes an increasing fraction of their cross-section. [12], [12], [14] Intel uses Co/Ru liners at M0-M1, Co at M2-M4, and Nb at M5-M9. The lower-level liners help Cu adhere and reduce void formation during trench fills. Applied Materials’ Endura has new thermal control that facilitate wetting process, so the thin film continuity is good enough that good capillary pressure will drive Cu atoms to the via bottom without voiding. Intel’s choice to use Nb is particularly interesting. Intel’s Nb patent describes a conductive diffusion barrier intended to reduce the barrier’s contribution to resistance relative to conventional Ta-based barriers, particularly at via bottoms where all current crosses the barrier. The patent pairs Nb in coarser levels with the option of lower-cost PVD processing. [15], [16] The upper metal layers support thicker barriers formed through physical vapor deposition (PVD) despite its worse coverage and uniformity. Meanwhile, the lower metal layers require thinner barriers deposited through conformal atomic layer deposition (ALD). Co/Ru adds another material interface and requires controlled deposition and Cu fill. Changing liners and barriers by metal layer allows Intel to optimize interconnect resistance, process complexity, and reliability. [15, 16] RibbonFET, Intel’s name for its gate-all-around FETs (GAAFETs), replaces the FinFET’s vertical fins with four stacked horizontal silicon nanosheets, allowing the gate to surround the channel on every side. The path to GAAFET begins with the planar transistor. A planar MOSFET places the gate above the channel between its source and drain. Pairing an NMOS with a PMOS transistor creates a CMOS inverter, in which the NMOS pulls the output low for a high input, and the PMOS pulls it high for a low input. The gate must retain electrostatic control of the channel to ensure clean switching. As gate lengths shrank, the drain began to compete with the gate for that control, increasing off-state leakage. Electrostatic control was restored through an architectural evolution that raised the channel into a vertical fin and wrapping the gate around three sides. Called “FinFET”, this new architecture packed more effective channel width into a smaller footprint. Further scaling made it harder to maintain both drive current and leakage within smaller cells, and reintroduced the same problems planar MOSFETs faced. Nanosheet GAAFETs close the fourth side by replacing the vertical fin with a stack of horizontal nanosheets, each surrounded by the gate. The tighter electrostatic control suppresses leakage at shorter gate lengths while stacking adds effective channel width within the cell footprint. In a FinFET process, channel width changes in discrete steps as designers must add or remove whole fins. Nanosheet width can instead be adjusted continuously within the process’s design rules. Wider sheets increase drive current, while narrower sheets reduce capacitance at the cost of drive current. Intel 18A uses stacks of four nanosheets each and varies their widths across logic and SRAM. At the process level, adding more sheets to each stack increases effective channel width and drive current, but complicates fabrication. RibbonFET vs MBCFET Samsung began GAAFET production in 2022 with SF3E, following with SF3 and now SF2. Its ‘MBCFET’ provides a useful structural comparison with Intel’s first RibbonFET implementation. [17] STEEL is digging deeper into SF2, used in the Exynos 2600, and TSMC’s GAAFET N2, used in Apple’s A20 Pro, in upcoming newsletter articles. We’re throwing some teasers on X. Let’s compare Samsung SF2’s MBCFET with Intel 18A’s RibbonFET. Subscribe Even to the untrained eye, Intel’s extra nanosheet is obvious. Intel stacks four ribbons to Samsung’s three. Samsung’s sheets are much wider in these fields, so both sheet count and width matter to the available channel perimeter. Sheet width also changes which silicon surfaces carry current. On conventional (001) silicon, wide nanosheets emphasize the broad top and bottom surfaces, favoring electron transport; the larger sidewall contribution in a narrow sheet favors hole transport. Thinner sheets improve gate control but increase confinement and scattering. This makes width and thickness part of the NMOS/PMOS balance, alongside strain and threshold voltage. [18], [19] GAAFET designs like 18A use different work-function-metal (WFM) stacks for NMOS and PMOS. Around each ribbon, a thin SiOx interfacial layer separates the silicon channel from the HfOx high-k dielectric, with La providing dipole tuning and the WFM wrapping the dielectric. NMOS uses a TiAl-based stack, while PMOS uses TiN WFM. W fills the remaining gate trench, providing a lower-resistivity path where the work-function layers are no longer needed. In this field, the PMOS stacks leave room for W between ribbons, while the NMOS stacks occupy more of those gaps. A silicon-based dielectric marks the P/N boundary, allowing the PMOS and NMOS gates, sharing the same gate trench, to be processed sequentially. Fast logic paths, retention circuits, and SRAM need a family of threshold options. Changing threshold without substantially changing device dimensions, capacitance or fabrication complexity is valuable. FinFET processes typically use different work-function-metal stacks. In a four-ribbon GAA stack, the narrow sheet-to-sheet gap limits how much WFM can fit around each channel. La in the gate dielectric creates interfacial dipoles at the SiOx/HfOx boundary, shifting effective work function and tuning threshold voltage. This gives Intel another control alongside its NMOS and PMOS WFM stacks. Low-threshold devices improve critical-path drive; higher thresholds reduce leakage elsewhere. Dipole tuning is especially useful in GAA because it changes threshold without consuming the narrow intersheet gap with thicker WFM. Precise control of La incorporation, diffusion and interface quality has long been a challenge, limiting viability in high volume production but is now seen from every leading-edge foundry. Intel’s patent describes depositing a dipole-forming oxide above HfOx and annealing it toward the interfacial oxide before completing the work-function and fill metals. This separates threshold tuning from the space available for metal. Newer research addresses the thermal cost: imec’s 2026 dipole-middle research inserts the shifter between two HfOx depositions, shortening the diffusion path while protecting SiOx during patterning. [20], [21]Matched-cut EDS, Intel 18A (left) vs. Samsung SF2 (right). Intel retains raised source/drain epi beneath its contacts, while Samsung recesses W deep into the epi to form a V-shaped Ti-lined interface. The deeper contact increases metal-to-semiconductor area and shortens the current path from the lower sheets, reducing contact and spreading resistance. It also removes epi volume and brings the contact etch closer to the channel ends. Retaining more epi preserves the material available for strain transfer, especially from SiGe into PMOS. These geometries balance contact access against stress engineering and etch margin. [22], [23] Samsung stacks three sheets to Intel’s four ribbons, and both processes use sheet width to tune drive strength. In our Samsung cross-sections, widths range roughly from 19 to 30 nm in the NPU rows and 37 to 50 nm in the CU cell. The Samsung nanosheets taper, with the widest sheet at the bottom and the narrowest at the top. Both processes use HfOx gate dielectric and Ti-based work-function stacks, with Al in the NMOS stack. In the Samsung devices shown here, the dielectric and WFM occupy the intersheet gaps, leaving W above the top sheet. Intel’s PMOS stack leaves more room between ribbons, and W fills those gaps while the thicker NMOS stack leaves W mainly in the upper trench. Gate-stack EDS maps. The W between Intel’s PMOS ribbons provides a conductive path close to the lower gates. Where WFM fills the entire gap, the gate still surrounds the channel, but voltage reaches it through the more resistive work-function films. Thinner WFM and dipole tuning preserve room for low-resistivity fill; Mo and Ru are alternative fill metals being developed for further scaling. [24] A masked, sequential WFM flow explains the different gate heights and inter-nanosheet fill. The proposed sequence below shows how separate NMOS and PMOS work-function steps produce that geometry. Enabled by the BSPDN process, Intel replaces the dense-logic silicon subfin with dielectric, removing the parasitic conduction path below the ribbons and reducing substrate-related capacitance. A retained silicon body as in classical, non-SOI, planar and FinFET designs needs junction and punchthrough-stop engineering to suppress leakage. Dielectric isolation makes that leakage less sensitive to the subfin doping profile but adds removal and fill steps. It also weakens the direct thermal path through silicon, making the contacts, metal stacks and package more important for heat extraction. [24], [26] Fluorine is concentrated around selected Intel device structures in the maps. WF6 is a standard precursor for W nucleation and fill, while barrier films protect adjacent dielectrics from fluorine attack. Low-fluorine W processes reduce the residual-F burden. Chloride-based precursors avoid introducing F during W deposition, but require control of chlorine attack, nucleation and fill quality. The integration target is a continuous, low-resistance W path with a thin protective liner and minimal chemical damage to the surrounding stack. [20], [27], [28] The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. We measured cell height, gate pitch, metal geometry, and ribbon dimensions at the XTEM sites shown below. The tables group these dimensions by site and device polarity. Our “sheet cuts” cross the silicon channel and show the ribbons end-on. “gate cuts” run along the channel through successive gates. The 18A logic cell dimensions point to a five-track logic library while the N3E and Intel 3 cell dimensions evidence a seven-track logic library. The DDR-PHY uses wider M0 wires and much larger spacing than core logic. That trades routing density for lower wire resistance and weaker coupling between neighboring nets. The geometry suits the current delivery and coupling requirements of analog, clock, and I/O circuitry. PowerVia lets 18A combine a compact cell height with wider M0 geometry by moving the main power rails off the signal-routing tracks. That relaxes local wire scaling while preserving a small cell footprint. Cell height and gate pitch set the geometric density; pin access and routability determine how much of it a real block can use. [29] The biggest takeaway from our gate-pitch measurements is that Intel 18A compute logic and TSMC N3E GPU logic have similar density in the Bohr representative-cell model. The 18A example is 18.6% denser than the Intel 3 GPU example. Gate pitches are nearly identical across the three sites, so cell height drives most of the difference. The Bohr model combines a four-transistor NAND2 spanning three gate pitches and a 32-transistor scan flip-flop (SFF) spanning nineteen pitches, weighting their densities 60:40. The sensitivity column shows how independently changing cell height and gate pitch by ±1 nm changes the result. This compares representative cell geometries; whole-die density also depends on cell mix and placement. The 18A P-core gives M0 substantially more metal cross section than the N3E vector engine. Treating each profile as a trapezoid gives 2.63 times the area per line and 1.84 times the area after normalization by routing pitch. The larger section reduces the geometric contribution to line resistance and lowers current density for a given current. Taller and wider wires also add capacitance, so circuit delay depends on the balance of resistance and capacitance. The DDR-PHY has less metal area per routing width than the 18A core fields, while remaining above N3E. [30] Area = height × (top CD + bottom CD) / 2, including liners. Area/pitch normalizes by routing width. Taper is the symmetric sidewall angle from vertical, with the largest angle belonging to the DDR-PHY. Compute tile The measurements show how ribbon dimensions and gate-stack geometry vary across the compute tile and between NMOS and PMOS to balance channel drive, gate load and the space needed for the dielectric/WFM stack across logic, SRAM and the DDR-PHY. Width mainly changes available channel perimeter; thickness also changes electrostatic control and carrier confinement. Gate-stack thickness then determines the space left for low-resistivity fill P-core and LP E-core logic Both the P-core and LP E-core use multiple nanosheet widths. Widths are measured on high-magnification XTEMs while wider-field images demonstrate additional width choices within the LP E-core. Multiple widths are expected even within an LP E-core. Timing-critical paths, buffers and cells with different fanout need different drive strengths. The lower-magnification fields show this width diversity beyond the sites quantified in the table. L2 and L3 SRAM GAA gives SRAM designers another way to balance the pull-up (PU), pass-gate (PG), and pull-down (PD) transistors. FinFET bitcells set device strength through fin count while GAA adds nanosheet width as a sizing knob. In a 6T SRAM cell, a strong pull-down relative to the pass-gate limits read disturbance, while a strong pass-gate relative to the pull-up improves writability. During a write, the pass-gate and write driver pull the node storing “1” below the inverter trip point. During a read, the pull-down holds the node storing “0” low. Bias, threshold voltage, mismatch and assist circuitry set the remaining margin. FinFET high-current cells commonly use a PU:PG:PD fin-count pattern of 1:2:2, a device-sizing ratio rather than a current ratio. Ribbon width lets Intel balance SRAM strengths without adding whole fins. The L2 cell uses its narrowest ribbons for PU and widest for PD, improving writability and read stability respectively. Intel’s disclosed HCC operates without assist; its denser HDC uses negative-bitline write assist. Pulling the selected bitline briefly below ground increases pass-gate overdrive so it can overpower the pull-up at lower supply voltage. That buys density and low voltage writability at the cost of boosting circuitry, switching energy, and additional voltage stress that must be controlled. [31], [32] Four rectangular ribbons give the perimeter = 8 × (width + thickness), before corner rounding. PG/PU is 1.49 and PD/PG is 1.16. The L3 structures closely resemble L2 in layout and cell height. Fewer L3 nanosheet widths are tabulated because fewer high-magnification images were available. DDR PHY The DDR-PHY trades density for controlled analog behavior and reliable off-chip signaling. It contains drivers, receivers, delay circuits, and calibration logic that set drive strength, sampling time, and voltage margin. Repeated four-sheet devices with similar widths fit the use of regular transistor units for matching and programmable drive. Its wider local wiring provides room for current delivery and separation of sensitive signals, while consuming more area than a dense core-logic grid. The layout serves the memory channel’s electrical requirements as well as digital logic density. [33] The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. Intel 3 GPU devices Vector engine logic Intel 3’s XVE logic uses two-fin PMOS and NMOS devices with power rails in M0. Its cell height and M0 pitch give a seven-track geometry, two tracks more than the 18A logic. One-fin groups also appear among the two-fin devices. Intel 3 L2 SRAM The Intel 3 L2 SRAM uses the familiar HCC sizing pattern: one PU fin, two PG fins, and two PD fins. N3E GPU devices Vector engine logic The N3E XVE field contains repeated two-fin devices with seven-track cell geometry. N3E remains a FinFET process, giving Panther Lake a direct FinFET-to-RibbonFET comparison. N3E L2 SRAM The N3E L2 SRAM uses the same PU:PG:PD fin-count pattern of 1:2:2. Panther Lake-U follows Lunar Lake’s floorplan quite closely. Both pair 4 P-cores with 4 LP E-cores and NPU, media and display engines in similar locations. Lunar Lake also uses Xe2, the direct predecessor to Panther Lake’s Xe3 GPU. This makes Lunar Lake the most direct basis for our comparisons. Arrow Lake differs in core count and uses the older Xe-LPG GPU architecture, so we only use it where it offers a more direct component-level comparison. Compute tile Panther Lake compute-tile floorplans remain sparse even months after launch. Intel 18A’s backside metal and dielectric stack must be removed without damaging the underlying structures before a clean transistor-level floorplan can be imaged. Most published die shots hide or heavily process the background, but we are quite proud of the die shot we achieved and are excited to show the work we have done. We measured the areas of the key components on the compute tile and compared them with their Lunar Lake predecessors on TSMC N3B. These help us to capture changes in block area and compare the two chips across process nodes and designs. Our total tile areas exclude the scribe-line area. The compute-plus-GPU subtotal below uses the PTL-U compute tile and GT1 GPU; it excludes the I/O tile and passive base. Individual block areas use the boundaries marked on the floorplans The compute-plus-GPU row is recomputed from the displayed PTL-U and GT1 areas. Component rows use their stated per-region counts and are not an additive partition of the whole tile. The P-core area remains almost unchanged between Lunar Lake and Panther Lake, despite L2 capacity increasing from 2.5 MiB to 3 MiB. Arrow Lake uses the same Lion Cove core as Lunar Lake but also has a 3 MiB L2. Cougar Cove fits 20% more L2 into the same P-core area. The larger private cache keeps more of each core’s working set close to its execution units, reducing access to shared L3 and DRAM. Extra capacity adds storage leakage and lookup energy, so designers balance it against avoided lower-level accesses. The shared P-core L3 cache also shrank by 14.8%. [2] Cougar Cove combines a similar footprint with Intel’s reported power-efficiency improvements. RibbonFET’s tighter channel control reduces leakage, while PowerVia reduces supply droop and allows tighter voltage guardbands. [1] Darkmont’s four-core LP E-core cluster is 5.0% smaller than Skymont’s on Lunar Lake, with most of the reduction in its L2 regions. The 1 MiB region shrank by 8.4% and the 1.5 MiB region by 14.9%. The tag arrays also use one fewer visible row. Tags identify which memory addresses the data array holds, so rearranging them changes the cache’s layout and wiring without requiring less data capacity. [2] The LP E-cores share one L2. This pools capacity and avoids duplicating all the cache machinery, but the four cores contend for its banks and bandwidth. Their separate cluster also keeps light work away from the performance cluster and its L3, allowing that larger domain to sleep. [1], [2] Cache area includes more than the storage cells. Tags identify each line, decoders select rows, sense amplifiers read the small bitline signal, and wires connect to the banks. Splitting an array into smaller sections shortens wordlines and bitlines, improving access speed, but duplicates peripheral circuits. Panther Lake’s smaller cache regions therefore reflect the complete memory implementation, including how much of each region is devoted to storage. [34] Unlike Meteor Lake and Arrow Lake, Panther Lake has no separate SoC tile. The NPU, LP E-cores, memory controllers, PHYs, media and display engines now share the compute tile. This removes an active die and keeps CPU memory traffic on one die. The cost is moving PHY and I/O-related circuitry onto 18A: drivers, receivers and analog circuits must still meet external voltage, loading and signal-integrity requirements, so their area does not shrink like dense digital logic. [1], [2] The biggest shrink comes from the NPU, which occupies 36.9% less area. NPU 5 consolidates the same total INT8 MAC count into half as many neural compute engines. Each of the three NCEs has a larger MAC array to make the complete NCE envelope 22.6% larger than an NPU 4 engine. Consolidation also halves the number of scratchpads and SHAVE DSPs, from 12 to 6. The MAC array handles matrix multiplication and convolution, while SHAVE executes vector and custom operations that fit the array poorly. [1], [2], [35] The paired floorplans identify each NCE envelope and its scratchpad, MAC, and SHAVE regions. Each measured MAC polygon is counted once per NCE in the area accounting below. The scratchpads store weights, activations, and intermediate results near the MAC arrays, allowing repeated use without fetching them again from DRAM. Halving their number delivers the largest measured area saving but leaves less local storage for the same total MAC count. Layers that no longer fit locally require smaller working tiles or more transfers of intermediate data. The benefit depends on keeping the enlarged arrays busy while managing that tighter storage budget. [36] NPU 5 also adds native FP8. Using half the operand width of FP16 reduces storage and transfer demand, helping workloads fit the smaller local memory budget. Lower precision and format-dependent range make scaling and model validation part of deployment. Hardware activation functions further reduce work that would otherwise occupy the programmable DSPs. [1], [2] Microsoft requires an NPU to deliver at least 40 TOPS for Copilot+ PCs. Both Lunar Lake and Panther Lake meet this threshold, but Panther Lake uses significantly less silicon. GPU tiles Panther Lake is Intel’s first product with Xe3, its latest GPU architecture. It offers two different GPU tiles: a smaller GT1 tile with 4 Xe3 cores on Intel 3 and a larger GT2 tile with 12 Xe3 cores on TSMC N3E. Panther Lake allows us to compare the same GPU architecture across both Intel 3 and TSMC N3E. Wildcat Lake adds a third Xe3 implementation on Intel 18A. A future newsletter will detail Xe3 and its implementation differences across all three process nodes. GT2 scales Xe3 to a different physical layout, with render slices arranged vertically instead of GT1’s horizontal arrangement. Slice placement sets the distances to shared cache banks and the D2D interface. Those wires consume area and add delay, so scaling the number of Xe cores also requires a new balance of cache placement, routing and timing. [1] What’s immediately obvious is that the GT2 tile on TSMC N3E has much smaller Xe cores than GT1. These block areas include logic, caches, and routing. An Xe core on the GT1 tile is ~69% larger than one on Lunar Lake, and ~55% larger than one on GT2. Intel 3 therefore uses substantially more area per Xe core. The block-area gap exceeds the measured logic and SRAM density gaps, bringing routing, timing targets, cell mix, and floorplan allocation into the comparison. The measured vector/matrix engine region is almost unchanged between Lunar Lake and Panther Lake’s GT2 tile. Xe3 retains eight 512-bit vector engines and eight 2048-bit XMX engines per core. Its gains also come from feeding those engines more effectively: more resident threads hide stalls, and variable register allocation lets shaders trade registers per thread against the number of threads kept active. [1] The shared L1/SLM capacity increased by 33% from 192 KiB to 256 KiB, while its area increased only 5%, raising effective density by 27%. L1 retains reused cache lines, while software-managed SLM lets a thread group share data locally. Both reduce traffic to more distant memory. Allocating more SLM per group can also limit how many groups reside on a core at once. [1], [37] The GT1 tile carries 4 MiB of L2 against 16 MiB on the GT2 tile. GT1 divides its L2 cache into four 1 MiB banks, while GT2 uses eight 2 MiB banks. Each bank contains 128 macros, but each N3E macro stores 16 KiB, twice the Intel 3 macro’s 8 KiB capacity. The N3E macro is only 54% larger while holding twice as many bits, giving it 30% higher density: ~23.7 Mbit/mm² versus 18.3 Mbit/mm². Including bank-level circuitry, the gap widens to ~16.9 Mbit/mm² on GT2 versus ~10.4 Mbit/mm² on GT1. GT2 gains density with its macros storing more bits per unit area, and those macros occupy more of each cache bank. Larger macros spread decoder and sense-amplifier overhead across more storage, while a more compact bank layout reduces the share spent on control and routing. The compromise is longer wordlines and bitlines that carry more capacitance. [34] I/O tile Panther Lake uses two I/O tile variants, both fabricated on TSMC N6. The smaller one provides 4 PCIe 5.0 and 8 PCIe 4.0 lanes and serves lower-tier systems as well as those without a discrete GPU, while the larger one adds 8 PCIe 5.0 lanes, bringing the total to 20 lanes, for discrete-GPU connectivity. Panther Lake SKUs with the larger 10- or 12-Xe GPUs use the smaller I/O tile. [38] The smaller I/O tile adds a PCIe 4.0 block and a Thunderbolt block to Lunar Lake’s I/O layout, providing four additional PCIe 4.0 lanes and another Thunderbolt 4 port. Its repeated N6 blocks retain nearly identical areas and layouts. Reusing these proven PHYs and controllers avoids porting and requalifying external interfaces on 18A, where faster digital logic offers less benefit to circuits constrained by the off-chip link. [38] SemiAnalysis’s teardown lab (STEEL) dives deep into the world’s advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. We’re hiring technical experts from system to transistor and everywhere in between. Check out our Careers page. Panther Lake offers scalability and modularity through its disaggregated packaging that partition compute, GPU, and I/O silicon into separate tiles allowing for a suite of tile configurations. This partitioning makes the package part of Intel’s node economics as it determines how much leading-edge wafer area each product consumes, which functions can remain on other processes, and how much configuration freedom Intel can offer from a shared set of tiles. Furthermore, fabricating the compute and GPU tiles separately confines the new 18A process to the compute tile and allows graphics and I/O to use other, more established, and more cost-effective processes. For Panther Lake, the GPU and I/O tiles are assembled alongside the compute tile on a passive silicon base using Foveros-S. Intel’s current technology brief lists a nominal 36 µm pitch for Foveros-S. Through-silicon vias (TSVs) in the base connect the fine wiring above to the larger package connections below. The functional tiles sit side by side on that passive base in a 2.5D configuration. [39] Our cross-section through the compute and GPU tiles shows the package’s wiring hierarchy. Microbumps connect each active tile to the passive silicon base; its fine redistribution layer (RDL) carries the short, dense tile-to-tile links. TSVs carry connections through the base to the package substrate, which fans them out to the much coarser motherboard solder joints. The base supplies interconnect, while computation remains in the active tiles above it. [39] At the compute-tile edge, the higher-magnification inset shows a local microbump spacing of approximately 25.24 µm and a feature width of 12.33 µm. These local spacings are finer than Intel’s nominal Foveros-S value. The X-ray fields further confirm tighter neighboring bumps, consistent across every die-to-die area found on each tile. Additional X-ray analysis is offered after the paywall. Putting the memory controller beside the CPU removes the D2D transfer that CPU memory requests required in Meteor Lake and Arrow Lake. This avoids the extra transmitter, receiver, and link traversal, saving interface energy and latency. Panther Lake’s separate GPU still crosses a D2D link to reach DRAM, so its larger local caches also help contain package traffic. [1], [40] Smaller dies are less likely to contain a random fatal defect, and screening them before assembly prevents one bad tile from consuming a complete package of good silicon. Reuse also spreads design and qualification work across more products. Against those gains, Intel pays for the passive base, D2D circuits, extra bonding and test steps, and losses during assembly. Cost per working product across the portfolio captures the combined effect of wafer yield, reuse, test, and assembly. [29] Wildcat Lake packaging Intel launched Core Series 3, formerly Wildcat Lake, on 16 April 2026 for value mobile and edge systems. Wildcat Lake keeps 18A but removes the passive base and combines more functions on one die to simplify the package. The two products therefore reveal two distinct ways to commercialize the same leading-edge process. [41] Wildcat Lake’s 18A die combines up to two Cougar Cove P-cores, four Darkmont LP E-cores, two Xe3 cores and a smaller NPU. A separate platform-controller die supplies I/O, connected through UCIe, Intel’s first processor implementation of the standard. Consolidating graphics remove a tile boundary and the passive base, reducing assembly complexity for a modest-bandwidth value product. It also ties CPU and graphics scaling to the same die, giving up Panther Lake’s ability to swap in a much larger GPU. [42], [43] In July 2021, Intel CEO Pat Gelsinger set out an ambitious process roadmap aimed at regaining performance leadership by 2025, later described as five nodes in four years. Five years and one CEO later, Intel’s comeback story is not as unambiguously positive as Pat may have hoped. [44], [45] Intel once set the pace for process technology, bringing high-k metal gate technology and FinFETs into volume production years ahead of the rest of the industry. Its 22 nm FinFET process reached consumers with Ivy Bridge in 2012. [46] Intel’s integrated device manufacturing (IDM) model allowed its architects and process engineers to co-optimize products and processes. Starting with Sandy Bridge, Intel dominated x86, while AMD struggled with Bulldozer. That lead faltered at 14 nm and broke at 10 nm. Intel targeted a massive 2.7× density increase, but the node arrived years late and required several revisions before it could support Intel’s full lineup. This delay forced Intel to stretch 14 nm across six generations, while TSMC moved ahead in process technology and AMD recovered in x86. By 2019, Intel was still shipping 14 nm across most of its product stack, with its 10 nm client ramp focused on Ice Lake mobile processors. Meanwhile, TSMC was shipping N7 and N7+, and AMD’s Zen 2 compute chiplets used N7 to raise core counts and improve efficiency. Intel’s process failures were central to its decline, but unsound business decisions furthered their downward slide. Product delays compounded product mistakes, pushing client, server, and FPGA roadmaps off schedule. Several attempts to enter AI (Nervana and Gaudi) and networking (Tofino) also failed to establish lasting businesses. Intel’s recovery has focused on consumer CPUs and advanced packaging. Tiger Lake, Alder Lake, Lunar Lake and now Panther Lake have restored Intel’s consumer roadmap. On the process side, Intel 4 shipped with Meteor Lake, Intel 3 with Granite Rapids and Sierra Forest, and Intel 18A with Panther Lake. Intel has also made advanced packaging part of its foundry offering. However, Intel is still playing catch-up in servers. Several Xeon generations arrived years late and trailed contemporary AMD and Arm server CPUs in performance, efficiency, and core count. The process roadmap is back, but Intel does not hold the same process-technology leadership position it held prior to 10 nm. The introduction of gate-all-around nanosheets and backside power delivery are two of the biggest changes to transistor integration in a decade. Intel took on both changes at once: 18A paired its first RibbonFET with PowerVia in Panther Lake. Panther Lake is a substantial manufacturing milestone. Our cross-sections show how RibbonFET and PowerVia reshape local contacts and wiring, while the floorplans show where architectural consolidation and process choices save area. A sustained competitive lead depends on product performance, cost, yield, and the next implementation. The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page.. 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Available: https://www.intel.com/content/dam/www/central-libraries/us/en/documents/2025-11/intel-foundry-hpc-ai-brief.pdf [30] M. Lofrano, X. Chang, H. Oprins, and Z. Tokei, “Mitigating the thermal bottleneck in advanced interconnects,” imec, Sep. 28, 2023. Accessed: Sep. 14, 2026. [Online]. Available: https://www.imec-int.com/en/articles/mitigating-thermal-bottleneck-advanced-interconnects [31] S. Bair, “Intel at ISSCC 2025: Navid Shahriari invited talk, eight papers, forums, panelist & product details,” Intel Community, Feb. 19, 2025. Accessed: Sep. 14, 2026. [Online]. Available: https://community.intel.com/t5/Blogs/Tech-Innovation/Edge-5G/Intel-at-ISSCC-2025-Navid-Shahriari-Invited-Talk-Eight-Papers/post/1667592 [32] D. Chandra, E. Potladhurthi, D. R. S. Reddy, and K. S. Rengarajan, “Tunable negative bitline write assist and boost attenuation circuit,” U.S. Patent Appl. 20160203857 A1, Jul. 14, 2016. Accessed: Sep. 14, 2026. [Online]. Available: https://patents.google.com/patent/US20160203857A1/en [33] Synopsys, “Advantages of firmware-based training in high-speed DDR IP,” Synopsys IP Technical Bulletin. Accessed: Sep. 14, 2026. [Online]. Available: https://www.synopsys.com/articles/firmware-based-training-ddr-ip.html [34] N. Muralimanohar, R. Balasubramonian, and N. P. Jouppi, “CACTI 6.0: A tool to understand large caches,” Hewlett-Packard Laboratories, 2009. Accessed: Sep. 14, 2026. [Online]. Available: https://users.cs.utah.edu/~rajeev/cacti6/cacti6-tr.pdf [35] Intel, “Intel Tech Tour 2024 Lunar Lake AI hardware accelerators,” Doc. 824436, 2024. Accessed: Sep. 14, 2026. [Online]. Available: https://cdrdv2-public.intel.com/824436/2024_Intel_Tech%20Tour%20TW_Lunar%20Lake%20AI%20Hardware%20Accelerators.pdf [36] Y.-H. Chen, J. Emer, and V. Sze, “Eyeriss: A spatial architecture for energy-efficient dataflow for convolutional neural networks,” in Proc. 43rd ACM/IEEE Annu. Int. Symp. Comput. Archit. (ISCA), Jun. 2016, pp. 367–379, doi: 10.1109/isca.2016.40. [37] Intel, “Introduction to the Xe-HPG architecture,” Doc. 758306, Nov. 4, 2022. Accessed: Sep. 14, 2026. [Online]. Available: https://www.intel.com/content/www/us/en/developer/articles/technical/introduction-to-the-xe-hpg-architecture.html [38] Intel, “Core Ultra processors Series 3 for the edge,” Doc. 855291. Accessed: Sep. 14, 2026. [Online]. Available: https://cdrdv2-public.intel.com/855291/Intel%C2%AE%20Core%E2%84%A2%20Ultra%20Processors%20Series%203%20for%20Edge%20Overview_2.pdf [39] Intel Foundry, “Foveros technology brief,” Doc. 366411-001US, Feb. 2026. Accessed: Sep. 14, 2026. [Online]. Available: https://www.intel.com/content/dam/www/central-libraries/us/en/documents/2025-07/foveros-25d-product-brief.pdf [40] D. Das Sharma, “UCIe: Building an open chiplet ecosystem,” UCIe Consortium, 2022. Accessed: Sep. 14, 2026. [Online]. Available: https://www.uciexpress.org/_files/ugd/0c1418_c5970a68ab214ffc97fab16d11581449.pdf [41] Intel, “Intel launches Intel Core Series 3 processors,” Intel Newsroom, Apr. 16, 2026. Accessed: Sep. 14, 2026. [Online]. Available: https://www.intel.com/content/www/us/en/newsroom/news/client-computing/intel-launches-intel-core-series-3-processors-changing-the-game-for-everyday-computing.html [42] Intel, “Core Series 3 launch press deck,” Apr. 2026. Accessed: Sep. 14, 2026. [Online]. Available: https://download.intel.com/newsroom/2026/Intel-Core-Series-3/Intel-Core-Series-3-Launch-Press-Deck.pdf [43] Intel, “Intel outlines architectures for agentic AI at Hot Chips 2026,” Intel Newsroom, Aug. 24, 2026. Accessed: Sep. 14, 2026. [Online]. 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Popular PlayStation Hacker Calling It Quits Due To AI-Using 'Slop Kiddies' Reporting Important Bug To Sony
An anticipated open source Linux mod for newer PS5 consoles might now be in jeopardy of never happening
Reminder: iOS 27's All-New Siri AI Has a Waitlist, Here's How to Sign Up
Apple this week released iOS 27 following around three months of beta testing. If you just installed the software update on your iPhone, you might be wondering where the new-and-improved Siri AI and dedicated Siri app are. In case you missed it, you must join Apple's waitlist in order to gain access to these new features. Keep in mind that while iOS 27 is compatible with the iPhone 11 and newer, Siri AI is limited to the iPhone 15 Pro and newer.
Is A.I. Raising the Chances of Biological Warfare?
Current chatbots aren’t likely to help lone actors invent a deadly pathogen, experts say. But newer models, trained in biology, may need stronger safeguards.
India gets one of world's steepest iPhone price hikes
Apple raised prices on its existing iPhone lineup in India by as much as 41% within hours of unveiling newer models, bucking its usual practice of discounting older variants and marking one of the steepest hikes in any market where it has repriced this year.
Apple Releases iOS 26.6.2
Apple today released iOS 26.6.2 with a fix for "an issue that prevents downloading a software update over a cellular connection". The minor software update is rolling out now for the iPhone 11 series and newer. To update your iPhone, open the Settings app and tap on General → Software Update. It might take a few minutes until the update is visible to everyone. iOS 26.6.2 arrives approximately three weeks after iOS 26.6.1, which delivered security fixes.
Guardant Health Faces a $245 Million Patent Judgment, But Its Newer Tests Could Offer Protection
Guardant Health, Inc. (NASDAQ:GH) faces a costly legal setback after a US court ordered the cancer-testing company to pay more than $245.2 million in a DNA-sequencing patent dispute. The final judgment upheld a 2023 jury verdict finding that Guardant willfully infringed two DNA-sequencing patents asserted by TwinStrand Biosciences and the University of Washington. The financial […]
15 discouraging hours with Onimusha: Way of the Sword, and 10 brilliant ones with He Who Watches
In the last few weeks, while playing some video games that I might review, I emailed two cries for help. I sent the first to a rep for Capcom, confessing that the company’s samurai game Onimusha Way of the Sword (out today for PC and console) was crushing me. “Feels like I’m playing ‘hard’ mode, not ‘normal,’” I wrote. “And I don’t want to have to knock it down to “story”. I’m exploring, trying to level my gear, but these two-phase boss fights with no mid-fight checkpoints are brutal.” I wagered I was only about halfway through the game, if that. I wasn’t sure I could keep up with the steepening difficulty curve. Was I missing something? Then, on Monday, I took some photos of some puzzles that were baffling me in the mind-bending He Who Watches (out now on PC), wrote out lengthy descriptions of how I’d been trying to solve them and asked Bobby Vanden, the game’s solo developer, for a nudge in the right direction. I told Vanden I’d spent hours on these puzzles. “I’m stuck in triplicate,” I told him. Could he tell me if the solutions I was attempting were even on the right track? I didn’t mention that the puzzles—coupled with major time pressures from other work—were stressing me out so much that playing the game was giving me headaches. This double dose of panic was unusual. I’m used to managing a workload full of reporting and reviewing, used to a crowded schedule and the need to stay calm amid the bustle. But I was stressed about these games. No one was forcing me to review them, nor even play them. I’d simply found them interesting enough to start, hoped they’d be interesting enough to write about and I’d sunk hours into them assuming I’d made the right call. Suddenly, however, I felt trapped. I was emailing for a way out. Above: This guy took me about an hour to beat. The feedback I got from Capcom confirmed my fears. They didn’t say it, but I will: Onimusha Way of the Sword is not for me. It’s a brutally hard game in need of a normal difficulty level. It’s a game that spikes so severely during its abundant boss fights—yet offers such flawed ways to improve when outside of them—that it feels like a bait-and-switch. In the new Onimusha, you play as famed samurai Musashi Miyamoto, aided by a magical soul-absorbing gauntlet that is possessed by a lady who offers advice. (Way of the Sword is a continuation of Capcom’s long-dormant Onimusha series, but that set-up had me wondering if the company was cribbing from their ill-fated Bionic Commando reboot; read about “wife-arm” when you get a chance). Way of the Sword is partially set in 17th century Kyoto, an explorable city where Miyamoto can fight demons, help civilians and eventually rescue ghostly dogs. The city evolves over time, with new mini adventures and obtainable loot on offer, all feeding into systems that promise to upgrade your gear and sword-fighting skills. Upgrades, however, are so incremental as to be imperceptible, causing the exploration of Kyoto to feel like inconsequential busywork. From that hub, players can go on linear missions into forests and old temples, where they will encounter many of the game’s tough bosses. Combat in Way of the Sword is akin to many modern melee games. Players are asked to mix attacks with dodges and parries. They’re encouraged to deplete an enemy’s stamina bar in order to do greater damage to its health bar. The old Onimusha games’ signature move was the issen, a counter-attack so sudden it’s all but pre-emptive. You strike just as they begin to strike toward you, beating them to the cut. By definition, the issen is a high risk move, leaving you wide open to pain. It feels risky in the game, especially against bosses, who can maul you in just a few blows. A game might train you to perform an issen well by offering a variety of lesser enemies who are not as tough as the boss but get close. Or it might offer a toehold against bosses by saving or checkpointing the player’s progress when a boss’ first health bar has been destroyed and before the second health bar appears. It might offer the less skilled player a chance to over-level their character, should the player simply commit to playing through its optional sidequests. Way of the Sword does none of this. Fighting its trivially easy grunt enemies and then its ferociously adept bosses is like playing a game of chess where I’ve got a rook, while the opposing side is all pawns and five queens. Bosses simply don’t checkpoint. You may be able to clear a boss’ first phase without taking much damage. Good for you. Do it again, every time you fail the second phase. As for the the central Kyoto hub, I kept pace with all of its added side activities and never felt like I was overpowered. Bosses could still easily buckle me. The new Onimusha, I concluded, is just too discouraging to keep playing. The advice I got from Capcom had been well-intentioned. They reminded me of the game’s various systems. They alerted me to an optional assist that flashes recommended button inputs (basically: counter this move; dodge that move). It was a little helpful. So was dropping down to “story mode,” which I tried last night. Story mode turns on those button prompts by default. It makes countering and dodging way too easy, nearly automatic. I don’t consider myself a master of action games like these, but I’ve cleared the likes of God of War, Stellar Blade, Star Wars Jedi and others of sub-Sekiro difficulty and had a fun time doing so. Not here. Not yet. Unless they patch Onimusha: Way of the Sword and add a middle difficulty or just checkpoint the damn bosses when they’re between health bars, my streak of loving Capcom games released in 2026 will likely end at two. It’s a shame, because I was having a good time finding those ghostly dogs. And then there’s He Who Watches, a phenomenal first person puzzle game with Portal vibes, except instead of a portal gun you’ve got a magical bow that shoots one arrow that can activate switches or be used to drag blocks. The twist is an actual twist: you can also walk on walls and the ceiling, reorienting gravity as you do, thereby placing blocks onto those other surfaces. Walking on walls and ceilings to solve problems is really the best thing. Would that I could in reality. He Who Watches consists of locked-room challenges, each brief enough to only require about a minute to actually solving, though it will take five, 10, eventually 30 minutes to figure out said solutions. They are not obvious! It’s a game of layered mechanics and shocking solutions. For example, see if you can follow this: You can drag a block to a wall. Then you can walk on the wall, which now feels like the floor, and drag that block across the wall. Later, back on the floor, you might realize you can look up. The block is still on the wall, stuck to it. You can shoot your magic arrow to its underside. Doing so creates a tether, so that you can yank the block off the wall and carry it, as if it were a balloon, into the spot where you need it to be to solve the puzzle. Here, watch Vanden explain some of the game’s basics in this launch trailer: As with any great puzzle game, the solutions to He Who Watches’ puzzles elicit relief and amazement. Oh my god, that worked! I didn’t even think that could be possible! Learning to solve the game’s puzzles feels like learning magic. But, oh, does the game get hard. Its Steam reviews, mostly glowing, are full of players remarking how quickly He Who Watches made them sweat. Wrote one: “loving this one already although my brain is hurting!” Wrote another: “As you get further in the game it feels like you need an IQ level of at least 120+.” Vanden has shown some mercy. Each locked room puzzle includes an optional junior version of the puzzle, meant to teach you. Difficulty nevertheless ramps severely. By the time I was emailing Vanden for help, I was struggling to even clear one of the hint puzzles. When I messaged him, my stress was exacerbated by strange things I’d found in the game’s various hubs: suspicious passageways, odd blocks and some intriguing locked doors. These were hints of secrets, I realized, yet I sensed I needed to play further into the game to understand them. I was stuck, but I wanted to see the rest. Vanden offered to give me the exact solutions, to solve those three puzzles for me, but first he gave four nudges. Three were for the specific puzzles, but his best hint was for all and ultimately proved to be a terrific life lesson: go back a bit, he suggested. Do the puzzles right before those. They were teaching you something. Focus on what their lesson was. Don’t rush, in other words. Recognize what you’ve accomplished. Build off of that. I did so. I absorbed the lessons. I saw those three tough puzzles in a new light. I solved one the night after he wrote back, another the morning after. I left a third for another time. I didn’t need it and I wanted to plunge deeper into the game, closer to the moment when I was sure I could start unlocking those secret doors. My head stopped hurting, too. He Who Watches feels special. It’s got more challenges, and I’m undeterred. It’s also nice that its puzzles don’t have a surprise second health bar. Game File is a reader-supported publication. To receive new posts and support my work, consider becoming a free or paid subscriber. Subscribe Item 2: In brief… 🎮 Ilari Kuittinen, co-founder of Helsinki-based Housemarque (Super Stardust HD, Resogun, Returnal) has stepped down from his studio, after a 31-year run, saying he’s “ taking a rare and well-deserved breather.” Sony purchased Housemarque in 2021, and the studio released its newest game, Saros, earlier this year. Trend-watch: Sony-owned Insomniac saw its founder Ted Price retire in early 2025, after a 30-year run. Sony-owned Sucker Punch saw its co-founder Brian Fleming step down in late 2025, after a 28-year run. 👀 Savvy Games Group chief Brian Ward is stepping down from the Saudi-government-backed games conglomerate, Bloomberg reports. No word on a long-term successor yet, nor if this augurs any closer integration between Savvy and Electronic Arts. EA was purchased by a consortium led by Saudi’s sovereign wealth fund, in early August. 💿 Square Enix has denied a Japanese media report that the company was planning to go private. In very different Square Enix news, the company revealed that the physical version of Final Fantasy VII: Revelation, the April 2027 finale of its radical remakes of FFVII, will include just one disc in its case, requiring a download for the rest. The first two FFVII remakes in the trilogy shipped on two discs apiece. While Square hasn’t commented on the reason why, a feature here in Game File last month broke down the processes and costs for physical games. The expense of a second disc comes out of the game publisher’s cut of each copy. Square could be saving in excess of a dollar a copy with this move. 🟥 Grand Theft Auto IV’s 26-minute ’‘extended look” gameplay showcase that premiered on Netflix last week—and was exclusive to the platform for six hours—drew 31.1 million views in its first four days, the streamer announced. (Netflix calculates views as total viewed hours divided by runtime; excludes replays). Compared to YouTube: The version that later premiered on Rockstar Games’ YouTube channel is sitting at 22.6 million views after seven days (YouTube’s more liberal counting system tallies anyone who viewed even just the first few second.) Compared to other Netflix mega-events: Last year, Stranger Things season 5’s first four episodes, which debuted together, drew a record 59.6 million views in their first few days on Netflix. For more of a live event type of comparison, in 2024, the Jake Paul vs. Mike Tyson boxing match drew 65 million concurrent streams as it happened; Netflix didn’t release live numbers for the GTA premiere. ☁️ Microsoft is changing the way it charges for cloud gaming, from an all-you-can-play offer for Xbox Game Pass subscribers, to caps for the subscription’s tiers (15 hours per month at the Ultimate tier), with the option to buy more hours in bulk beyond that. The company also said it will sell batches of cloud gaming time to non-Game Pass subscribers, details TBA. Microsoft does not release figures for cloud game usage, but said its changes would impact 4% of Game Pass subscribers. That implies a small portion of its subscribers exceed the 15-hour monthly mark. Cloud gaming offers the promise of playing games without the need for console or PC hardware, as the graphics, sound and controls are all transmitted via a streaming connection. Microsoft notes that its cloud gaming service can be used for a range of things, including Xbox One players using it to play newer-gen Xbox Series games via streaming; and people playing games via streaming, sans any console, “in markets where consoles are less available or affordable.” (That latter use case could even be relevant in Xbox’s home market soon, as console prices keep rising.) Take Two Interactive chairman Strauss Zelnick recently told investors he expects game-streaming tech, which has been only lightly adopted by gamers for over a decade, to be widely used within three years. 🇺🇸 The Trump administration has published multiple agenda-driven web video games to the White House’s website. One called Build The Wall partially clones Tetris as it asks players to build a wall to stop a “zombie border siege.” While actual Tetris involves clearing lines and basically not building a wall, the Trump-backed game omits the line-clearing aspect (and omits the fun as well). On Instagram, Tetris’ official license holders reacted by stating: “At Tetris we believe in the power of connection and bringing people together, not dividing them. To our fans everywhere: we love you, we see you, and we’re grateful to have you in our community. P.S. The Tetris Company was not involved in the creation of ‘Build the Wall.’ P.P.S.: We take copyright infringement very seriously.” Item 3: The week ahead: Tuesday, September 8 Game releases: Mewgenics (consoles; already out on PC) is an engrossing tactical combat game (with cats). It is getting its console port right after the release of a Star Wars tactics game and ahead of the late September launch of a Fire Emblem–a bumper crop for the genre. Wanderburg (PC) is an auto-shooting game like Vampire Survivors, but you’re a castle on wheels Event: Nintendo airs a 30-minute Nintendo Direct (10am ET) focused on The Legend of Zelda’s 40th Anniversary. A full unveiling of the upcoming remake of The Legend of Zelda Ocarina of Time is expected. Will they also show footage from next year’s live action movie? Tease the next big 3D Zelda? Add Link to Mario Kart World? Shadow-drop a new Tingle game? Wednesday, September 9 Event: Nintendo again! On this day, they’re planning to air a 45-minute Nintendo Direct (10am ET) focused on games heading to Switch 2 this winter. Followed by about an hour of gameplay demoed by the company’s Treehouse team. The September Nintendo Directs are always some of the year’s biggest. The 2025 edition included announcements of several major 2026 Switch/Switch 2 games: Pokémon Pokopia, Mario Tennis Fever, Yoshi and the Mysterious Book, Fire Emblem Fortune’s Weave. Plus the return of the Virtual Boy. Friday, September 11 Game release: EA Sports NHL 27 (PlayStation, Xbox) is a hockey game. There are so few that an indie studio that had been making wacky sci-fi first-person shooters just announced that, hey, we’re going to fill a void and make a hockey game for PC.
Your older Pixel phone may finally be getting Quick Share AirDrop support
Your Pixel 7 or Pixel 8 looks like it's about to get AirDrop/Quick Share support, just like all the newer Pixel phones.
Google Pixel adding ‘Battery usage summaries,’ rolling out on Pixel 10 and newer
A new "battery usage summaries" feature is rolling out on Google Pixel devices starting with the Pixel 10 series and newer.
Nexus Mods acquires the popular community site SteamDB
Something quite unexpected here - the newer owners of Nexus Mods have now acquired the popular community website SteamDB, a site that many rely on.
Model Helps Scientists Build Better Protein-Degrading Therapies
A team of Weill Cornell Medicine investigators has developed a computer model that will help scientists more efficiently develop protein-destroying therapies, a newer type of treatment that is particularly promising for cancer.
Scientists challenge a 70-year-old “lizard brain” myth
A long-standing picture of brain evolution as newer, rational layers stacked on top of an ancient “lizard brain” may be deeply misleading. Researchers found that evolution instead appears to balance two competing styles of brain wiring, expanding one while shrinking the other depending on what an animal needs to survive.
Women’s Equality Day highlights Portland’s women-owned businesses
Women’s Equality Day on Aug. 26 spotlights the 19th Amendment and women-owned businesses powering Oregon’s economy. Women own 39% of employer firms, from Portland staples to newer community hubs like The Sports Bra.
Apple Retail Stores Preparing for New Home Product Launches
Bloomberg's Mark Gurman reports that Apple is reorganizing parts of its brick-and-mortar stores this fall to make room for new home products. Writing in his latest Power On newsletter, Gurman says the teams responsible for store layouts are preparing changes to the "Avenues," or the perimeter walls in Apple's newer stores, where accessories like HomePod, Apple TV, AirPods, and Beats are displayed alongside third-party accessories.
WHO RUNS MARYLAND POLITICS NOW?
ByThe Maryland Wire The Machine Didn’t Die — It Broke Apart Mike Miller is gone. Steny Hoyer is retiring. The two men who helped define Maryland political power for generations are disappearing from the map. Nobody has inherited all of what they controlled. Instead, Maryland power has fractured among Wes Moore, legislative leaders, county organizations, federal figures and a new generation fighting to connect the pieces. By The Maryland Wire For decades, there were two names in Maryland politics that required almost no explanation. Mike Miller. Steny Hoyer. You didn’t necessarily have to agree with them. You didn’t even have to like them. But everyone understood something: Not social-media power. Not cable-news power. Not the temporary power that comes from one big election. They possessed political infrastructure. Relationships. Institutional memory. Donors. Staff. Allies. County leaders. Lobbyists. Legislators. Operatives. And the ability to connect people who needed something with people capable of delivering it. Today one is gone. The other is preparing to leave Congress after more than four decades. And Maryland faces a question it hasn’t had to answer in generations: The answer may be: Nobody. At least not the way Miller once did. Maryland’s old machine wasn’t inherited by one person. It fragmented. And now several ambitious political networks are competing to assemble the pieces. Miller presided over the Maryland Senate for 33 years, becoming one of the longest-serving legislative leaders in American history. He stepped down as Senate president in 2019 and died in January 2021. (Behavioral and Social Sciences) But Miller’s real power wasn’t the title printed on his door. It was the accumulation of relationships behind it. Miller came from Maryland’s old Democratic organization and developed into an extraordinarily adaptable political operator, retaining authority even as the Senate around him became younger and more liberal. (The Washington Post) He understood something fundamental: politics is information. Who wants what? Who owes whom? Which senator needs help? Which county executive wants something in the budget? Which committee chairman can move a bill? Which lobbyist represents which client? Which candidate should receive support today because that candidate could be a senator ten years from now? Miller knew the answers because he’d spent decades collecting them. Miller’s influence wasn’t confined to elected officials. Former Miller aides became prominent Annapolis lobbyists. Maryland Matters noted figures such as Joseph Bryce and Timothy Perry among the high-profile lobbyists who had once served as top Miller aides. (Maryland Matters) That was one of Miller’s greatest political achievements. He didn’t merely accumulate power around himself. He produced alumni. Staffers became lobbyists. Legislators became committee chairs. Allies became power brokers. And decades of relationships reinforced one another. By the end, Mike Miller wasn’t simply a person. He was an ecosystem. Hoyer’s network was different. Miller’s power was rooted in Annapolis. Hoyer connected Maryland to Washington. He served in the Maryland Senate before winning election to Congress in 1981 and ultimately became one of the longest-serving members of the U.S. House and a longtime No. 2 in House Democratic leadership. In January 2026, Hoyer announced that he would retire rather than seek another term. (The Washington Post) His influence stretched through: Prince George’s County, Southern Maryland, Congress, federal agencies, donors, campaign organizations, and generations of Democratic candidates. And Hoyer had something machine builders value enormously: a succession network. That became obvious almost immediately. When Hoyer announced his retirement, Maryland’s 5th Congressional District exploded with candidates. Twenty-four Democrats entered the race. But when the votes were counted, the winner was Adrian Boafo, Hoyer’s former campaign manager. Boafo wasn’t running without establishment help. He was endorsed by Hoyer. He was endorsed by Governor Wes Moore. And he ultimately won the Democratic nomination. (AP News) In his victory speech, Boafo described the result as voters deciding it was time to “pass the torch to a new generation of leaders.” (AP News) That phrase captures the transition perfectly. Hoyer’s seat isn’t simply being vacated. Parts of his network are being transferred. But they aren’t being transferred to another Steny Hoyer. They’re being absorbed into a newer political constellation. And standing prominently inside that constellation is Wes Moore. If someone forces you to name the single person sitting nearest the center of Maryland Democratic politics today, the answer is Governor Wes Moore. The 2026 Democratic gubernatorial primary underscored the scale of his position. Moore won renomination overwhelmingly, receiving roughly 88% of the Democratic primary vote. (WBAL-TV) But raw votes tell only part of the story. Look at the party infrastructure. The Maryland Democratic Party says Steuart Pittman ran for state party chairman in 2025 “at the suggestion of Governor Wes Moore.” Pittman took office that July. (The Maryland Democratic Party) That’s important. Governors traditionally influence their state parties. But party leadership plus fundraising, endorsements, executive appointments and national relationships creates the beginning of something bigger: a political network that could survive the governor’s term. Moore also played a role in the Hoyer succession by backing Boafo. That’s how political organizations reproduce themselves. You support tomorrow’s politician today. And that’s the distinction that matters. Moore has enormous statewide visibility. Miller had decades of accumulated legislative control. Moore can endorse candidates. Miller could influence the environment in which legislators lived every day. Committee assignments. Leadership positions. Legislative priorities. Relationships that had been accumulating since before many current lawmakers entered politics. Moore may have a larger national profile than Miller ever possessed. But he doesn’t possess Miller’s half-century of Annapolis memory. Nobody does. Which is why the modern Maryland political structure looks less like a pyramid and more like several power centers connected by overlapping relationships. One of those centers belongs to Senate President Bill Ferguson. Ferguson controls an institution no governor can simply command. The Senate. Maryland’s official 2026 legislative records identify Ferguson as Senate President. (Maryland General Assembly) That means influence over: committee structure, Senate leadership, legislative priorities, confirmations, and negotiations with the House and governor. But Ferguson is not Mike Miller 2.0. Miller’s extraordinary longevity allowed him to become almost inseparable from the institution. Ferguson possesses the office. Miller possessed the office plus decades of political mythology and accumulated relationships. Those aren’t the same thing. The House now has its own new center of gravity. Official 2026 legislative records identify Joseline Peña-Melnyk as Speaker of the House of Delegates, alongside Ferguson as Senate President. (Maryland General Assembly) That makes the current Maryland governing triangle: Executive power. Senate power. House power. None fully controls the others. And that fact alone demonstrates how different modern Maryland is from the Miller era. The governor proposes. The legislature disposes. Committee leaders negotiate. County interests intervene. And political coalitions shift issue by issue. That’s not one machine. That’s a networked power structure. Then there’s U.S. Senator Angela Alsobrooks. Her significance isn’t that she is the new Hoyer. She isn’t. Hoyer spent decades constructing his network. Alsobrooks brings something different: Prince George’s County roots, a statewide electoral organization, a United States Senate platform, and relationships with national Democratic leaders. That makes her a critical bridge between Maryland and Washington at precisely the moment Hoyer leaves. Hoyer’s retirement therefore doesn’t necessarily weaken Prince George’s influence. It changes who carries it. Prince George’s itself is undergoing a dramatic generational transition. Official 2026 results show Aisha Braveboy winning the Democratic County Executive primary with 87,944 votes and 73.31% of the vote. (Maryland State Board of Elections) That’s political infrastructure. Prince George’s is one of Maryland’s central Democratic vote engines. A county executive with that level of primary support gains: appointments, budget influence, organizational relationships, donor access, and a platform for cultivating the next generation of political leadership. Braveboy therefore isn’t merely another person on the Maryland power map. She controls a place from which a political organization can be built. Boafo is particularly interesting because he sits almost perfectly at the intersection between the old and new worlds. He worked for Hoyer. Hoyer endorsed him. Moore endorsed him. Then Boafo beat an enormous Democratic field for Hoyer’s seat. (AP News) That doesn’t make him powerful on Hoyer’s scale. He’s just beginning. But it illustrates how power actually transfers: not through a ceremonial handoff, but through endorsements, donors, staff, relationships, and voter confidence. Boafo may become Hoyer’s congressional successor. He will not automatically inherit Hoyer’s 40-plus years of political capital. That part has to be rebuilt. This is the part that often gets overlooked. When a machine breaks apart, power doesn’t only move upward. Some people’s relationships become less valuable. Former Miller aides still know Annapolis. Former Miller allies still possess institutional memory. Veteran lobbyists don’t forget how legislation works. But something fundamental disappeared when Miller did: the common center. The person capable of connecting all of them instantly was gone. That changes the value of a political network. Imagine knowing everybody in Annapolis. Useful. Now imagine the person who introduced many of those people, appointed committee chairs, influenced Senate priorities and understood decades of relationships is simultaneously Senate President. Much more useful. Remove that person and the individual relationships remain. But the system becomes decentralized. First: Bill Ferguson. The Senate’s institutional relationships now run through his leadership rather than Miller’s. Second: the House leadership. With the Miller-Busch generation gone, today’s House leaders are building their own committee chairs, alliances and relationships. Third: Wes Moore. Moore became governor after Miller was gone. That distinction matters. Earlier governors had to operate with Miller sitting across State Circle. Moore entered office during a generational reset. Instead of negotiating with the old machine, he has the opportunity to help build the next network. Fourth: Angela Alsobrooks and the emerging Prince George’s generation. Hoyer is leaving. Miller is gone. The county’s political leadership now belongs to another generation. Fifth: politicians who were outside the old Miller organization. When someone dominates an institution for 33 years, inevitably some politicians develop within that organization and others outside it. Miller’s departure created room for people who may never have risen as quickly under the old structure. That’s the biggest point. If Mike Miller’s power had simply transferred to Bill Ferguson, Maryland would still have a machine. If Hoyer’s influence simply transferred to Boafo, Maryland would still have a machine. If every county leader simply took orders from Moore, Maryland would have a machine. None of those things happened. Instead: Moore controls the statewide executive platform. Ferguson controls the Senate. Peña-Melnyk controls the House. Alsobrooks has statewide and federal reach. Braveboy has Prince George’s executive power. Pittman leads the state Democratic Party after Moore encouraged him to seek the role. (The Maryland Democratic Party) Boafo represents the beginning of the post-Hoyer congressional generation. And Baltimore, Montgomery County, organized labor, donors and other county organizations maintain their own centers of influence. That’s not one machine. If you want to understand where Maryland power is moving, don’t simply watch office titles. Watch endorsements. Who does Moore support? Who does Alsobrooks support? Who gets Ferguson’s allies? Who gets House leadership? Who gets Hoyer’s blessing? Who gets labor? Who gets major donors? And most importantly: That is where the new Maryland network becomes visible. The Boafo race was a textbook example. Hoyer’s successor didn’t emerge randomly from 24 candidates. He had ties to the outgoing incumbent and support from the governor. The old network and the emerging one overlapped. And voters chose him. (AP News) Moore may ultimately become the most important person in determining whether Maryland develops another durable statewide political organization. But the test isn’t whether Moore himself remains popular. The test is what happens to the people he supports. Which delegates become senators? Which senators become committee chairs? Which county officials become executives? Which staffers become candidates? Which appointees become statewide leaders? Who gets his donor network? Who gets his political advisers? Who eventually gets his endorsement when Maryland faces a post-Moore gubernatorial succession fight? That’s how we’ll know whether Moore was merely a successful governor— or the founder of another generation of Maryland power. There’s another category worth watching: politicians who came from Miller’s Maryland but remain active in the new one. Dereck Davis is one. Anthony Brown is another. Veteran legislators and former officials throughout the state still possess old relationships that newer politicians don’t. These people can function as bridges. That’s important because political systems rarely reset completely. The new machine usually grows partly from pieces of the old one. Donors don’t disappear. Lobbyists don’t disappear. Operatives don’t disappear. Institutional memory doesn’t disappear. They find new centers of gravity. If you want one name: His overwhelming 2026 Democratic renomination, executive authority, national profile and influence within the Maryland Democratic Party make that difficult to dispute. (WBAL-TV) But saying Moore “runs Maryland” the way Miller once ran the Senate would oversimplify the reality. Maryland power today looks more like this: WES MOORE Statewide organization.Appointments.Fundraising.Executive government.National Democratic relationships. BILL FERGUSON The Senate.Committees.Confirmations.Legislative leverage. JOSELINE PEÑA-MELNYK The House.Committee leadership.Budget and legislative leverage. ANGELA ALSOBROOKS Statewide electoral organization.Federal platform.Prince George’s relationships.National Democratic connections. AISHA BRAVEBOY Prince George’s executive organization.County government.A major Democratic vote base. THE POST-HOYER GENERATION Boafo and the emerging political class that will have to rebuild Hoyer’s Washington-Maryland network rather than simply inherit it. It did something more interesting. Mike Miller’s influence was too personal, too old and too deeply rooted in his own relationships to be inherited whole. Hoyer’s network is too extensive and too intertwined with decades of congressional politics to fit neatly inside one successor. So the pieces are moving. Toward Moore. Toward Ferguson. Toward Peña-Melnyk. Toward Alsobrooks. Toward Braveboy. Toward younger candidates and new county organizations. And toward veteran political survivors who understand both eras. That’s the next chapter of Maryland politics. The person who eventually connects: Annapolis, Prince George’s, Montgomery County, Baltimore, labor, business, donors, the Maryland Democratic Party, and the congressional delegation will possess something Maryland hasn’t truly seen since Miller’s heyday. Not merely another elected official. And maybe that’s why searching for “the next Mike Miller” is the wrong exercise. There may never be another one. The more important question is: Miller spent half a century becoming that person. Hoyer spent decades becoming another version of it. Maryland’s current political leaders are still competing for the privilege. And until somebody actually connects all those pieces, the most accurate answer to the question “Who runs Maryland?” may be the most fascinating one of all: No one does. Not anymore. But there are plenty of people trying. Sources University of Maryland and Maryland Matters — Miller’s 33-year Senate presidency and political legacy. (Behavioral and Social Sciences) Washington Post historical reporting — Miller’s rise from Maryland machine politics and ability to retain power as the Senate evolved. (The Washington Post) Maryland Matters — former top Miller aides who moved into Annapolis lobbying and the changing Senate power structure. (Maryland Matters) Washington Post and Reuters — Hoyer’s January 2026 retirement announcement after more than four decades in Congress and his long Democratic leadership career. (The Washington Post) Associated Press — Adrian Boafo’s 2026 victory in the Democratic primary to succeed Hoyer, including Hoyer and Moore’s support and Boafo’s “pass the torch” remarks. (AP News) Maryland Democratic Party — Steuart Pittman’s official biography stating that he sought the state chairmanship at Moore’s suggestion. (The Maryland Democratic Party) Maryland General Assembly — official 2026 records identifying Bill Ferguson as Senate President and Joseline Peña-Melnyk as Speaker. (Maryland General Assembly) Maryland State Board of Elections — official 2026 Prince George’s County results showing Aisha Braveboy’s dominant County Executive primary victory. (Maryland State Board of Elections) 2026 election reporting — Moore’s overwhelming Democratic gubernatorial primary victory. (WBAL-TV)
AMD’s AM4 CPUs Like The Re-Launched Ryzen 7 5800X3D Deliver Negligible Gaming Improvements In Newer Motherboards, Making Older Hardware Relevant During DRAM Crisis
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GPU market evolves backwards as modded RTX 3080 20GB cards return as cheaper gaming alternatives
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MrBeast Sales Slow, Angel Stock Falls, MUBI and Neon Look for Hits, and Will an NBA Franchise Set a Sales Record?
(Welcome to the Entertainment Strategy Guy, a newsletter on the entertainment industry and business strategy. I write a weekly Streaming Ratings Report and a bi-weekly strategy column, along with occasional deep dives into other topics, like today’s article. Please subscribe.) You probably remember egg prices spiking a few years ago. This led to a lot of debate between the pro-market/pro-competition/antitrust/Neo-Brandesian crowd and the center/center-right/center-left/abundance/libertarian crowd over the cause, whether it was the avian flu outbreak or whether industry consolidation led to price fixing, using avian flu as a convenient cover. Basel Musharbash wrote a whole investigation at BIG looking at it. Well, two years later, we have our answer: it was price fixing. The Justice Department found proof, via emails, of price fixing. Indeed, just the threat of an investigation brought prices down two years ago: I bring this up because at least half a dozen of my favorite political writers and pundits, who were skeptical about price fixing at the time, haven’t written any mea culpas on this issue. It’s really dispiriting and makes it much, much harder to trust their work on other issues. If you take a hard stand on an issue, then you get it wrong, you need to explain how and why you got it wrong. Or update your priors. This is how epistemological bubbles are formed! All of which is to say, it’s time for another installment of “What I Got Right, What I Got Wrong”. Last issue, I mostly focused on the “wrong” side of the equation, so today’s is a bit more balanced, but with one big mea culpa (though I still stand by my original concerns). Let’s dive right in! Subscribe CORRECTION: UFC Didn’t Release Subscriber Data (But Seems to Have Bragged About It Internally) In my analysis of the viewership of UFC Freedom 250, I wrote... “Paramount has also released datecdotes bragging about their subscriber numbers. Earlier this year, they claimed that the first UFC fight on Paramount+ brought in 1 million subscribers.” Well, that datecdote did not come from a PR rep, but from great reporting from James Faris at Business Insider. The actual quote was this: “Paramount’s flagship streaming service generated about a million new subscribers on the day of its first-ever UFC event, Paramount product chief Dane Glasgow told employees in a town hall on Tuesday morning, three staffers who attended the meeting told Business Insider.“ This wasn’t the biggest goof in the world; even Faris emphasized to me that this is more a “clarification” than a correction. Still, it sounds like, internally, the folks at Paramount were very happy about this result—and I’m guessing they were happy with this news getting out—even though the gains didn’t last through the quarter, dropping to 700K adds. RIGHT: MrBeast’s Struggles Continue... I’m very skeptical about MrBeast’s burgeoning media “empire” and, in particular, its $5 billion valuation, as I wrote earlier this year and last year. Sure enough, according to Business Insider, regarding its “booming” consumer products division_:_ “US sales volume grew 13% year-over-year in 2025, following a 33% leap the previous year, according to a presentation deck dated May 2026....A February 2025 investor deck viewed by Business Insider showed Feastables’ net revenue more than doubled in 2024 from 2023, to $215 million, and was forecast to grow 74% in 2025, to $375 million.” [Emphasis mine.] If you told investors that you projected 74% growth but delivered 13%,1 that’s not ideal. But it’s not just MrBeast. Logan Paul and KSI’s Prime had sales drop in half for their energy drinks. It’s one thing to build a successful entertainment company and an entirely different thing to succeed in the heavily-consolidated-but-also-very-competitive consumer packaged goods space! CPGs are dominated by a few firms with very wide moats compared to YouTube, which has few barriers to entry. These businesses require different skill sets and have completely different business environments. WRONG: Does the NBA Have an $8 Billion Bidder? Almost as soon as I published my article about the NBA’s finances, casting skepticism on NBA expansion, I saw this Front Office Sports headline: One group “claims to have already raised $8 billion” for the Vegas expansion team. I mean, wow. That’s just $2 billion less than what the Los Angeles Lakers were valued at when they were sold just last year. And they’re arguably the most popular team in the NBA. (Side note: the new owner is now under an investigation for fraud in how he went about financing the Lakers and the Dodgers purchases.) So much for the “dried up” language I used in that article. (This is why I usually stick to my “Entertainment Nuance Guy” tone in articles...) I went off old information—from April, when I read/heard about the NBA downplaying expansion efforts—instead of doing a quick double-check for new news. That said...if you read the article, the market for Seattle is “slow”, with just one reported bidder. So I wasn’t entirely off. This goof has annoyed me since I first published it, mainly because it undercut that article’s real point, which I stand by: NBA franchises are really overvalued right now. Now, I get why NBA teams are overvalued. When it comes to owning sports teams, it’s basically never wrong to assume that some rich person somewhere will care more about owning a team (or just being part of a group since they’re so expensive) than the actual financials. There are only so many teams to own, and opportunities to buy in preferred markets don’t come along very often. This explains why the teams sell for such high multiples (usually above a 10 to 12.5 revenue multiple, which is very high). You only need one person to overpay! Beyond the ultra-wealthy luxury good explanation, I worry NBA teams are becoming speculative assets. More and more private equity investors are buying into NBA teams. But the value, in owning a team, comes from selling it later, not any meaningful relationship to revenue or profit growth. In other words, the newer NBA owners are increasingly expecting someone later to buy their inflated asset. That’s not sound economics; that’s the “greater fool” theory at work.2 At some point, actually making money has to matter. Especially since revenue growth is now below the growth of the stock market. (And this matters because the NBA doesn’t have easy levers to pull to drastically lower their costs—half of their revenue has to go to players and then you actually have to run a team, including coaching, training, travel, media expenses, and more—or raise revenues aside from one-off expansions in America and overseas.) I just don’t see how investors make their money back buying NBA teams, except for selling at a higher price later on down the line. But if revenue/profit growth continues to slow, at some point, someone will be left holding the bag. RIGHT: Baseball and Basketball are about equally popular. Related to the above, I wanted to cite two quick pieces of evidence for one of my other theories: that the NBA and MLB are about as popular as each other, but the NBA gets much, much better media coverage. One YouGov survey has that fans prefer basketball to baseball by 52% to 48%, which I’m guessing is within the margin of error for that poll. That’s virtually even, meaning they’re about the same popularity. Over on NBC, a recent Red Sox-Yankees game averaged 4 million viewers, higher than Sunday Night Basketball’s average of 3.4 million on the same network. A Yankees-Dodgers game averaged 3.9 million two weeks ago. Not every game averages this much, but it shows you that baseball isn’t far off from basketball, depending on the matchup. Altogether, the NBA is just slightly more popular than baseball, but NBC is paying MLB a fraction of what they pay the NBA, a point I’ve made before. RIGHT: Angel, MUBI and Neon Updates... I’ve long been skeptical about many of Hollywood’s buzziest startups/smaller indie studios. It’s not that they don’t make great movies—films like Anora and Everything Everywhere All at Once are amazing—or that they’re not (rightfully) pushing the majors to make better films, but...they get a ton of hype, and that hype often doesn’t live up to the reality or difficulty in scaling up. Starting with MUBI, well, The Wall Street Journal wrote a feature on MUBI’s struggles last April, best summarized by the subheader “After Sequoia valued Mubi at $1 billion, a left-wing revolt sent the indie film company into a tailspin”. MUBI lost $7.3 million on $200 million in revenue in Q4 2025, but reportedly hit a record 1.7 million subscribers at the end of Q1. As for Neon, Department M purchased a “significant stake” in the company earlier this year. How much is that “stake” worth? According to Deadline, “No financial figures for the Neon-Department M deal were disclosed.” So...that’s not great! If it was a big valuation, we’d hear about. Also, I found this curious: “Both Neon and Department M already have separate partnerships with Qatar. The Qatar Film Committee has a slate deal in place with the former, and a biopic production pact with the latter.” Color me skeptical about much Middle Eastern investment dollars. See: LIV Golf. Finally, as for Angel (formerly Angel Studios), their stock very, very slightly popped last month after Young Washington ($20 million budget) which made $45 million in the US, but their stock is still way down from its opening. Smaller Updates RIGHT: The WGA should focus on antitrust concerns! I’ve been on this for years. Post-WGA/AMTPT deal in 2023, I wrote an article for the Ankler calling on the WGA to focus and organize against industry consolidation. Sure enough, the WGA filed a lawsuit against the Paramount-WBD merger, and people are organizing around this issue now. I wish this energy had coalesced earlier (specifically to lobby Washington much earlier), but better late than never! WRONG: Actually, the chip shortage might be due to market manipulation. In my last “Long Reads for the Long Summer” article, I shared an article about how LLMs are causing memory chip prices to spike, which will make all electronics more expensive. Well, turns out, three RAM manufacturers control 90% of the market, and now a private lawsuit accuses them of price-fixing. So yeah. WRONG/UPDATE: The Odyssey will hold! Two weeks ago, I wrote, “As of this moment, we haven’t had a super-blockbuster, though The Odyssey, Spider-Man: Brand New Day and Avengers: Doomsday could all cross the $500 million mark. (At this point, The Odyssey would need a very strong hold to get there.)” Well, it’s safe to say it’s going to have that hold! It only dropped 30% in weekend two and IMAX screenings are sold out all month. Spider-Man: Brand New Day is also off to a great start. RIGHT: People are rushing to get shows out yearly. I’ve long been bullish on yearly, weekly-released shows, and Leslie Goldberg at The Ankler wrote about how many people in town are now listening. WRONG: Mark Carney reverses Canada’s stance on homegrown production. After writing about Canada installing domestic production quotas, Canada has backed off. WRONG: I don’t trust Spider-Man: Brand New Day’s online “views”. When I originally wrote about the latest Spider-Man film’s record-breaking trailer, I thought this was just YouTube views, but after watching this Corridor Crew video and doing more research, well, it’s all social views of the trailer globally. Really? That stat includes TikTok, Reels and YouTube Shorts views. Basically, I don’t trust it anymore. (This film will probably set record, but I trust the pre-sales data more.) RIGHT: Celebrity Production companies are still struggling. I’ve written about this for years, but the company that I didn’t track was Kevin Hart’s HartBeat, which was valued at $650 million but is struggling now and might just end soon, especially after Kevin Hart pulled his endorsement deals. And Bad Robot is moving to NYC. CORRECTION: SpongeBob is a “second run” title. In my 2025 recap article, I had _SpongeBob SquarePants_labelled as a “library” title, when it is still a “second run” show, with new episodes still coming out on Nickelodeon. CORRECTION: In my last “What I Got Right, What I Got Wrong” update, I offered a correction from Doug Creutz and misspelled TD Cowen. Thanks, Grammarly! 1 Though he could have increased prices to make up for the gap, he couldn’t have increased them that much. 2 There’s a theory, which I think that Daryl Morey created and Bill Simmons popularized, that, to be successful building your team, you only need a handful of bad GMs in the league to take advantage of. To be clear, Daryl Morey’s theory was also for signing bad contracts, that you could always get out of bad contracts. Basically, there’s always someone who will make a bad trade. It’s not the same exact thing, but similar enough to the Greater Fool Theory that I really like it.
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Hungary moves to overhaul university models banned from Horizon Europe
Hungary’s new government is aiming to overhaul the governance model of the institutions and universities that lost access to Horizon Europe and Erasmus+ funds “in a short timeframe,” according to Péter Horváth, the new state secretary for science policy and innovation. “As of today, the two non-university foundation-controlled institutions under my remit have been transformed,” he told Science|Business. “We hope the universities will follow and that this will be enough to satisfy the EU’s demands.”Under the previous government, led by Viktor Orbán and his Fidesz party, many academic and scientific institutions were restructured and made into special public trust foundations, with members strongly linked to the government given lifelong mandates and significant decision-making powers with little oversight. The European Commission deemed that this undermined academic freedom and transparency in the country, leading to a ban on 34 institutions in 2022, including 21 universities, which saw academics in Hungary lose access to Horizon Europe grants. The new Hungarian government, elected in May and led by Péter Magyar and his Tisza Party, has promised to dismantle this governance model and restore the institutions to EU programmes. As a result, the European Commission has promised to return access to the Erasmus+ education mobility programme, but so far no concrete agreement has been made on the Horizon Europe programme for research and innovation. Hungary has already made legislative changes in June to allow the institutions to be reformed and set a timeline for the implementation.The non-university foundations, which are mainly cultural centres such as the Foundation for Hungarian Culture or the Makovecz Campus Foundation, will all be dissolved by August 31 this year, a date tied to EU-set milestones that Hungary must meet to unlock frozen funds, with control transferred to relevant ministries. Meanwhile, the universities will have until 31 August 2027. For each university foundation, the government will set the dissolution date and the body to take over operations. There is no final decision on a permanent new model for the universities, according to Hungarian MEP Eszter Lakos, who is shadow rapporteur for the Horizon Europe specific programme, a separate piece of legislation detailing implementation rules for the EU’s next research programme, due to start in 2028. “The aim of the transition year is to settle this with [the universities], not to impose a model, and not to put them under state control,” she told Science|Business. “The goal is to give academic independence back to universities.”There are three models that are most likely to be implemented. One would be a return to a traditional, state-run model. Another could be a newer, more self-standing public institution. A third option would be a reformed version of the foundation models that meet EU standards. According to Lakos, the dismantling of the system put in place by the Orbán government is well underway and if all goes according to plan, Hungary could regain access to EU research money by the start of the next academic year in 2027. “I believe that the Hungarian government is doing the necessary changes so the universities could return as beneficiaries to Horizon from the next school year,” she said. In the meantime, “the universities, institutes and cultural assets carry on under proper public stewardship rather than a handful of unaccountable trustees,” said Lakos. The laws passed in June impose new safeguards: board terms are capped at four years and renewable only once, appointments are made through open competitions and sitting politicians cannot join joining these boards.It remains unclear whether a domestic science funding programme set up as a back-up scheme by the former government following the EU funding ban, called HU-rizon, could be continued. “This programme should never have had to have been established in the first place, but it has proven to be quite popular,” he said. “I am considering continuing this programme with a refined focus on helping international collaborations.”Re-organising the research network One of the first priorities for Horváth and his cabinet is to resolve questions over the future of the Hungarian Research Network, Hun-Ren. The network of academic institutes was taken away from the Hungarian Academy of Sciences in 2019 and turned into a quasi-private organisation, with similarities in its governance to the public trust foundations.Horváth and his team have consulted over 5,000 representatives from the network and the conclusion is broad unhappiness with the directors of all the institutes involved. “We have presented the results to the president and the chief executive of the network and this is currently being discussed,” Horváth said. The plan is to re-integrate the network back into the Academy of Sciences but in an improved way, “learning from mistakes of the past,” he added. The government also wants to reintegrate four humanities and social science research centres into the network that the previous government had transferred to Eötvös Loránd University. The transfer brought sharp criticism from the academic community, with a group of Hungarian research heads, including European Research Council grant recipients, sending an open letter to Orbán warning that the transfer would “cause historically significant harm to the entirety of Hungarian scientific life.” The transfer was “one of the biggest shames in Hungarian research in the past 20 years,” Horváth said. “We want to immediately re-integrate them back into the research network and to regain the trust of these institutions, because the way they were treated was really unfair.”Another pressing issue is the Élvonal Excellence Research and Talent Development Foundation, led by Nobel laureate Ferenc Krausz. The foundation signed a financing agreement with the former government earlier this year for a budget of over €730 million over the next five years. The goal is to create a world-class centre to attract top talent from abroad and to develop local researchers. But there was little transparency about this foundation, and news of its huge budget, which is nearly as much as Hungary’s entire research budget, caused a stir in the media following the recent elections. Another issue is that, as with the foundation boards of the institutes banned from Horizon Europe, there was little-to-no oversight of decisions led by Krausz. “It was an excellent idea but an unacceptable execution,” Horváth said of the foundation. “The fact that this is out of the Hungarian funding scheme, mostly concentrating on one person who decides on the budget is unacceptable for us.”The government plans to merge the centre with the National Research, Development and Innovation Office, the country’s R&D funding agency, with a reduced budget. Horváth is hopeful that Krausz will still be involved. The new government’s R&D goalsA phrase that crops up regularly during the discussion with Horváth is “democratic process.” The new state secretary is determined to involve Hungary’s research community in shaping future policies. This marks a departure from the previous government’s approach, and several people in Hungary’s research community have commented on the openness of the new government. In terms of concrete goals, Horváth and his team already have plans. He wants to create a new science fund in Hungary, based on the best practices of other European countries. The fund would not be tied to annual government budgets and would provide long-term, stable financing. “If we were to succeed in creating this fund, then I think it would be one of the biggest achievements for me in this period of government,” Horváth said. On the innovation side, he is looking into how best to bring in the private sector. “We want to make sure that we are working with the private sector to support innovation,” Horváth said. One of his big aims is to introduce entrepreneurship teaching into high schools. Hungary already has a reputable national academy offering research and innovation training in the field of natural sciences, and Horváth wants to expand this to all disciplines and across the whole country. “One of the main ways to elevate our innovative businesses is to teach our children to be innovative,” he said. “This will probably need ten years to pay off, but this is what we should do. Our aim is to make Hungary strong in our region, and this is what is needed.” Related articlesHungary’s Horizon Europe performance in numbersCommission unlocks Erasmus+ cash for Hungary, Horizon could be next‘Academic Huxit.’ Hungarian researchers speak out on impact of EU ban A more difficult task will be funding. The new government is aiming to increase research spending to 2% of the GDP by 2030, and then increase it to 3% in line with EU objectives. Currently, spending sits around 1.3%. But according to Horváth, the current budget, inherited from the previous government, is “heavily in the negative,” so any plans to increase research spending will have to start next year. Achieving 2% by 2030 already needs a big push, almost doubling the research budget. “This is something we’d definitely like to reach, and something I can see us achieving,” he said. “From the 2030s, I’d like to see an innovative generation growing up that can help us reach the 3% target.” Positivity in the new governmentDespite the many challenges facing Horváth and his team, the mood is positive. “It feels a bit like a start-up right now. Everyone is working 24/7, day and night, trying to do as much as they can. There is a lot of energy,” he said. It is a big change for the state secretary who, like many in his cabinet, is coming from a background in research or business, and not in politics. “Six weeks ago, I was sitting with my microscope and my research PhDs, so it’s been a big change for me,” said the computer scientist, who was previously the director of the Institute of Biochemistry at the Hun-Ren Biological Research Centre in Hungary and worked at the Institute for AI for Health at Helmholtz Munich. But he is relishing the task to transform the country’s R&D landscape. “We feel enormous support from the Hungarian people, but also from Europe,” he said. “We’ve received a lot of letters of support from around Europe. There is big trust there, and huge responsibility on our side. We want to get everything back on track, and there’s a lot to do.”
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Is SMIC N+3’s Metal Pitch Smaller than Intel 18A’s?
Almost four years ago, we published that SMIC had started shipping 7 nm (N+1) chips. Now, SMIC is shipping its third-generation 7 nm (N+3) process in Huawei’s Kirin 9030, with a minimum metal pitch of 32.5 nm, about 10% tighter than the 36 nm minimum metal pitch shipping in Intel’s latest Panther Lake CPUs on 18A. The headline is true, but incomplete cherry picked metric. N+3 reaches the density of TSMC N6 through aggressive DUV multi-patterning and design-technology co-optimization (DTCO), but it pays for that in complexity, efficiency and process control. We found this and more in our reverse engineering and teardown where we cover SMIC’s N3 process technology, Huawei’s packaging, memory, architecture, and more. SemiAnalysis has been building a state-of-the-art teardown lab in Oregon capable of analyzing the world’s most advanced and important chips over the last year and half. We have already generated revenue on advanced datacenter chip teardowns including our recent reverse engineering of a major TSMC customer’s COUPE CPO optical engine + EIC 3D stack. This is the first public report from the SemiAnalysis Teardown Engineering & Evaluation Lab, or STEEL for short. The lab is aggressively scaling up and out and we’re excited to announce it publicly. This is a bit of inconvenient timing for TechInsights as they are private equity owned and currently being sold while having enjoyed virtually no credible competition for decades. This has led to TechInsights underinvesting in CAPEX. SemiAnalysis exceeds TechInsights in revenue despite no venture or private equity ownership and being founded only 6 years ago. Because we have no external investors and are founder led, we move faster, build faster, and we can release client chip teardowns for free regularly, while focusing on datacenter for our major clients. Here’s the first public image from our lab, the HiSilicon Kirin 9030 Pro SoC: This report will detail our teardown of the Kirin 9030 and our findings on SMIC’s N+3 process, the most advanced in China. For comparison, we’ll show our teardown of the MediaTek Helio G99, made on TSMC N6. Through this comparison, we can look at the effect of export controls – SMIC N+3 and TSMC N6 are comparable nodes, but one is heavily export-controlled, the other free to use the West’s most advanced equipment. Here we see both China’s progress and constraints. SMIC N+3 reaches TSMC N6-class logic density, but it requires far more aggressive DUV multi-patterning, so it does not match N6 on process maturity or cost. The Kirin 9030 Pro performs similarly to three-year-old Android flagships, and trails far behind the current flagship SoCs from Apple, Qualcomm, MediaTek, and Samsung. The efficiency gap is even wider. Export controls have not stopped Huawei and SMIC from shipping advanced silicon, but they have forced a different path. Without EUV, SMIC is leaning harder on DUV multi-patterning, DTCO, and increasingly complex integration. The roadmap continues forward through tighter design rules and backside power, but each step adds cost and process risk. Huawei’s τ scaling and LogicFolding show another path: stacking active logic and recovering density through advanced packaging and system-technology co-optimization (STCO). To understand the Kirin 9030, we must first understand Huawei’s SoC history. HiSilicon is Huawei’s chip design arm, responsible for the Kirin smartphone SoCs, Kunpeng server CPUs, Ascend AI accelerators, and switch/router networking silicon. Before export controls, Huawei was TSMC’s largest customer – the only customer on TSMC’s first EUV node, N7+, and among the first on N5, alongside Apple. That ended in late 2020. Huawei switched to Qualcomm SoCs in its flagship smartphones, though export controls limited them to 4G-only variants. In late 2023, Huawei returned to in-house silicon with the Kirin 9000s, a successor to the Kirin 9000, fabricated on SMIC N+2 instead of TSMC N5. In the following years, they released the Kirin 9010 and 9020 on the same N+2 process. These chips used Huawei’s in-house TaiShan CPU cores and Maleoon GPU. We have not torn down a Kirin 9020 ourselves, so the predecessor die shot is from Kurnal. The die shots show how Huawei spent its silicon budget: which functional blocks are where, and how their areas compare to the predecessor. First, a quick guide to the major blocks on the die. The total die area is nearly identical, but the 9030 uses that area more aggressively. A denser process lets Huawei fit an extra middle CPU core, more GPU and NPU cores, and larger caches into the same footprint. In contrast, the Helio G99 is a much smaller, low-cost SoC, built for budget smartphones rather than a flagship device. While the Kirin 9030 is ~140 mm², the G99 is only ~29 mm², roughly one-fifth the area. The underlying TSMC process technology, however, is directly comparable as a baseline for analyzing SMIC’s. The Kirin 9030 is an evolutionary refresh, not a clean-sheet design. Its CPU, GPU and NPU cores carry over the 9020’s families, and the gains come from three levers: the SMIC N+2-to-N+3 process step, DTCO and floorplan work, and incremental microarchitecture. Area is where the first two show up, and the 9030 scales well here. Performance and efficiency are the harder test. Huawei’s design holds up better than its node would suggest, but the chip still trails, both because N+3 sits behind the leading-edge nodes and because its cores, while competent, remain a few generations behind the newest designs. The new prime core is an incremental update. The main changes are a 10% frequency increase from 2.5 GHz to 2.75 GHz and a doubling in the L2 cache from 1 MiB to 2 MiB. Despite the increased cache, the core size decreased by 7.6%. Excluding the private L2 cache, the core size decreased by 21%. This is a large reduction for an incremental node. Compared with the TaiShan New V120 core in the Kirin 9020, the Kirin 9030’s middle core is almost unchanged architecturally, yet each core shrinks by ~22%. Most of that comes from the move from N+2 to N+3, with layout likely accounting for the rest. Visually, the most noticeable change is the increase from 3 middle cores to 4. There is also a 20% increase in the shared L3 cache of the big cluster. This helps to improve multi-core performance without sacrificing much in terms of area. Even with each core shrinking, the big CPU cluster’s total area is essentially unchanged. The per-core savings went back into an additional middle core and larger caches. The tiny cores shrank less than the prime core (excluding its L2 cache) and less than the middle cores. This is likely because fixed overhead is a larger share on a small core. We cannot resolve any architectural changes from the die shot alone, but the per-clock and efficiency gains shown below point to more than pure process and layout scaling. The area reduction was offset by a doubling of the shared L2 cache from 2 MiB to 4 MiB, leaving the total tiny CPU cluster area slightly larger. Area is the easiest improvement to see from a die shot, but it is only one part of PPA (power, performance, area). For modern logic, power and performance matter just as much, and often more. Since Dennard scaling broke down in the mid-2000s, voltage and frequency have not scaled in step with transistor dimensions, so each node has had to fight harder for gains in performance and efficiency. The starkest comparison is not Kirin 9020 versus Kirin 9030 Pro. Apple’s efficiency cores run circles around Huawei’s prime core. Apple’s low-power core delivers 20% higher integer performance while drawing only 1 W, compared with 4.5 W for Huawei’s prime core. N+3 matches TSMC N6, but N6 is several generations old. Apple and Qualcomm build on N4 and N3P, which are denser and sit on a better voltage-frequency curve, giving them a larger transistor budget and more performance per watt. The 9030’s own cores did improve. The middle and tiny cores gained 17% and 14% in per-clock integer performance over the 9020, with floating-point flat on the middle core and up 11% on the tiny. The tiny core improves cleanly, with performance rising while power falls and efficiency increases by 45% in integer and 24% in floating point. The middle core is mixed: integer performance rises but power rises faster, cutting integer efficiency by 7%, while lower power lifts floating-point efficiency 16%. Per-clock gains at the same or lower frequency are microarchitectural, so the cores are tuned, not just shrunk. Both also failed to hold their rated maximum frequencies, pointing to thermal, power, or stability limits. Per clock, the middle core sits around Arm Cortex-A720 and the tiny core near the Cortex-A520; absolute performance trails because Huawei clocks them much lower. The prime core is roughly Cortex-X2 class per clock, a 2021 design. Apple’s 2020 M1 Firestorm core is still 35% higher per clock and 57% faster in absolute integer performance at a similar 4.5 W. The current leading edge is further ahead again: the Apple M5 P-core is 60% higher per clock and 2.7× faster, the Arm C1 Ultra 45% higher and 2× faster. Matching older high-end cores per clock is a genuine design achievement. What Huawei cannot match is the voltage-frequency curve and transistor budget of leading-edge nodes, which let Apple, Qualcomm and others spend more transistors in the same area on wider cores, larger caches and deeper buffers while running at lower voltage. Huawei’s LogicFolding roadmap is one answer, stacking active logic to recover density and shorten signal paths. We return to it later. The GPU compute units (CUs) changed more visibly than the CPU cores, moving to a more rectangular layout for both the arithmetic logic unit (ALU) clusters and the CU overall. Even with ray-tracing support added, a CU shrank ~28%. However, that shrink is offset by the increase from 4 to 6 CUs and the area outside the CUs grew 33%. Overall, the GPU cluster is larger by ~10%. The GPU is where Huawei makes its biggest gains. The Maleoon 935 is not competitive with current flagships, but it is a large step up from the 920 and reaches older-flagship territory. In 3DMark it is 70% faster in Wild Life Extreme (WLE) and 79% faster in Steel Nomad Light (SNL) than the 920; with 11% higher clocks and 50% more CUs, the ~67% theoretical uplift roughly matches WLE and is beaten by SNL. It edges ahead of the Snapdragon 8+ Gen 1 in WLE and SNL, and the Dimensity 9200 and Apple A16 in WLE, but stays far behind newer parts: the Snapdragon 8 Elite Gen 5 and Dimensity 9500 are ~2.4–2.6× faster in WLE and ~3.2× faster in SNL. The Maleoon 935 is Huawei’s first GPU with hardware-accelerated ray tracing; there it lands slightly ahead of the Exynos 2200, and on par with the Apple A16, with current flagships up to 3.7× faster. The Neural Processing Unit (NPU) saw the largest structural changes of any block, moving from a Lite and a Tiny core in the Kirin 9020 to a Lite and two Tiny cores in the Kirin 9030. Both core types also show significant layout changes. This is a reversal in Huawei’s NPU design. The Kirin 9000 5G, its last flagship chip on TSMC N5, used two Lite and one Tiny core. The series of SoCs on SMIC N+2 moved to one Lite and one Tiny core, likely for area savings. With the Kirin 9030, Huawei has shifted back toward a larger multi-core NPU cluster, but with the additional area going to a Tiny core rather than a Lite core. We’re diving deep into the most advanced datacenter and AI hardware hitting the market. To learn more about what’s in the pipeline or to commission a custom teardown, contact sales@semianalysis.com. Interested in joining us on this ride and think you can be a difference maker? Check out our Careers page. Before diving into the process stack, the package and memory are worth separating from the SoC itself. The Pro variant of the Kirin 9030 carries 12 GB of Samsung DRAM, with two stacks of four dies each. The dies were identified as the K4L2E165YD, a 12 Gb LPDDR5X-9600 device fabricated on Samsung’s 1a node, the fourth generation of its 10 nm-class DRAM after 1x, 1y and 1z. 1a has shipped in volume since 2022, so this is current memory rather than older-node inventory. The 16 GB Pro Max variants we obtained were found with both CXMT and Samsung packages. The CXMT package is marked CXDD7JEDM, with two stacks of four dies, packaged in week 45 of 2025. The inferred die dimensions from X-ray computed tomography (CT) are consistent with a known density of ~0.3 Gib/mm² for the CXMT G4 process, roughly equivalent to other manufacturers’ 1z processes. The Kirin 9030 uses a typical integrated package-on-package (iPoP) stack: multiple DRAM dies in a memory package sit above an organic redistribution layer (RDL) interposer, which sits above the SoC and package substrate. The full package is then mounted to the printed circuit board (PCB) through ball-grid array (BGA) solder bumps. The memory package substrate is a thin bismaleimide-triazine (BT) laminate carrying the LPDDR5X stack. The organic RDL interposer over the SoC routes the PoP signals around the die and carries possible dummy thermal copper pillars. The package substrate, a thicker Ajinomoto Build-up Film (ABF) build-up over a BT core, fans the flip-chip bumps out to BGA pitch and embeds the power planes. The whole stack is organic. The only silicon is the SoC and the LPDDR5X dies; there is no silicon interposer. Keeping it all-organic brings the package’s coefficient of thermal expansion (CTE) close to the PCB’s, reducing board-level warpage, and avoids the cost of a silicon interposer the SoC’s bandwidth does not need. In an iPoP stack, the memory package connects to the organic RDL interposer through an array of solder bumps. Underfill fills the gap around those bumps, adding stiffness and protecting the joints from mechanical stress. The Pro and Pro Max variants differ here, which we cover behind the paywall. The die shot and architecture tell us how Huawei allocated its silicon budget. The process tells us what SMIC can manufacture. We use the Helio G99 as the process reference for TSMC N6. Both SMIC N+3 and TSMC N6 are evolutions of previous 7 nm-class nodes. We used targeted TEM cross-sections through logic and memory regions, imaged in both fin-cut and gate-cut directions. Each cross-section caption gives its horizontal field width (HFW), the real width of the imaged area. We start at the transistor fins, then move up through standard cells, local interconnect, and SRAM. SMIC has not overtaken Intel or TSMC. It uses aggressive DUV scaling and DTCO to reach N6-class density, but that density doesn’t translate into comparable performance and efficiency, for two reasons: the node gap to leading-edge nodes, and Huawei’s core designs. Fin Profile One of the most important knobs in a FinFET process is the fin profile: the shape of an individual fin and the channel where current passes from source to drain. The ideal fin is tall, narrow, and nearly vertical. A taller fin increases effective channel width, while a narrower fin improves electrostatic control by thinning the body the gate must control. Push either too far, and the process pays for it: weaker drive current, fragile fins, taper, footing and line-edge variation that hit yield and device variability. The Intel 22 nm, 14 nm, and 10 nm fin cross-sections show how FinFET nodes have improved over time. 22 nm fins were a first-generation structure, relatively short, wide and strongly tapered. The shape limits current density and reduces gate control uniformity across the height of the fin. At 14 nm and 10 nm, Intel pushed the fins taller and narrower while also making the sidewalls more vertical. Rather than shrinking the device, these changes increase the effective channel width per fin and improve electrostatic control. The trade-off is that taller fins at tighter pitches are much more difficult to manufacture. Now, let’s compare the Helio G99 on TSMC N6 with the Kirin 9030 on SMIC N+3. Both processes are in the same class, with fin pitch of 30-32 nm on N+3 and 34 nm in our N6 cross-section. The pitch for N6 is especially interesting as N7’s HD library is generally listed with a 33 nm fin pitch, and N6 did not shrink pitches directly. Its density gains came from DTCO instead of tighter pitches. The 34 nm pitch was stable across our sampled region and serves more as a comparison against the SMIC N+3 we have not investigated further. Pinning down N+3’s fin patterning scheme takes more than one core unit. The CPU cores show a dense ~32 nm pitch, with the pitch between N-P fin pairs alternating between 78 and 88 nm. Logic alone may be consistent with dual-pitch mandrels of 120 and 110 nm, but this is a complex and unusual approach. Combining the pitch from the the 8T SRAM, which has more complex repeat unit, with the CPU core sequence allows us to reverse engineer the patterning steps with more confidence. As both the logic and SRAM should share the same base grid, a single CD mandrel lithography pattern with 128 nm pitch undergoing SAQP produces a die-wide ~32 nm grid (128 nm/4), which supports the pitch sequencing seen in both logic and SRAM cells. In the sampled cross-sections, N+3 shows a taller, narrower, higher-aspect-ratio fin than N6. The measured fin aspect ratio is ~9.5:1 on N+3 versus 7.8:1 on N6. N+3 also shows less top rounding, with an estimated radius of ~2 nm, compared with 2.8 nm on N6. Even though the fin widths differ, the ratio of top rounding to fin width tells the same story, with N+3 at 0.37 and N6 at 0.44. In a geometric sense, lower is better; a perfectly rectangular fin would have no top-rounding penalty. These are single-digit-nanometer features measured from a handful of cuts, so treat the absolute numbers as approximate. The important result is the relative gap: N+3’s fins are consistently taller, narrower and less rounded than N6’s. We’re diving deep into the most advanced datacenter and AI hardware hitting the market. To learn more about what’s in the pipeline or to commission a custom teardown, contact sales@semianalysis.com. Interested in joining us on this ride and think you can be a difference maker? Check out our Careers page. Standard Cell A standard cell is the basic building block of chip layout: a fixed-height row pairing one NMOS and one PMOS transistor that share a gate, tiled in a grid to build logic blocks. The key dimensions are contacted gate pitch (CGP), cell height (CH), fin count, and the lower-metal routing grid. To measure density, we use the Bohr metric: a weighted average of NAND2 gate area (60%) and scan flip-flop area (40%). This represents a realistic mix of combinational and sequential logic. This metric has its limitations, especially for complex cell layouts like TSMC’s FinFLEX, which alternates cells with different fin counts. Even so, it is the best metric for a pure process-level comparison. Another important measurement is the fin pitch; it refers to the distance between two fins of the same transistor. In a FinFET process, multiple fins are used in each transistor to increase the drive current and thus performance. TSMC N6 ships both a high-density (HD) library with 2 PMOS and 2 NMOS fins per cell, and a high-performance (HP) library with 3 of each. More fins under the shared gate mean more effective channel width. HP cells switch harder at the cost of area. Designers mix the two on a die, primarily spending HP cells on timing-critical paths, and matching their PPA targets. In the Cortex-A55 core of the Helio G99, we found a cell height of 240 nm for the HD cell. MediaTek has used HD cells in the G99 to minimize die size and thus cost. As an SoC for budget smartphones at ~$100, this is essential. By contrast, we found only one library in the Kirin 9030, with 2 NMOS and 2 PMOS fins. This suggests a narrower library strategy than TSMC N6, where both HD and HP libraries are widely used. This likely reflects the smaller customer base and the more constrained domestic design and electronic design automation (EDA) ecosystem. In all three CPU cores of the Kirin 9030, we found cell heights of 228 nm, 5% smaller than on N6. This is also a reduction of 9.5% over SMIC N+2’s cell height of 252 nm. SMIC N+3 and TSMC N6’s HD library both feature a CGP of 57 nm. For SMIC, this is a 9.5% shrink over N+2. In the past, CGP and cell height alone may have been enough to compare transistor density. Now, however, we must consider scaling boosters and DTCO as well. SMIC’s density gain does not come from EUV. It comes from using every available DTCO booster aggressively. First is fin depopulation: reducing the number of NMOS and PMOS fins in each cell. The first FinFET nodes started with 3 or 4 fins for each transistor. SMIC N+3 and TSMC N6 HD both use only 2 fins per transistor, trading drive strength for density. Next is contact over active gate (COAG). By landing the gate contact directly over the active gate, instead of out over the isolation region, the cell height drops. N+3 integrates COAG while N6 does not. Our N+3 gate-cut cross-sections indicate COAG, with the gate contact sitting over the active region, while N6 shows an off-gate contact. Last is single diffusion break (SDB). Diffusion breaks are inserted between cells in the same row to provide electrical isolation, but they also introduce local layout effects (LLE), layout-dependent shifts in electrical characteristics. In the past, a double diffusion break was used, consuming the space of two CGPs. SMIC N+3 and TSMC N6 instead use SDB, saving area but increasing LLE sensitivity. This must be controlled at the process level and accurately modeled in the process design kit (PDK) so that EDA tools can account for it. Overall, SMIC N+3 has a transistor density of 113.4 MTr/mm², slightly above TSMC N6 at 107.7 MTr/mm². Even without EUV, SMIC has achieved density beyond TSMC’s mature N6 node which utilizes EUV. Metal Stack The smallest critical dimension in the teardown is M0; SMIC N+3 uses a 32.5 nm local metal pitch. That is smaller than the 36 nm M0 pitch on Intel 18A in Panther Lake. However, this does not mean that SMIC has a better process than Intel 18A or TSMC N3P. M0 is a local intra-cell routing layer. Its usefulness depends on the full interconnect stack: M1 and M2 pitch, track count, via and line resistance, design rules, mask count, overlay control, and routing flexibility. The 32.5 nm M0 is consistent with self-aligned quadruple patterning (SAQP), whose four-population line-width loading we read coarsely as alternating widths of 21.5 to 24 nm; M1 and M2, at 38 and 40 nm, are consistent with self-aligned double patterning (SADP), a single A/B split. On TSMC N6, M0, M2, and M3 sit at a relaxed ~40 nm and are consistent with SADP-class double patterning, with no need for quadruple patterning. That said, we measure M2 for example at ~43 nm, likely inflated by sparse routing. We do not assign any specific layer to EUV from our cross-sections; the distinction we can draw is double versus quadruple patterning, not lithography wavelength. Transistor-level density in the front-end-of-line (FEOL) sets an upper bound, but the design is ultimately limited by what the interconnect stack can route. The lowest metals are the most important for standard-cell density, but the semi-global and global layers determine how usable that density is at the block and chip level. Two axes are commonly used for chip cross-sections: the fin-cut and the gate-cut. The micrograph above is a fin-cut and shows metals 0 through 3. This axis lets us see the even-numbered metals, with M0 right above the fins. There are two kinds of M0 lines. The first are the power rails; these are wide wires for the VDD and VSS running horizontally at the top and bottom edges of each standard cell. The wide wires measure 55 nm across, more than double the other M0 lines. Their width minimizes resistance and reduces IR drop. The second kind are intra-cell wires, short segments within the cell that connect terminals to M1. These have alternating widths between 21.5 and 24 nm. The M0 pitch is 32.5 nm, a 19% reduction versus N+2 and N6. At this pitch, DUV patterning requires more aggressive multi-patterning, increasing mask count, overlay sensitivity, process complexity and cost. M0 is below what a single DUV-defined spacer (SADP) can resolve, so SMIC cascades a second spacer step (SAQP). The cross-section reflects the cost: the M0 trenches are visibly more re-entrant (narrower at the bottom than the top) than M1 or M2 on the same chip and carry a bright barrier-rich foot where the trench meets the etch-stop layer. That shape is partly the intended damascene profile, as a slightly narrow bottom helps void-free copper fill, but its magnitude at M0 is driven by the tight pitch and the higher trench aspect ratio. Intel 18A supports an M0 pitch of 32 nm, although Panther Lake has only shipped with a looser 36 nm pitch. This is due to Intel’s heavy usage of HP libraries. Among leading-edge nodes, 18A has the loosest M0 pitches due to PowerVia. With power routing moving to the backside, congestion is reduced, and the entire front-side metal stack can be used for signal routing. M2 is the first true inter-cell routing layer. It runs horizontally like M0 but spans across multiple cells to carry block-level signals. The M2 pitch sets the cell’s track height – the number of M2 tracks that fit between the VDD and VSS rails, defining what the library calls a 6-track or 7.5-track cell. This layer is the most important, limiting the routing of entire blocks. SMIC N+3 features a 5.7-track cell. The M2 pitch is 40 nm, a 5% decrease over N+2 and the same as N6. This shrink keeps the pitch at the edge of what is possible with double patterning. Future nodes will need to increase the number of masks for M2 as reducing the number of tracks is much harder due to the limitations in routing. The micrograph above is in the perpendicular direction, the gate-cut, and shows metals 0 through 4. This allows us to see and measure the odd-numbered vertical metal layers. The M1 pitch is 38 nm, 9.5% less than N+2 and 33% less than N6. The M1-to-gate ratio matters because it sets local routing flexibility. N+2 and N+3 use a 3:2 ratio, while N6 uses a 1:1 ratio, explaining the huge differences in M1 pitch. The more M1 lines there are compared with the gates, the more flexibility there is for power and signal crossing within the cell. Routing flexibility enables more complex and better cells. Clean fractional ratios are also preferred as a grid is periodic and improves layouts. The 3:2 ratio gives SMIC more local routing flexibility than a strict 1:1 grid, but it also complicates layout and patterning. This is a DTCO choice, with SMIC increasing process complexity to recover density and routability without EUV. This 3:2 ratio is not very popular in the leading-edge nodes. TSMC has only used it on N7+, the N5 family, and the short-lived N3(B). They have switched back to a 1:1 ratio for N3E. Intel has only used it on the 10 nm/Intel 7 family, with Intel 4, 3 and 18A all using a 1:1 ratio. Samsung is the only one still using a 3:2 ratio at the leading edge, using it in the SF4 and SF3 families. It remains to be seen if SMIC will remain at a 3:2 ratio or move to a 1:1 ratio with its future nodes. The industry is still actively exploring these local-routing ratios. At VLSI 2026, imec will be presenting work on even higher ratios, including a 2:1 scheme that can reduce area by up to 14%. We will be covering the conference in a future newsletter article. Subscribe We’re diving deep into the most advanced datacenter and AI hardware hitting the market. To learn more about what’s in the pipeline or to commission a custom teardown, contact sales@semianalysis.com. Interested in joining us on this ride and think you can be a difference maker? Check out our Careers page. The final local interconnect layer for N+3 is M3, with a pitch of 44 nm. The M3 pitch is the same as on N+2 and 10% larger than on N6. The semi-global layers carry the majority of block-level signal routing. They have a coarser pitch than the lower local layers. On leading-edge nodes, they are designed to sit at the limit of DUV single patterning. M4 through M11 pitches were found divided between 80–82 nm (M4–M6), 128 nm (M7–M10), and 148 nm (M11). Given limited sampling, it is possible these are divided further in dense routing areas. At the top are two giant metal layers, M12 and M13. These have kept the same pitches as N+2 at 1920 nm and 4600 nm respectively. While the lower layers’ pitches are generally fixed by the process and library, the upper layers vary much more in pitch and count, depending on the design. Even two smartphone SoCs on the same process can have wildly different metal stacks. The Helio G99 carries fewer routing layers, reaching coarse metal pitches of 850 nm by M9, while the larger and higher-performance Kirin 9030 keeps fine pitches until M11. SRAM At the leading edge, SRAM is much more difficult to scale than logic. TSMC’s latest nodes have seen little to no bitcell scaling, while logic still has more DTCO levers to pull. While looking for other logic libraries in the GPU compute units, we stumbled upon the SRAM. The most common type of SRAM has 6 transistors (6T), but this cell had 8 transistors (8T) instead. 8T SRAM adds two transistors to form a dedicated read port. Unlike a 6T cell, where reading disturbs the storage, the decoupled read port removes read-disturb, improving read stability and letting the cell be pushed harder for performance. At first glance, the cut looked like an unusual logic library, with each cell row having 3 fins of one polarity and 5 fins of another. The rows also alternated in orientation. Energy-dispersive X-ray spectroscopy (EDS) resolved our confusion. The cut had not landed on the GPU logic, but on the SRAM macro beside it. The unusual fin pattern was due to the SRAM library. We return to EDS in the process flow analysis behind the paywall. SRAM libraries are not like traditional logic libraries. Due to the unequal number of PMOS and NMOS transistors, they require specialized rules and layout libraries. They do not need the flexibility of logic libraries, so they are hyper-optimized for one purpose: dense, reliable memory. The SRAM cell we found is a 1:2:2-2:2 cell. This means there is 1 fin per pull-up (PU) PMOS transistor, and 2 fins per pull-down (PD) and pass-gate (PG) NMOS transistor. These 2 PU, 2 PD and 2 PG transistors would usually form a single 6T high-current cell (HCC). An 8T HCC adds a read-pull-down (RPD) and a read-pass-gate (RPG) NMOS transistor, each with two fins. We measured a cell height of 406 nm, which brings the bitcell size to 0.0463 µm². That is a theoretical peak density of 21.6 Mib/mm². We estimate that a 6T HCC would have a cell height of 292 nm and a size of 0.0337 µm². This is ~12% larger than a 6T HCC on Intel 3 and 4. We also estimate the 6T high-density cell (HDC) to have a cell height of 228 nm and a size of 0.0260 µm². This is coincidentally the same as the logic standard-cell height measured earlier. The estimate puts the cell near Samsung 7LPP/5LPP and slightly below TSMC N7/N6. That is a theoretical peak density of 38.5 Mib/mm². 6T HDC is arguably the most important cell as it is used for the largest caches in a chip, the L3 caches and system-level cache (SLC). Both the Kirin 9020 and 9030 have split the SLC into 4 banks to raise total SLC bandwidth. In the Kirin 9030, the SLC increased from 2 MiB to 3 MiB per bank. Correspondingly, the number of arrays within the bank also increased by 50%, from 16 to 24. Each array can store 128 KiB and forms an orderly pattern on the die shot. From the Kirin 9020 to the Kirin 9030, the area of a 128 KiB SLC array decreased from 0.0477 mm² to 0.0392 mm², an 18% shrink. The achieved density is 25.5 Mib/mm², 66% of the theoretical maximum. While the SLC was quite similar across both chips, the L3 has seen some major changes, particularly in terms of its layout. The total capacity also went up from 10 MiB to 12 MiB. Much like the SLC, the L3 is also split into 4 banks. In the Kirin 9020, an L3 bank consisted of 16× 128 KiB arrays and 16× 32 KiB arrays. However, an L3 bank in the Kirin 9030 instead consists of 48× 64 KiB arrays. In the Kirin 9020 L3, a 128 KiB array was 0.0513 mm² and a 32 KiB array was 0.0154 mm². The size of the 128 KiB array is different on the L3 and SLC as the assist circuitry for the two arrays differs depending on their purpose. In the Kirin 9030 L3, a 64 KiB array is 0.0210 mm². Although not a like-for-like comparison, normalized for capacity, it is 18% smaller than the 9020’s 128 KiB L3 array and 31% smaller than its 32 KiB L3 array. The achieved density is slightly lower than the SLC, at 23.8 Mib/mm², 62% of the theoretical maximum. Unlike the L3 and SLC, the prime cores’ private L2 cache uses a 2-bank design. As the prime cores’ L2 is latency-critical, it likely uses 6T HCC instead of 6T HDC. The 9020 has 16 arrays in each bank while the 9030 has 32. Each array has a capacity of 32 KiB. A 32 KiB array in the L2 shrank from 0.0171 mm² to 0.0142 mm², ~17% smaller. The density is 17.6 Mib/mm², ~59% of the theoretical maximum for 6T HCC. SRAM scaled well from N+2 to N+3, shrinking by ~19%, close to the theoretical logic shrink. The caveat is that N+2’s bitcells were unusually large, bigger than comparable 7 nm-class nodes, so part of the gain is catch-up rather than true scaling. With the insights from STEEL’s teardowns, we will be doing a deep dive into SRAM in a future newsletter article. Subscribe Everything above came out of a single STEEL teardown: die annotation, block-level area analysis and TEM cross-sections through logic and SRAM. We’re diving deep into the most advanced datacenter and AI hardware hitting the market. To learn more about what’s in the pipeline or to commission a custom teardown, contact sales@semianalysis.com. Future Roadmap The same cross-sections that pin down N+3 also show where SMIC can go next. Although N+3 is already close to the practical limits of DUV multi-patterning in several layers, SMIC still has a few scaling levers left. A theoretical N+4 would likely start with cell height. N+3 uses 5 M0 tracks between its power rails. Moving to 4 M0 tracks, as on SMIC N+2 and TSMC N6, could reduce cell height by roughly 15%. The routing grid is only one side of the shrink; the front end also must fit into the smaller cell. One possible FEOL lever is reducing the p-to-n isolation spacing from two diffusion grid units to one. Intel used this scaling booster on Intel 4, and TSMC did so on its N3 family. This path trades layout flexibility for density. Fewer M0 tracks reduce local routing resources, while tighter p-to-n spacing raises integration and design-rule difficulty. M2 is also constrained by the cell height shrink. For SMIC to maintain a ~5.7-track cell, M2 would need to move toward ~35 nm. That would move another layer into SAQP territory. SMIC could also reduce the CGP from 57 nm to 54 nm. Intel reached a similar CGP on Intel 10 nm/Intel 7 without EUV. The local interconnect is also tougher. If SMIC keeps the 3:2 M1-to-gate ratio, M1 would need to shrink to 36 nm and would likely require SAQP as well. If SMIC moves to a 1:1 ratio, M1 could relax to 54 nm, but it would give up routing flexibility. Under this theoretical path, we estimate that SMIC N+4 could reach a cell height of 198 nm and a CGP of 54 nm, implying a Bohr density of 137.8 MTr/mm², on par with TSMC N5 or Samsung SF4. However, the difficulty is cumulative. Each step is individually plausible, but together they make N+4 harder than the transition from N+2 to N+3. It will likely take longer, cost more, and carry less process margin. A theoretical N+5 would require a larger integration shift. One possible path is backside contacts (BSCon), moving power routing and source/drain contacts to the backside, which would reduce front-side routing pressure and enable another reduction in cell height. The front-side metal pitches could relax to reduce the process complexity. M0 would likely relax slightly to ~34 nm, and M2 and M4 pitches could relax further. CGP is unlikely to shrink much further. Even with EUV, 48 nm has been the practical limit for yield and process control. This approach would allow N+5’s cell height to fall to 170 nm and its CGP to 53 nm. This implies a Bohr density of 163.6 MTr/mm², on par with Intel 18A’s HP library. However, this would not make N+5 cost-competitive with the leading edge. It would reach a similar density through a much more expensive route. The integration difficulty rises sharply, with new process flows for backside alignment, wafer thinning, contact reveal, and backside metallization. Past this point, standard density and interconnect scaling become increasingly unattractive. That is where Huawei’s roadmap stops looking like a normal foundry roadmap and starts looking like a packaging roadmap. At ISCAS 2026, Huawei unveiled its tau (τ) scaling law, reframing process scaling in the time domain. τ is the time cost of data movement and processing: switching delays in transistors, RC signal propagation delays in circuits, compute, memory, and networking latency. Outside Huawei’s terminology, this is called system-technology co-optimization. This is Huawei’s answer to its lack of EUV lithography. Without EUV, planar density cannot keep pace with TSMC, Intel, or Samsung. If transistor density cannot shrink further, Huawei’s alternative is to shorten wires, reduce buffering, and stack logic vertically. “LogicFolding”, Huawei’s implementation of this new scaling idea, is, in practice, an aggressive 3D stacking approach. AMD V-Cache places SRAM above or below a CPU die. AMD’s MI350X places active interposer dies (AIDs) underneath accelerator and compute dies (XCDs), with the AIDs handling cache, IO interfaces, the network-on-chip (NoC) and embedded metal-insulator-metal (MIM) capacitors. With LogicFolding, parts of the same logic block are split across multiple active dies bonded face-to-face at ultra-fine pitch. This allows Huawei to shorten some critical paths and reduce buffer overhead, not merely add cache capacity or offload the IO and interconnect. Shortening wires is where the higher clocks come from. A large share of a modern core’s delay and energy budget goes into driving long interconnects and the repeater buffers along them. LogicFolding distributes a block’s critical-path gates across multiple stacked tiers bonded at a very fine pitch, so the bond interface behaves like an additional metal layer and the longest paths get shorter. That is how Huawei expects to recover frequency and efficiency it cannot get from the process alone. Huawei’s roadmap shows its intent. Prime core frequency is targeted to rise from 2.75 GHz in the Kirin 9030 to roughly 5 GHz by 2031, far beyond what planar scaling alone could deliver. Prime cores with 3.1 and 3.39 GHz clocks are being tested in its labs, although their power consumption is unknown. Beyond that, chips are in the design, simulation or pathfinding phase, meaning the frequencies are targets. However, the direction matters more: LogicFolding also helps with performance, not just density. The catch is that Huawei’s density claim is not directly comparable to foundry densities. A stacked design can report more transistors per package footprint by adding active layers, even if each patterned die remains well behind TSMC or Intel in front-end density. This is how Huawei can claim to reach foundry 14A-equivalent density by 2031. This is not a like-for-like foundry comparison, with Huawei using stacked logic and measuring density per package footprint. On a normalized Bohr-density basis, SMIC N+3 is ~114 MTr/mm², 38% less than Intel 18A’s HD library. Huawei’s 3D roadmap closes the gap by stacking active logic, reaching 215 MTr/mm² by 2030. In 2031, the roadmap density jumps to 295 MTr/mm², implying either a third active layer, partial EUV insertion or aggressive planar DUV scaling. Huawei’s methodology makes other foundries look much denser as well. Applying it to AMD’s MI450X with an N2 top die on an N3P base die yields a theoretical density of 460.2 MTr/mm² in 2026, compared with Huawei’s 295 MTr/mm² in 2031. This Kirin 9030 does not use LogicFolding, remaining in a conventional mobile SoC package. Instead, it forms the baseline for how far Huawei and SMIC can push planar scaling. Future teardowns of Kirin and Ascend chips will show both planar logic density and Huawei’s hybrid bonding solutions. Export controls changed China’s optimization problem rather than ending it. EUV restrictions raised the cost and complexity of leading-edge manufacturing without freezing it. SMIC reaches N6-class logic density through DUV immersion, SAQP and DTCO, while Huawei shifts more of the burden onto architecture, packaging and system-level integration. Future nodes will be tougher. N+3 still had room to tighten local metals and reduce cell height and CGP. Further scaling without EUV leaves fewer levers. More aggressive multi-patterning adds masks and overlay error. SMIC can keep pushing DUV, but each step will get more expensive and less forgiving. The design side is just as critical. Huawei had domestic EDA tools and flows before the Kirin 9030, with the Kirin 9000s, 9010 and 9020 making that clear. Huawei was able to ship multiple consumer SoCs on SMIC N+2 and N+3 while cut off from the Western EDA stack. US export controls restricted EDA tools for advanced chips in 2022 but did not target tools for more mature chips. In 2025, the US government briefly placed much broader restrictions on EDA software from Synopsys, Cadence, and others, before lifting them less than two months later as part of a trade deal tied to rare earths. Huawei has been unable to access those tools because it remains on a US trade blacklist. That forced Huawei, SMIC and Chinese academic institutions to build their own tools and flows. Researchers at Peking University recently announced a prototype EDA tool for Huawei’s LogicFolding architecture, which requires a new flow to handle the multilayer layout and floorplan. This is not the same as replacing the full Synopsys or Cadence stack, but it shows where domestic EDA is headed: toward tighter co-optimization between architecture, process and packaging. These advances are also diffusing into the Chinese ecosystem. SMIC is licensing its N+2 and N+3 processes to HLMC/Hua Hong at the government’s direction rather than by choice. If the same process learning feeds into Ascend accelerators for AI training and inference, the choke point shifts from one named fab to an ecosystem. Alibaba’s T-Head silicon arm and Cambricon, a Chinese AI chip designer that is expected to supply ByteDance, could also be major beneficiaries. Sanctions aimed at SMIC alone become less effective once the manufacturing knowledge has spread to other fabs and design houses. China is not closing the gap with Intel, Samsung and TSMC. The teardown shows the opposite in several places: no EUV, no backside power, higher process complexity, and visible trade-offs. But China is still advancing. If domestic chips become good enough for phones, inference, networking and security-sensitive workloads, they can matter strategically without matching TSMC at the leading edge. Behind the paywall, we show what else STEEL can do, with material and process flow analysis of SMIC N+3, and analysis of the Kirin 9030 package. We’re diving deep into the most advanced datacenter and AI hardware hitting the market. To learn more about what’s in the pipeline, access the full Kirin 9030 and SMIC N+3 analysis or to commission a custom teardown, contact sales@semianalysis.com.
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Fine chandeliers are a specialty for New Orleans business | Home/Garden
Michael Melesurgo and Ricardo “Rico” Mencia purchased Classic Chandelier from the business’s founder, Peter Sather, in 2023, when he decided to retire. The business partners rebranded the company as Vintage Chandelier and relocated it to 455 Philip St. in the Irish Channel in December 2025.The company offers a variety of services including cleaning, moving, restoration, installation, pick-up, delivery and general maintenance of light fixtures, with a specialty in fine antique chandeliers.Additional specialties include the installation and restoration of mirrors and artwork, with pick-up and delivery included. googletag.cmd.push(function() { googletag.display('fixed-breakout-mobile-1'); }); googletag.cmd.push(function() { googletag.display('fixed-breakout-tablet-1'); }); “We mainly focus on older fixtures, but we have also worked on newer ones, especially with installation,” Melesurgo said. “We aim to be able to work on almost anything within reason. But chandeliers are the meat and potatoes of the business.” googletag.cmd.push(function() { googletag.display('fixed-sticky-rail-1'); }); googletag.cmd.push(function() { googletag.display('fixed-breakout-desktop-1'); }); The team at Vintage Chandelier has worked on some of the best-known chandeliers in New Orleans, at hotels including the Ritz-Carlton and the Hyatt Regency, the Milton H. Latter Memorial branch of the New Orleans Public Library and several prominent homes.Inside Out sat down with the duo to discuss the identification and care of fine chandeliers. googletag.cmd.push(function() { googletag.display('fixed-breakout-mobile-2'); }); googletag.cmd.push(function() { googletag.display('fixed-breakout-tablet-2'); }); What are some of the hallmarks of a fine chandelier?Melesurgo: Some of the finer points of elegant chandeliers are pristine crystal, clean craftsmanship, original pieces and parts and stamped pieces to ensure authenticity. Everything should be clean and working.How should you clean a fine chandelier?Melesurgo: The material in question determines the methodology for cleaning. Crystal chandeliers should be cleaned by hand, crystal by crystal, to ensure the best outcome, and to avoid deterioration of metal wiring typically used in connecting pieces together. Spraying cleaners can, over time, sit on the metal and end up rusting connections that compromise the connections. googletag.cmd.push(function() { googletag.display('fixed-breakout-mobile-3'); }); googletag.cmd.push(function() { googletag.display('fixed-breakout-tablet-3'); }); googletag.cmd.push(function() { googletag.display('fixed-sticky-rail-2'); }); googletag.cmd.push(function() { googletag.display('fixed-breakout-desktop-2'); }); What in your backgrounds led you to this business?Melesurgo: I have an electrical background. I started as an electrical apprentice in the local union (IBEW 130) in 2005. Then Katrina hit. I ended up going back to school and getting a degree in Hotel, Restaurant and Tourism and graduating in 2011. I started working for Peter (Sather) at Classic Chandelier & Mirror in 2012, which was supposed to only be temporary, but I ended up staying for a lot longer. I have always enjoyed working with my hands and being creative. This allows me to be creative and keep a lot of beautiful history alive. googletag.cmd.push(function() { googletag.display('fixed-breakout-mobile-4'); }); googletag.cmd.push(function() { googletag.display('fixed-breakout-tablet-4'); }); Rico, you worked as a draftsman alongside an engineer at YKM Consulting. googletag.cmd.push(function() { googletag.display('fixed-sticky-rail-3'); }); googletag.cmd.push(function() { googletag.display('fixed-breakout-desktop-3'); }); Mencia: The job was interesting, especially working on the Ochsner expansion, but staring at two monitors all day became unbearable. I went to work for Peter (Sather), which opened a new world to antiques and chandeliers that I find fascinating. Vintage Chandelier, 455 Philip St., (504) 309-8983, @vintagechandelier.504 on Instagram googletag.cmd.push(function() { googletag.display('fixed-sticky-rail-4'); });
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See Ian McNulty discuss a newer New Orleans staple, Yakemain. Today's live show is presented by Explore Louisiana and New Orleans and Company.
Sony clarifies recent PlayStation DRM update
PlayStation fans and gaming preservations have been alarmed since late last week that a new 30-day timer attached attached to newly-purchased digital games for PlayStation 4 and 5 might render those games unplayable if the system they’re on is offline for longer than a month. But a rep from Sony told Game File today that new system will require only a single online check before it functions as a perpetual license for the digitally purchased game. That is consistent with a newer theory that emerged by gamers testing the 30-day timer over the last two days. “Players can continue to access and play their purchased games as usual,” a rep for PlayStation told me over email. “A one-time online check is required after purchase to confirm the game’s license, after which no further check-ins are needed.” The rep’s explanation squares with the current understanding among players about what’s happening. A multi-day mystery A post last Friday by YouTuber Lance MacDonald spread awareness over the 30-day timer. Quickly, players began stress-testing the system, removing a battery within their PlayStations and checking what would happen if their systems were offline past the timer window. They noticed that setting a PS4 or PS5 to be the “primary” console—a common Sony-authorized method to retain rights to a digital game—wasn’t overriding the 30-day limit. On Tuesday came the breakthrough: A gamer called Andshrew on the Resetera forums posted the results of some tasting. They found that digital games purchased on PS4/PS5 after some time in mid-April would get a 30-day timer that could then be removed and replaced with a perpetual license that would allow the game to be played offline. The transition to the perpetual license occurred some number of days after the digital game was purchased and the system was connected to the internet. They believed that a PlayStation’s online check-in would trigger the license change no sooner than 15 days after the user had purchased the game. This synced with the theory that Sony’s new system is related to the 14-day window that PlayStation users have to request a refund for digitally purchased games. The new timer/check-in system could be a way to defeat some exploit in that refund system, some users theorized. Game File is a reader-supported publication. To receive new posts and support my work, consider becoming a free or paid subscriber. Subscribe In a follow-up, I asked the Sony rep if the 15-day timeline is accurate or if the perpetual license can be activated sooner after purchase. If they share more, I’ll update this post. Sony has not said why they’ve introduced the timer and whether it is designed to stop people from exploiting the refund system. But their explanation suggests that this new DRM method should not result in long-term loss of access to digitally purchased games, just because a PlayStation is offline for a month or Sony’s servers are down. Xbox flashback For many some gamers, the initial reporting of the 30-day timer conjured memories of Microsoft’s disastrous May 2013 announcement of the Xbox One, which was going to require an internet-connected check-in once a day, lest your games become unplayable.1 After widespread backlash, Microsoft abandoned that plan, ahead of the Xbox One’s launch. 1 Fun fact: That 24-hour check-in detail was my scoop from an interview I had that day with then-Xbox exec Phil Harrison. I was EiC of Kotaku at the time and rushing from one Xbox One preview appointment on Microsoft’s campus to another. I phoned the news in to reporter Jason Schreier, who wrote it up for the site.
Mail-In test for colorectal cancer could help community health centers increase screening
Colorectal cancer (CRC) is the second most common cause of cancer death in the United States and disproportionally impacts people who receive care in under-resourced settings. Fortunately, several effective screening tests are available to detect cancer early when it is most treatable. In partnership with community health centers (CHC), investigators from Mass General Brigham and UCLA Health mailed one of two stool-based screening tests to more than 5,000 participants from CHCs in Boston and Los Angeles. Researchers found that participants were more likely to complete screening if they received a newer stool-based screening test, but follow-up colonoscopy rates remained low for those with abnormal results. Findings are published in JAMA Internal Medicine.
Newer testing methods suggest significant silent spread of measles in the US, threatening elimination
Investigators estimated that an outbreak along the Arizona/Utah state line has been at least 6.5 times larger than the number of known cases.
Women's sports won't save your city's economy. It might do something better.
Thirty years of research says sports mega-events don't drive growth. Newer leagues aren't trying to, and that's the point.
iOS 27 Rumored to Drop Support for These iPhone Models
iOS 27 will be compatible with the iPhone 12 series and newer, according to Instant Digital, a known Apple leaker on the Chinese social media platform Weibo. If this rumor is accurate, iOS 27 will drop support for the following iPhone models:iPhone 11 iPhone 11 Pro iPhone 11 Pro Max iPhone SE (2nd generation)However, these devices will continue to receive iOS 26 security updates for at least a few years.
Local business expands to new market after recent acquisition
A Youngstown business is expanding into newer markets after acquiring J&L Supply Company.
Treasury Wine Estates’ Elise Spangenberg named to North Bay Business Journal’s Forty Under 40
“Being part of a newer generation of leaders allows me to challenge legacy thinking, introduce modern people practices, and help organizations adapt in ways that keep them competitive and relevant.”
iOS 26.4.1 Includes These Two Changes for iPhones
Apple today released a minor iOS 26.4.1 update for the iPhone 11 and newer. While the release notes for the update only mention unspecified "bug fixes," we have since learned about two specific changes that are included in it. First, 9to5Mac spotted an Apple Developer Forums thread suggesting that iOS 26.4.1 fixes an iOS 26.4 bug that affected iCloud syncing in some apps.
I compared the Galaxy S26 Ultra to a 13-year-old phone, and I wasn't expecting this
Newer cameras aren't always better
Studio Display 2022 vs. Studio Display 2026 Buyer's Guide
Apple updated the Studio Display earlier this month, four years after the original launched. Here's how it compares to the original model. The new model keeps the same $1,599 starting price, 27-inch 5K panel, and overall design, but brings a handful of small internal improvements: a newer chip, upgraded Thunderbolt connectivity, Desk View camera support, and improved bass. The display itself, a 60Hz LCD panel with 600 nits of brightness, is unchanged.
Steam Spring Sale 2026: The Best And Biggest PC Gaming Deals
From newer games like Assassin's Creed Shadows to older hits like Fallout: New Vegas, there's something for everyone in this big sale
Garmin Launches WhatsApp Integration for Watches
Everything you need to know about Garmin's new WhatsApp integration on their newer watches.
MacBook Neo Components Required A ‘Rethink’ From Apple To Get Down To That $599 Price, New Report Says A Touchscreen In Newer Models Isn’t ‘Plausible’
A touchscreen isn’t making its way to a successive MacBook Neo model, as Apple found it very difficult to bring the notebook down to that low $599 price
Samsung confirms an improved S Pen is in the works
If you are sad about the Galaxy S26 Ultra not getting S Pen upgrades, worry not. It is not going away. In fact, a newer S Pen is coming.
Google adds more convenience to its free VPN built into Pixel phones
Google's free VPN that built into Pixel 7 and newer device just got a nifty update to make its status more easily visible.
Snapdragon 8 Elite Gen 6 Pro May Offer Lots Of Flexibility For Qualcomm’s Partners When Choosing Newer Or Older DRAM & Storage Standards To Save Costs
A rumor claims that Snapdragon 8 Elite Gen 6 Pro may give Qualcomm’s partners various DRAM and storage configurations to choose from
Trump Mobile’s T1 Phone is apparently still coming, but it’ll be uglier and more expensive
The T1 will reportedly cost less than $1,000 for newer buyers who haven't made the $100 deposit yet.
PSA: OpenAI will soon remove several models from ChatGPT
From time to time, OpenAI removes older models from ChatGPT’s model picker, as users become accustomed to newer ones. Here are the details.
After 5 Years, Apple Finally Upgrades the AirTag
The second-generation AirTag features Apple's newer Ultra Wideband chip, has a louder speaker, and better range.
Discovering Optima Health And 2 Other Promising UK Penny Stocks
The UK market has recently experienced some turbulence, with the FTSE 100 index closing lower amid weak trade data from China, highlighting ongoing global economic challenges. Despite such fluctuations, investors often look beyond blue-chip stocks to explore opportunities in smaller or newer companies that can offer unique value propositions. Penny stocks, a term that might seem outdated but still relevant today, represent these potential investments; they can provide intriguing prospects...
Baptist Health unveils new training facility; hopes to prepare nurses, doctors for state’s growing healthcare demands
Baptist Health has unveiled its newest state of the art medical training facility, built to not only train new healthcare professionals, but also give veteran healthcare professionals hands-on training with newer medical technology and procedures.
Linux 6.19-rc5 Brings Fix For Newer NVIDIA GPUs, Logitech HID++ For Anywhere 3S & Fixes
In addition to Linus Torvalds doing some vibe coding and more with his new 'AudioNoise' project this week, Linux 6.19 kernel development ticked back up with the holidays having passed
Galaxy S27 Ultra camera details surface for the first time
The Galaxy S27 Ultra will reportedly bring an upgrade to the primary camera by using a newer ISOCELL sensor with newer technologies.
How UTA’s Expanding London Hub, Including Sports, Is Driving Its EMEA Business
"The group continues to look for complementary opportunities to grow its business," notes a U.K. filing that also highlights UTA UK's diversification via pushes into newer areas.
How UTA’s Expanding London Hub, Including Sports, Is Driving Its EMEA Business
"The group continues to look for complementary opportunities to grow its business," notes a U.K. filing that also highlights UTA UK's diversification via pushes into newer areas.