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Discover the Entertainment at Le Mans Classic Legend 2026
Le Mans Classic Legend (2–5 July 2026) transforms the 24 Hours of Le Mans circuit into a world where heritage, music, cinema, the French art of living and the a
Tina Peters visits President Donald Trump in the White House
Since her release from prison, Tina Peters has reemerged on the political circuit — appearing over the weekend at the GOP Freedom Fest in Castle Rock and then visiting the White House on Monday to meet with President Donald Trump. In a post on Truth Social, Trump wrote that Peters “just came to the White […]
Evidence points to potential new LCD screen for Nintendo Switch 2
The Nintendo Switch 2 screen could be getting a revision, based on the latest evidence. On a Chinese resale site, a listing recently appeared for a a new model of the system’s LCD panel. Sharp would apparently behind the updated screen. The current Nintendo Switch 2 features a panel from Innolux. This new screen has a different circuit, connector, and...
Barker reclaims title at National Road Championships
Megan Barker reclaims her British elite women's circuit race title as the second day of the National Road Championships produces its second Welsh winner.
New Media Event Jupiter Festival Planned from Art Basel Company
MCH Group, in which the Fox scion is the largest shareholder, is launching an event titled the Jupiter Festival with an eye toward becoming a stop on the thought leader circuit.
Former Kentucky Science Teacher, 29, Charged With Sexual Abuse of Student
A former Henderson County High School teacher has been charged with sexual abuse, police said. Rachel Clement, 29, was taken into custody Tuesday after being arraigned in Henderson County Circuit… The...
CHILEAN RODRIGO ROJAS, WORLD NO. 1 IN KARATE: “I’M LIVING A DREAM”
The outstanding karateka was crowned “Grand Winner” of the World Karate Circuit […]
Jack Whitehall joins Silverstone F1 comedy line-up
The Northamptonshire circuit announces the "final layer" of its off-track entertainment for 2026.
Scientists Finally Uncover Why Solid-State Batteries Short-Circuit
Researchers have uncovered a critical mechanism behind battery failure in solid-state batteries, offering new insights that could help unlock safer, longer-lasting energy storage technologies.
Former Trump aides plead not guilty to Wisconsin fake elector felony charges
Jim Troupis, a former judge who was Trump’s Wisconsin campaign attorney, Mike Roman, Trump’s director of Election Day operations in 2020, and Ken Chesebro, a former Trump legal adviser, all entered the pleas in Dane County Circuit Court on Tuesday.
Is SMIC N+3’s Metal Pitch Smaller than Intel 18A’s?
Almost four years ago, we published that SMIC had started shipping 7 nm (N+1) chips. Now, SMIC is shipping its third-generation 7 nm (N+3) process in Huawei’s Kirin 9030, with a minimum metal pitch of 32.5 nm, about 10% tighter than the 36 nm minimum metal pitch shipping in Intel’s latest Panther Lake CPUs on 18A. The headline is true, but incomplete cherry picked metric. N+3 reaches the density of TSMC N6 through aggressive DUV multi-patterning and design-technology co-optimization (DTCO), but it pays for that in complexity, efficiency and process control. We found this and more in our reverse engineering and teardown where we cover SMIC’s N3 process technology, Huawei’s packaging, memory, architecture, and more. SemiAnalysis has been building a state-of-the-art teardown lab in Oregon capable of analyzing the world’s most advanced and important chips over the last year and half. We have already generated revenue on advanced datacenter chip teardowns including our recent reverse engineering of a major TSMC customer’s COUPE CPO optical engine + EIC 3D stack. This is the first public report from the SemiAnalysis Teardown Engineering & Evaluation Lab, or STEEL for short. The lab is aggressively scaling up and out and we’re excited to announce it publicly. This is a bit of inconvenient timing for TechInsights as they are private equity owned and currently being sold while having enjoyed virtually no credible competition for decades. This has led to TechInsights underinvesting in CAPEX. SemiAnalysis exceeds TechInsights in revenue despite no venture or private equity ownership and being founded only 6 years ago. Because we have no external investors and are founder led, we move faster, build faster, and we can release client chip teardowns for free regularly, while focusing on datacenter for our major clients. Here’s the first public image from our lab, the HiSilicon Kirin 9030 Pro SoC: This report will detail our teardown of the Kirin 9030 and our findings on SMIC’s N+3 process, the most advanced in China. For comparison, we’ll show our teardown of the MediaTek Helio G99, made on TSMC N6. Through this comparison, we can look at the effect of export controls – SMIC N+3 and TSMC N6 are comparable nodes, but one is heavily export-controlled, the other free to use the West’s most advanced equipment. Here we see both China’s progress and constraints. SMIC N+3 reaches TSMC N6-class logic density, but it requires far more aggressive DUV multi-patterning, so it does not match N6 on process maturity or cost. The Kirin 9030 Pro performs similarly to three-year-old Android flagships, and trails far behind the current flagship SoCs from Apple, Qualcomm, MediaTek, and Samsung. The efficiency gap is even wider. Export controls have not stopped Huawei and SMIC from shipping advanced silicon, but they have forced a different path. Without EUV, SMIC is leaning harder on DUV multi-patterning, DTCO, and increasingly complex integration. The roadmap continues forward through tighter design rules and backside power, but each step adds cost and process risk. Huawei’s τ scaling and LogicFolding show another path: stacking active logic and recovering density through advanced packaging and system-technology co-optimization (STCO). To understand the Kirin 9030, we must first understand Huawei’s SoC history. HiSilicon is Huawei’s chip design arm, responsible for the Kirin smartphone SoCs, Kunpeng server CPUs, Ascend AI accelerators, and switch/router networking silicon. Before export controls, Huawei was TSMC’s largest customer – the only customer on TSMC’s first EUV node, N7+, and among the first on N5, alongside Apple. That ended in late 2020. Huawei switched to Qualcomm SoCs in its flagship smartphones, though export controls limited them to 4G-only variants. In late 2023, Huawei returned to in-house silicon with the Kirin 9000s, a successor to the Kirin 9000, fabricated on SMIC N+2 instead of TSMC N5. In the following years, they released the Kirin 9010 and 9020 on the same N+2 process. These chips used Huawei’s in-house TaiShan CPU cores and Maleoon GPU. We have not torn down a Kirin 9020 ourselves, so the predecessor die shot is from Kurnal. The die shots show how Huawei spent its silicon budget: which functional blocks are where, and how their areas compare to the predecessor. First, a quick guide to the major blocks on the die. The total die area is nearly identical, but the 9030 uses that area more aggressively. A denser process lets Huawei fit an extra middle CPU core, more GPU and NPU cores, and larger caches into the same footprint. In contrast, the Helio G99 is a much smaller, low-cost SoC, built for budget smartphones rather than a flagship device. While the Kirin 9030 is ~140 mm², the G99 is only ~29 mm², roughly one-fifth the area. The underlying TSMC process technology, however, is directly comparable as a baseline for analyzing SMIC’s. The Kirin 9030 is an evolutionary refresh, not a clean-sheet design. Its CPU, GPU and NPU cores carry over the 9020’s families, and the gains come from three levers: the SMIC N+2-to-N+3 process step, DTCO and floorplan work, and incremental microarchitecture. Area is where the first two show up, and the 9030 scales well here. Performance and efficiency are the harder test. Huawei’s design holds up better than its node would suggest, but the chip still trails, both because N+3 sits behind the leading-edge nodes and because its cores, while competent, remain a few generations behind the newest designs. The new prime core is an incremental update. The main changes are a 10% frequency increase from 2.5 GHz to 2.75 GHz and a doubling in the L2 cache from 1 MiB to 2 MiB. Despite the increased cache, the core size decreased by 7.6%. Excluding the private L2 cache, the core size decreased by 21%. This is a large reduction for an incremental node. Compared with the TaiShan New V120 core in the Kirin 9020, the Kirin 9030’s middle core is almost unchanged architecturally, yet each core shrinks by ~22%. Most of that comes from the move from N+2 to N+3, with layout likely accounting for the rest. Visually, the most noticeable change is the increase from 3 middle cores to 4. There is also a 20% increase in the shared L3 cache of the big cluster. This helps to improve multi-core performance without sacrificing much in terms of area. Even with each core shrinking, the big CPU cluster’s total area is essentially unchanged. The per-core savings went back into an additional middle core and larger caches. The tiny cores shrank less than the prime core (excluding its L2 cache) and less than the middle cores. This is likely because fixed overhead is a larger share on a small core. We cannot resolve any architectural changes from the die shot alone, but the per-clock and efficiency gains shown below point to more than pure process and layout scaling. The area reduction was offset by a doubling of the shared L2 cache from 2 MiB to 4 MiB, leaving the total tiny CPU cluster area slightly larger. Area is the easiest improvement to see from a die shot, but it is only one part of PPA (power, performance, area). For modern logic, power and performance matter just as much, and often more. Since Dennard scaling broke down in the mid-2000s, voltage and frequency have not scaled in step with transistor dimensions, so each node has had to fight harder for gains in performance and efficiency. The starkest comparison is not Kirin 9020 versus Kirin 9030 Pro. Apple’s efficiency cores run circles around Huawei’s prime core. Apple’s low-power core delivers 20% higher integer performance while drawing only 1 W, compared with 4.5 W for Huawei’s prime core. N+3 matches TSMC N6, but N6 is several generations old. Apple and Qualcomm build on N4 and N3P, which are denser and sit on a better voltage-frequency curve, giving them a larger transistor budget and more performance per watt. The 9030’s own cores did improve. The middle and tiny cores gained 17% and 14% in per-clock integer performance over the 9020, with floating-point flat on the middle core and up 11% on the tiny. The tiny core improves cleanly, with performance rising while power falls and efficiency increases by 45% in integer and 24% in floating point. The middle core is mixed: integer performance rises but power rises faster, cutting integer efficiency by 7%, while lower power lifts floating-point efficiency 16%. Per-clock gains at the same or lower frequency are microarchitectural, so the cores are tuned, not just shrunk. Both also failed to hold their rated maximum frequencies, pointing to thermal, power, or stability limits. Per clock, the middle core sits around Arm Cortex-A720 and the tiny core near the Cortex-A520; absolute performance trails because Huawei clocks them much lower. The prime core is roughly Cortex-X2 class per clock, a 2021 design. Apple’s 2020 M1 Firestorm core is still 35% higher per clock and 57% faster in absolute integer performance at a similar 4.5 W. The current leading edge is further ahead again: the Apple M5 P-core is 60% higher per clock and 2.7× faster, the Arm C1 Ultra 45% higher and 2× faster. Matching older high-end cores per clock is a genuine design achievement. What Huawei cannot match is the voltage-frequency curve and transistor budget of leading-edge nodes, which let Apple, Qualcomm and others spend more transistors in the same area on wider cores, larger caches and deeper buffers while running at lower voltage. Huawei’s LogicFolding roadmap is one answer, stacking active logic to recover density and shorten signal paths. We return to it later. The GPU compute units (CUs) changed more visibly than the CPU cores, moving to a more rectangular layout for both the arithmetic logic unit (ALU) clusters and the CU overall. Even with ray-tracing support added, a CU shrank ~28%. However, that shrink is offset by the increase from 4 to 6 CUs and the area outside the CUs grew 33%. Overall, the GPU cluster is larger by ~10%. The GPU is where Huawei makes its biggest gains. The Maleoon 935 is not competitive with current flagships, but it is a large step up from the 920 and reaches older-flagship territory. In 3DMark it is 70% faster in Wild Life Extreme (WLE) and 79% faster in Steel Nomad Light (SNL) than the 920; with 11% higher clocks and 50% more CUs, the ~67% theoretical uplift roughly matches WLE and is beaten by SNL. It edges ahead of the Snapdragon 8+ Gen 1 in WLE and SNL, and the Dimensity 9200 and Apple A16 in WLE, but stays far behind newer parts: the Snapdragon 8 Elite Gen 5 and Dimensity 9500 are ~2.4–2.6× faster in WLE and ~3.2× faster in SNL. The Maleoon 935 is Huawei’s first GPU with hardware-accelerated ray tracing; there it lands slightly ahead of the Exynos 2200, and on par with the Apple A16, with current flagships up to 3.7× faster. The Neural Processing Unit (NPU) saw the largest structural changes of any block, moving from a Lite and a Tiny core in the Kirin 9020 to a Lite and two Tiny cores in the Kirin 9030. Both core types also show significant layout changes. This is a reversal in Huawei’s NPU design. The Kirin 9000 5G, its last flagship chip on TSMC N5, used two Lite and one Tiny core. The series of SoCs on SMIC N+2 moved to one Lite and one Tiny core, likely for area savings. With the Kirin 9030, Huawei has shifted back toward a larger multi-core NPU cluster, but with the additional area going to a Tiny core rather than a Lite core. We’re diving deep into the most advanced datacenter and AI hardware hitting the market. To learn more about what’s in the pipeline or to commission a custom teardown, contact sales@semianalysis.com. Interested in joining us on this ride and think you can be a difference maker? Check out our Careers page. Before diving into the process stack, the package and memory are worth separating from the SoC itself. The Pro variant of the Kirin 9030 carries 12 GB of Samsung DRAM, with two stacks of four dies each. The dies were identified as the K4L2E165YD, a 12 Gb LPDDR5X-9600 device fabricated on Samsung’s 1a node, the fourth generation of its 10 nm-class DRAM after 1x, 1y and 1z. 1a has shipped in volume since 2022, so this is current memory rather than older-node inventory. The 16 GB Pro Max variants we obtained were found with both CXMT and Samsung packages. The CXMT package is marked CXDD7JEDM, with two stacks of four dies, packaged in week 45 of 2025. The inferred die dimensions from X-ray computed tomography (CT) are consistent with a known density of ~0.3 Gib/mm² for the CXMT G4 process, roughly equivalent to other manufacturers’ 1z processes. The Kirin 9030 uses a typical integrated package-on-package (iPoP) stack: multiple DRAM dies in a memory package sit above an organic redistribution layer (RDL) interposer, which sits above the SoC and package substrate. The full package is then mounted to the printed circuit board (PCB) through ball-grid array (BGA) solder bumps. The memory package substrate is a thin bismaleimide-triazine (BT) laminate carrying the LPDDR5X stack. The organic RDL interposer over the SoC routes the PoP signals around the die and carries possible dummy thermal copper pillars. The package substrate, a thicker Ajinomoto Build-up Film (ABF) build-up over a BT core, fans the flip-chip bumps out to BGA pitch and embeds the power planes. The whole stack is organic. The only silicon is the SoC and the LPDDR5X dies; there is no silicon interposer. Keeping it all-organic brings the package’s coefficient of thermal expansion (CTE) close to the PCB’s, reducing board-level warpage, and avoids the cost of a silicon interposer the SoC’s bandwidth does not need. In an iPoP stack, the memory package connects to the organic RDL interposer through an array of solder bumps. Underfill fills the gap around those bumps, adding stiffness and protecting the joints from mechanical stress. The Pro and Pro Max variants differ here, which we cover behind the paywall. The die shot and architecture tell us how Huawei allocated its silicon budget. The process tells us what SMIC can manufacture. We use the Helio G99 as the process reference for TSMC N6. Both SMIC N+3 and TSMC N6 are evolutions of previous 7 nm-class nodes. We used targeted TEM cross-sections through logic and memory regions, imaged in both fin-cut and gate-cut directions. Each cross-section caption gives its horizontal field width (HFW), the real width of the imaged area. We start at the transistor fins, then move up through standard cells, local interconnect, and SRAM. SMIC has not overtaken Intel or TSMC. It uses aggressive DUV scaling and DTCO to reach N6-class density, but that density doesn’t translate into comparable performance and efficiency, for two reasons: the node gap to leading-edge nodes, and Huawei’s core designs. Fin Profile One of the most important knobs in a FinFET process is the fin profile: the shape of an individual fin and the channel where current passes from source to drain. The ideal fin is tall, narrow, and nearly vertical. A taller fin increases effective channel width, while a narrower fin improves electrostatic control by thinning the body the gate must control. Push either too far, and the process pays for it: weaker drive current, fragile fins, taper, footing and line-edge variation that hit yield and device variability. The Intel 22 nm, 14 nm, and 10 nm fin cross-sections show how FinFET nodes have improved over time. 22 nm fins were a first-generation structure, relatively short, wide and strongly tapered. The shape limits current density and reduces gate control uniformity across the height of the fin. At 14 nm and 10 nm, Intel pushed the fins taller and narrower while also making the sidewalls more vertical. Rather than shrinking the device, these changes increase the effective channel width per fin and improve electrostatic control. The trade-off is that taller fins at tighter pitches are much more difficult to manufacture. Now, let’s compare the Helio G99 on TSMC N6 with the Kirin 9030 on SMIC N+3. Both processes are in the same class, with fin pitch of 30-32 nm on N+3 and 34 nm in our N6 cross-section. The pitch for N6 is especially interesting as N7’s HD library is generally listed with a 33 nm fin pitch, and N6 did not shrink pitches directly. Its density gains came from DTCO instead of tighter pitches. The 34 nm pitch was stable across our sampled region and serves more as a comparison against the SMIC N+3 we have not investigated further. Pinning down N+3’s fin patterning scheme takes more than one core unit. The CPU cores show a dense ~32 nm pitch, with the pitch between N-P fin pairs alternating between 78 and 88 nm. Logic alone may be consistent with dual-pitch mandrels of 120 and 110 nm, but this is a complex and unusual approach. Combining the pitch from the the 8T SRAM, which has more complex repeat unit, with the CPU core sequence allows us to reverse engineer the patterning steps with more confidence. As both the logic and SRAM should share the same base grid, a single CD mandrel lithography pattern with 128 nm pitch undergoing SAQP produces a die-wide ~32 nm grid (128 nm/4), which supports the pitch sequencing seen in both logic and SRAM cells. In the sampled cross-sections, N+3 shows a taller, narrower, higher-aspect-ratio fin than N6. The measured fin aspect ratio is ~9.5:1 on N+3 versus 7.8:1 on N6. N+3 also shows less top rounding, with an estimated radius of ~2 nm, compared with 2.8 nm on N6. Even though the fin widths differ, the ratio of top rounding to fin width tells the same story, with N+3 at 0.37 and N6 at 0.44. In a geometric sense, lower is better; a perfectly rectangular fin would have no top-rounding penalty. These are single-digit-nanometer features measured from a handful of cuts, so treat the absolute numbers as approximate. The important result is the relative gap: N+3’s fins are consistently taller, narrower and less rounded than N6’s. We’re diving deep into the most advanced datacenter and AI hardware hitting the market. To learn more about what’s in the pipeline or to commission a custom teardown, contact sales@semianalysis.com. Interested in joining us on this ride and think you can be a difference maker? Check out our Careers page. Standard Cell A standard cell is the basic building block of chip layout: a fixed-height row pairing one NMOS and one PMOS transistor that share a gate, tiled in a grid to build logic blocks. The key dimensions are contacted gate pitch (CGP), cell height (CH), fin count, and the lower-metal routing grid. To measure density, we use the Bohr metric: a weighted average of NAND2 gate area (60%) and scan flip-flop area (40%). This represents a realistic mix of combinational and sequential logic. This metric has its limitations, especially for complex cell layouts like TSMC’s FinFLEX, which alternates cells with different fin counts. Even so, it is the best metric for a pure process-level comparison. Another important measurement is the fin pitch; it refers to the distance between two fins of the same transistor. In a FinFET process, multiple fins are used in each transistor to increase the drive current and thus performance. TSMC N6 ships both a high-density (HD) library with 2 PMOS and 2 NMOS fins per cell, and a high-performance (HP) library with 3 of each. More fins under the shared gate mean more effective channel width. HP cells switch harder at the cost of area. Designers mix the two on a die, primarily spending HP cells on timing-critical paths, and matching their PPA targets. In the Cortex-A55 core of the Helio G99, we found a cell height of 240 nm for the HD cell. MediaTek has used HD cells in the G99 to minimize die size and thus cost. As an SoC for budget smartphones at ~$100, this is essential. By contrast, we found only one library in the Kirin 9030, with 2 NMOS and 2 PMOS fins. This suggests a narrower library strategy than TSMC N6, where both HD and HP libraries are widely used. This likely reflects the smaller customer base and the more constrained domestic design and electronic design automation (EDA) ecosystem. In all three CPU cores of the Kirin 9030, we found cell heights of 228 nm, 5% smaller than on N6. This is also a reduction of 9.5% over SMIC N+2’s cell height of 252 nm. SMIC N+3 and TSMC N6’s HD library both feature a CGP of 57 nm. For SMIC, this is a 9.5% shrink over N+2. In the past, CGP and cell height alone may have been enough to compare transistor density. Now, however, we must consider scaling boosters and DTCO as well. SMIC’s density gain does not come from EUV. It comes from using every available DTCO booster aggressively. First is fin depopulation: reducing the number of NMOS and PMOS fins in each cell. The first FinFET nodes started with 3 or 4 fins for each transistor. SMIC N+3 and TSMC N6 HD both use only 2 fins per transistor, trading drive strength for density. Next is contact over active gate (COAG). By landing the gate contact directly over the active gate, instead of out over the isolation region, the cell height drops. N+3 integrates COAG while N6 does not. Our N+3 gate-cut cross-sections indicate COAG, with the gate contact sitting over the active region, while N6 shows an off-gate contact. Last is single diffusion break (SDB). Diffusion breaks are inserted between cells in the same row to provide electrical isolation, but they also introduce local layout effects (LLE), layout-dependent shifts in electrical characteristics. In the past, a double diffusion break was used, consuming the space of two CGPs. SMIC N+3 and TSMC N6 instead use SDB, saving area but increasing LLE sensitivity. This must be controlled at the process level and accurately modeled in the process design kit (PDK) so that EDA tools can account for it. Overall, SMIC N+3 has a transistor density of 113.4 MTr/mm², slightly above TSMC N6 at 107.7 MTr/mm². Even without EUV, SMIC has achieved density beyond TSMC’s mature N6 node which utilizes EUV. Metal Stack The smallest critical dimension in the teardown is M0; SMIC N+3 uses a 32.5 nm local metal pitch. That is smaller than the 36 nm M0 pitch on Intel 18A in Panther Lake. However, this does not mean that SMIC has a better process than Intel 18A or TSMC N3P. M0 is a local intra-cell routing layer. Its usefulness depends on the full interconnect stack: M1 and M2 pitch, track count, via and line resistance, design rules, mask count, overlay control, and routing flexibility. The 32.5 nm M0 is consistent with self-aligned quadruple patterning (SAQP), whose four-population line-width loading we read coarsely as alternating widths of 21.5 to 24 nm; M1 and M2, at 38 and 40 nm, are consistent with self-aligned double patterning (SADP), a single A/B split. On TSMC N6, M0, M2, and M3 sit at a relaxed ~40 nm and are consistent with SADP-class double patterning, with no need for quadruple patterning. That said, we measure M2 for example at ~43 nm, likely inflated by sparse routing. We do not assign any specific layer to EUV from our cross-sections; the distinction we can draw is double versus quadruple patterning, not lithography wavelength. Transistor-level density in the front-end-of-line (FEOL) sets an upper bound, but the design is ultimately limited by what the interconnect stack can route. The lowest metals are the most important for standard-cell density, but the semi-global and global layers determine how usable that density is at the block and chip level. Two axes are commonly used for chip cross-sections: the fin-cut and the gate-cut. The micrograph above is a fin-cut and shows metals 0 through 3. This axis lets us see the even-numbered metals, with M0 right above the fins. There are two kinds of M0 lines. The first are the power rails; these are wide wires for the VDD and VSS running horizontally at the top and bottom edges of each standard cell. The wide wires measure 55 nm across, more than double the other M0 lines. Their width minimizes resistance and reduces IR drop. The second kind are intra-cell wires, short segments within the cell that connect terminals to M1. These have alternating widths between 21.5 and 24 nm. The M0 pitch is 32.5 nm, a 19% reduction versus N+2 and N6. At this pitch, DUV patterning requires more aggressive multi-patterning, increasing mask count, overlay sensitivity, process complexity and cost. M0 is below what a single DUV-defined spacer (SADP) can resolve, so SMIC cascades a second spacer step (SAQP). The cross-section reflects the cost: the M0 trenches are visibly more re-entrant (narrower at the bottom than the top) than M1 or M2 on the same chip and carry a bright barrier-rich foot where the trench meets the etch-stop layer. That shape is partly the intended damascene profile, as a slightly narrow bottom helps void-free copper fill, but its magnitude at M0 is driven by the tight pitch and the higher trench aspect ratio. Intel 18A supports an M0 pitch of 32 nm, although Panther Lake has only shipped with a looser 36 nm pitch. This is due to Intel’s heavy usage of HP libraries. Among leading-edge nodes, 18A has the loosest M0 pitches due to PowerVia. With power routing moving to the backside, congestion is reduced, and the entire front-side metal stack can be used for signal routing. M2 is the first true inter-cell routing layer. It runs horizontally like M0 but spans across multiple cells to carry block-level signals. The M2 pitch sets the cell’s track height – the number of M2 tracks that fit between the VDD and VSS rails, defining what the library calls a 6-track or 7.5-track cell. This layer is the most important, limiting the routing of entire blocks. SMIC N+3 features a 5.7-track cell. The M2 pitch is 40 nm, a 5% decrease over N+2 and the same as N6. This shrink keeps the pitch at the edge of what is possible with double patterning. Future nodes will need to increase the number of masks for M2 as reducing the number of tracks is much harder due to the limitations in routing. The micrograph above is in the perpendicular direction, the gate-cut, and shows metals 0 through 4. This allows us to see and measure the odd-numbered vertical metal layers. The M1 pitch is 38 nm, 9.5% less than N+2 and 33% less than N6. The M1-to-gate ratio matters because it sets local routing flexibility. N+2 and N+3 use a 3:2 ratio, while N6 uses a 1:1 ratio, explaining the huge differences in M1 pitch. The more M1 lines there are compared with the gates, the more flexibility there is for power and signal crossing within the cell. Routing flexibility enables more complex and better cells. Clean fractional ratios are also preferred as a grid is periodic and improves layouts. The 3:2 ratio gives SMIC more local routing flexibility than a strict 1:1 grid, but it also complicates layout and patterning. This is a DTCO choice, with SMIC increasing process complexity to recover density and routability without EUV. This 3:2 ratio is not very popular in the leading-edge nodes. TSMC has only used it on N7+, the N5 family, and the short-lived N3(B). They have switched back to a 1:1 ratio for N3E. Intel has only used it on the 10 nm/Intel 7 family, with Intel 4, 3 and 18A all using a 1:1 ratio. Samsung is the only one still using a 3:2 ratio at the leading edge, using it in the SF4 and SF3 families. It remains to be seen if SMIC will remain at a 3:2 ratio or move to a 1:1 ratio with its future nodes. The industry is still actively exploring these local-routing ratios. At VLSI 2026, imec will be presenting work on even higher ratios, including a 2:1 scheme that can reduce area by up to 14%. We will be covering the conference in a future newsletter article. Subscribe We’re diving deep into the most advanced datacenter and AI hardware hitting the market. To learn more about what’s in the pipeline or to commission a custom teardown, contact sales@semianalysis.com. Interested in joining us on this ride and think you can be a difference maker? Check out our Careers page. The final local interconnect layer for N+3 is M3, with a pitch of 44 nm. The M3 pitch is the same as on N+2 and 10% larger than on N6. The semi-global layers carry the majority of block-level signal routing. They have a coarser pitch than the lower local layers. On leading-edge nodes, they are designed to sit at the limit of DUV single patterning. M4 through M11 pitches were found divided between 80–82 nm (M4–M6), 128 nm (M7–M10), and 148 nm (M11). Given limited sampling, it is possible these are divided further in dense routing areas. At the top are two giant metal layers, M12 and M13. These have kept the same pitches as N+2 at 1920 nm and 4600 nm respectively. While the lower layers’ pitches are generally fixed by the process and library, the upper layers vary much more in pitch and count, depending on the design. Even two smartphone SoCs on the same process can have wildly different metal stacks. The Helio G99 carries fewer routing layers, reaching coarse metal pitches of 850 nm by M9, while the larger and higher-performance Kirin 9030 keeps fine pitches until M11. SRAM At the leading edge, SRAM is much more difficult to scale than logic. TSMC’s latest nodes have seen little to no bitcell scaling, while logic still has more DTCO levers to pull. While looking for other logic libraries in the GPU compute units, we stumbled upon the SRAM. The most common type of SRAM has 6 transistors (6T), but this cell had 8 transistors (8T) instead. 8T SRAM adds two transistors to form a dedicated read port. Unlike a 6T cell, where reading disturbs the storage, the decoupled read port removes read-disturb, improving read stability and letting the cell be pushed harder for performance. At first glance, the cut looked like an unusual logic library, with each cell row having 3 fins of one polarity and 5 fins of another. The rows also alternated in orientation. Energy-dispersive X-ray spectroscopy (EDS) resolved our confusion. The cut had not landed on the GPU logic, but on the SRAM macro beside it. The unusual fin pattern was due to the SRAM library. We return to EDS in the process flow analysis behind the paywall. SRAM libraries are not like traditional logic libraries. Due to the unequal number of PMOS and NMOS transistors, they require specialized rules and layout libraries. They do not need the flexibility of logic libraries, so they are hyper-optimized for one purpose: dense, reliable memory. The SRAM cell we found is a 1:2:2-2:2 cell. This means there is 1 fin per pull-up (PU) PMOS transistor, and 2 fins per pull-down (PD) and pass-gate (PG) NMOS transistor. These 2 PU, 2 PD and 2 PG transistors would usually form a single 6T high-current cell (HCC). An 8T HCC adds a read-pull-down (RPD) and a read-pass-gate (RPG) NMOS transistor, each with two fins. We measured a cell height of 406 nm, which brings the bitcell size to 0.0463 µm². That is a theoretical peak density of 21.6 Mib/mm². We estimate that a 6T HCC would have a cell height of 292 nm and a size of 0.0337 µm². This is ~12% larger than a 6T HCC on Intel 3 and 4. We also estimate the 6T high-density cell (HDC) to have a cell height of 228 nm and a size of 0.0260 µm². This is coincidentally the same as the logic standard-cell height measured earlier. The estimate puts the cell near Samsung 7LPP/5LPP and slightly below TSMC N7/N6. That is a theoretical peak density of 38.5 Mib/mm². 6T HDC is arguably the most important cell as it is used for the largest caches in a chip, the L3 caches and system-level cache (SLC). Both the Kirin 9020 and 9030 have split the SLC into 4 banks to raise total SLC bandwidth. In the Kirin 9030, the SLC increased from 2 MiB to 3 MiB per bank. Correspondingly, the number of arrays within the bank also increased by 50%, from 16 to 24. Each array can store 128 KiB and forms an orderly pattern on the die shot. From the Kirin 9020 to the Kirin 9030, the area of a 128 KiB SLC array decreased from 0.0477 mm² to 0.0392 mm², an 18% shrink. The achieved density is 25.5 Mib/mm², 66% of the theoretical maximum. While the SLC was quite similar across both chips, the L3 has seen some major changes, particularly in terms of its layout. The total capacity also went up from 10 MiB to 12 MiB. Much like the SLC, the L3 is also split into 4 banks. In the Kirin 9020, an L3 bank consisted of 16× 128 KiB arrays and 16× 32 KiB arrays. However, an L3 bank in the Kirin 9030 instead consists of 48× 64 KiB arrays. In the Kirin 9020 L3, a 128 KiB array was 0.0513 mm² and a 32 KiB array was 0.0154 mm². The size of the 128 KiB array is different on the L3 and SLC as the assist circuitry for the two arrays differs depending on their purpose. In the Kirin 9030 L3, a 64 KiB array is 0.0210 mm². Although not a like-for-like comparison, normalized for capacity, it is 18% smaller than the 9020’s 128 KiB L3 array and 31% smaller than its 32 KiB L3 array. The achieved density is slightly lower than the SLC, at 23.8 Mib/mm², 62% of the theoretical maximum. Unlike the L3 and SLC, the prime cores’ private L2 cache uses a 2-bank design. As the prime cores’ L2 is latency-critical, it likely uses 6T HCC instead of 6T HDC. The 9020 has 16 arrays in each bank while the 9030 has 32. Each array has a capacity of 32 KiB. A 32 KiB array in the L2 shrank from 0.0171 mm² to 0.0142 mm², ~17% smaller. The density is 17.6 Mib/mm², ~59% of the theoretical maximum for 6T HCC. SRAM scaled well from N+2 to N+3, shrinking by ~19%, close to the theoretical logic shrink. The caveat is that N+2’s bitcells were unusually large, bigger than comparable 7 nm-class nodes, so part of the gain is catch-up rather than true scaling. With the insights from STEEL’s teardowns, we will be doing a deep dive into SRAM in a future newsletter article. Subscribe Everything above came out of a single STEEL teardown: die annotation, block-level area analysis and TEM cross-sections through logic and SRAM. We’re diving deep into the most advanced datacenter and AI hardware hitting the market. To learn more about what’s in the pipeline or to commission a custom teardown, contact sales@semianalysis.com. Future Roadmap The same cross-sections that pin down N+3 also show where SMIC can go next. Although N+3 is already close to the practical limits of DUV multi-patterning in several layers, SMIC still has a few scaling levers left. A theoretical N+4 would likely start with cell height. N+3 uses 5 M0 tracks between its power rails. Moving to 4 M0 tracks, as on SMIC N+2 and TSMC N6, could reduce cell height by roughly 15%. The routing grid is only one side of the shrink; the front end also must fit into the smaller cell. One possible FEOL lever is reducing the p-to-n isolation spacing from two diffusion grid units to one. Intel used this scaling booster on Intel 4, and TSMC did so on its N3 family. This path trades layout flexibility for density. Fewer M0 tracks reduce local routing resources, while tighter p-to-n spacing raises integration and design-rule difficulty. M2 is also constrained by the cell height shrink. For SMIC to maintain a ~5.7-track cell, M2 would need to move toward ~35 nm. That would move another layer into SAQP territory. SMIC could also reduce the CGP from 57 nm to 54 nm. Intel reached a similar CGP on Intel 10 nm/Intel 7 without EUV. The local interconnect is also tougher. If SMIC keeps the 3:2 M1-to-gate ratio, M1 would need to shrink to 36 nm and would likely require SAQP as well. If SMIC moves to a 1:1 ratio, M1 could relax to 54 nm, but it would give up routing flexibility. Under this theoretical path, we estimate that SMIC N+4 could reach a cell height of 198 nm and a CGP of 54 nm, implying a Bohr density of 137.8 MTr/mm², on par with TSMC N5 or Samsung SF4. However, the difficulty is cumulative. Each step is individually plausible, but together they make N+4 harder than the transition from N+2 to N+3. It will likely take longer, cost more, and carry less process margin. A theoretical N+5 would require a larger integration shift. One possible path is backside contacts (BSCon), moving power routing and source/drain contacts to the backside, which would reduce front-side routing pressure and enable another reduction in cell height. The front-side metal pitches could relax to reduce the process complexity. M0 would likely relax slightly to ~34 nm, and M2 and M4 pitches could relax further. CGP is unlikely to shrink much further. Even with EUV, 48 nm has been the practical limit for yield and process control. This approach would allow N+5’s cell height to fall to 170 nm and its CGP to 53 nm. This implies a Bohr density of 163.6 MTr/mm², on par with Intel 18A’s HP library. However, this would not make N+5 cost-competitive with the leading edge. It would reach a similar density through a much more expensive route. The integration difficulty rises sharply, with new process flows for backside alignment, wafer thinning, contact reveal, and backside metallization. Past this point, standard density and interconnect scaling become increasingly unattractive. That is where Huawei’s roadmap stops looking like a normal foundry roadmap and starts looking like a packaging roadmap. At ISCAS 2026, Huawei unveiled its tau (τ) scaling law, reframing process scaling in the time domain. τ is the time cost of data movement and processing: switching delays in transistors, RC signal propagation delays in circuits, compute, memory, and networking latency. Outside Huawei’s terminology, this is called system-technology co-optimization. This is Huawei’s answer to its lack of EUV lithography. Without EUV, planar density cannot keep pace with TSMC, Intel, or Samsung. If transistor density cannot shrink further, Huawei’s alternative is to shorten wires, reduce buffering, and stack logic vertically. “LogicFolding”, Huawei’s implementation of this new scaling idea, is, in practice, an aggressive 3D stacking approach. AMD V-Cache places SRAM above or below a CPU die. AMD’s MI350X places active interposer dies (AIDs) underneath accelerator and compute dies (XCDs), with the AIDs handling cache, IO interfaces, the network-on-chip (NoC) and embedded metal-insulator-metal (MIM) capacitors. With LogicFolding, parts of the same logic block are split across multiple active dies bonded face-to-face at ultra-fine pitch. This allows Huawei to shorten some critical paths and reduce buffer overhead, not merely add cache capacity or offload the IO and interconnect. Shortening wires is where the higher clocks come from. A large share of a modern core’s delay and energy budget goes into driving long interconnects and the repeater buffers along them. LogicFolding distributes a block’s critical-path gates across multiple stacked tiers bonded at a very fine pitch, so the bond interface behaves like an additional metal layer and the longest paths get shorter. That is how Huawei expects to recover frequency and efficiency it cannot get from the process alone. Huawei’s roadmap shows its intent. Prime core frequency is targeted to rise from 2.75 GHz in the Kirin 9030 to roughly 5 GHz by 2031, far beyond what planar scaling alone could deliver. Prime cores with 3.1 and 3.39 GHz clocks are being tested in its labs, although their power consumption is unknown. Beyond that, chips are in the design, simulation or pathfinding phase, meaning the frequencies are targets. However, the direction matters more: LogicFolding also helps with performance, not just density. The catch is that Huawei’s density claim is not directly comparable to foundry densities. A stacked design can report more transistors per package footprint by adding active layers, even if each patterned die remains well behind TSMC or Intel in front-end density. This is how Huawei can claim to reach foundry 14A-equivalent density by 2031. This is not a like-for-like foundry comparison, with Huawei using stacked logic and measuring density per package footprint. On a normalized Bohr-density basis, SMIC N+3 is ~114 MTr/mm², 38% less than Intel 18A’s HD library. Huawei’s 3D roadmap closes the gap by stacking active logic, reaching 215 MTr/mm² by 2030. In 2031, the roadmap density jumps to 295 MTr/mm², implying either a third active layer, partial EUV insertion or aggressive planar DUV scaling. Huawei’s methodology makes other foundries look much denser as well. Applying it to AMD’s MI450X with an N2 top die on an N3P base die yields a theoretical density of 460.2 MTr/mm² in 2026, compared with Huawei’s 295 MTr/mm² in 2031. This Kirin 9030 does not use LogicFolding, remaining in a conventional mobile SoC package. Instead, it forms the baseline for how far Huawei and SMIC can push planar scaling. Future teardowns of Kirin and Ascend chips will show both planar logic density and Huawei’s hybrid bonding solutions. Export controls changed China’s optimization problem rather than ending it. EUV restrictions raised the cost and complexity of leading-edge manufacturing without freezing it. SMIC reaches N6-class logic density through DUV immersion, SAQP and DTCO, while Huawei shifts more of the burden onto architecture, packaging and system-level integration. Future nodes will be tougher. N+3 still had room to tighten local metals and reduce cell height and CGP. Further scaling without EUV leaves fewer levers. More aggressive multi-patterning adds masks and overlay error. SMIC can keep pushing DUV, but each step will get more expensive and less forgiving. The design side is just as critical. Huawei had domestic EDA tools and flows before the Kirin 9030, with the Kirin 9000s, 9010 and 9020 making that clear. Huawei was able to ship multiple consumer SoCs on SMIC N+2 and N+3 while cut off from the Western EDA stack. US export controls restricted EDA tools for advanced chips in 2022 but did not target tools for more mature chips. In 2025, the US government briefly placed much broader restrictions on EDA software from Synopsys, Cadence, and others, before lifting them less than two months later as part of a trade deal tied to rare earths. Huawei has been unable to access those tools because it remains on a US trade blacklist. That forced Huawei, SMIC and Chinese academic institutions to build their own tools and flows. Researchers at Peking University recently announced a prototype EDA tool for Huawei’s LogicFolding architecture, which requires a new flow to handle the multilayer layout and floorplan. This is not the same as replacing the full Synopsys or Cadence stack, but it shows where domestic EDA is headed: toward tighter co-optimization between architecture, process and packaging. These advances are also diffusing into the Chinese ecosystem. SMIC is licensing its N+2 and N+3 processes to HLMC/Hua Hong at the government’s direction rather than by choice. If the same process learning feeds into Ascend accelerators for AI training and inference, the choke point shifts from one named fab to an ecosystem. Alibaba’s T-Head silicon arm and Cambricon, a Chinese AI chip designer that is expected to supply ByteDance, could also be major beneficiaries. Sanctions aimed at SMIC alone become less effective once the manufacturing knowledge has spread to other fabs and design houses. China is not closing the gap with Intel, Samsung and TSMC. The teardown shows the opposite in several places: no EUV, no backside power, higher process complexity, and visible trade-offs. But China is still advancing. If domestic chips become good enough for phones, inference, networking and security-sensitive workloads, they can matter strategically without matching TSMC at the leading edge. Behind the paywall, we show what else STEEL can do, with material and process flow analysis of SMIC N+3, and analysis of the Kirin 9030 package. We’re diving deep into the most advanced datacenter and AI hardware hitting the market. To learn more about what’s in the pipeline, access the full Kirin 9030 and SMIC N+3 analysis or to commission a custom teardown, contact sales@semianalysis.com.
Florida Supreme Court rules new congressional map can stand for 2026 Midterms
Justices declined to intervene and reverse a circuit court decision that was upheld by an appellate court.
North Dakota judicial nominee questioned on political views during Senate hearing
A North Dakota federal judge nominated to serve on the 8th Circuit Court of Appeals answered pointed questions from U.S. senators Wednesday about whether judges should speak out on political issues.
Business Restructuring Review Vol. 25 No. 3 May-June 2026
In This Issue Texas Bankruptcy Court Adopts Barnet Rule Requiring Foreign Debtor to Have U.S. Assets to Be Eligible for Chapter 15 Relief In In re Siu-Fung Ceramics Holdings Limited, No. 24-33299, 2026 WL 382424 (Bankr. S.D. Tex. Feb. 10, 2026), the court denied petitions for chapter 15 recognition of Hong Kong bankruptcy and liquidation proceedings commenced on behalf of an individual debtor and a group of companies that he owned or controlled. According to the court: (i) the corporate debtors' Hong Kong liquidation proceeding was not eligible for chapter 15 recognition because the attorney retainer upon which such relief was based was not funded until nine months after the chapter 15 petition date; and (ii) the individual debtor's Hong Kong bankruptcy case could not be recognized because the debtor's "center of main interests" on the chapter 15 petition date was not in Hong Kong, and he did not even maintain an "establishment" there. [read more …] Southern District of Texas Clarifies Post-Purdue Course for Consensual Third-Party Releases and Gatekeeping Provisions In In re Container Store Group, Inc., 676 B.R. 356 (S.D. Tex. 2026), appeal filed, No. 26-20166 (5th Cir. Apr. 14, 2026), cross appeal filed, No. 26-20166 (5th Cir. Apr. 24, 2026), the U.S. District Court for the Southern District of Texas addressed consensual third-party releases and gatekeeping provisions in the aftermath of the U.S. Supreme Court's ruling in Harrington v. Purdue Pharma L.P., 603 U.S. 204 (2024). Consistent with existing Fifth Circuit precedent, the court confirmed that, in appropriate circumstances, consent for third-party releases may be obtained through a creditor's failure to opt out of granting that consent. But, the court ruled, consent through an opt-out mechanism essentially can never be inferred for creditor classes that stand to receive no recovery under a chapter 11 plan and that are deemed to reject the plan by operation of applicable bankruptcy law. Instead, those classes must affirmatively opt in to any release. The court also narrowed and remanded the bankruptcy court's acceptance of a broad gatekeeping provision, ruling that such provisions must correspond to the restrictions established by Fifth Circuit precedent. [read more …] Delaware Bankruptcy Court: Initial Transferee Need Not Be Defendant in Fraudulent Transfer Avoidance and Recovery Litigation The Bankruptcy Code gives a bankruptcy trustee the power to avoid asset transfers that are either made with the intent to defraud creditors or that are "constructively" fraudulent because an insolvent debtor did not receive adequate value in exchange. The Bankruptcy Code also permits recovery of an avoided transfer from not only the initial recipient, but also from subsequent transferees. Courts disagree over whether a transfer must actually be avoided before the trustee can seek recovery from a subsequent transferee and whether the initial transferee must also be a defendant in the recovery litigation against a subsequent transferee. The U.S. Bankruptcy Court for the District of Delaware weighed in on this debate in Phillips v. SS Associates LLC (In re ONH AFC CS Investors, LLC), No. 23-10931 (CTG), 2026 WL 312892 (Bankr. D. Del. Feb. 4, 2026). The court adopted the majority view, ruling that the initial transferee need not be a defendant in avoidance and recovery litigation against a subsequent transferee, but that the trustee must establish the elements necessary to avoid the initial transfer as part of the recovery litigation. [read more …] New York Bankruptcy Court Weighs In on Adequate Assurance of Future Performance under Assigned Leases and Chapter 11 Plan Exculpation Provisions In order to assume and assign an executory contract or unexpired lease, a bankruptcy trustee must cure most defaults under the agreement and provide "adequate assurance" of the assignee's future performance. However, the Bankruptcy Code provides no guidance as to the meaning of "adequate assurance" other than with respect to shopping center leases. In In re Broadway Realty I Co. LLC, No. 25-11050, 2026 WL 147505 (Bankr. S.D.N.Y. Jan. 19, 2026), the U.S. Bankruptcy Court for the Southern District of New York examined this issue in connection with a proposed assignment of thousands of residential leases as part of a free-and-clear sale of debtors' properties. The court held that "adequate assurance" does not mean a guarantee of the assignee's future performance, but merely demonstration that the assignee has the ability to satisfy the underlying obligations. The bankruptcy court also ruled that an exculpation provision in the debtors' chapter 11 plan exonerating non-estate fiduciaries from liability for actions taken in connection with the chapter 11 case was unobjectionable, provided it was limited in scope to postpetition conduct and actions taken in connection with implementation of the plan after its effective date. [read more …] Newsworthy Corinne Ball (New York) (Hall of Fame), Bruce Bennett (Los Angeles), Carl E. Black (Cleveland), Jeffrey B. Ellman (Atlanta), Brad B. Erens (Chicago), Gregory M. Gordon (Dallas), Heather Lennox (Cleveland/New York), Joshua M. Mester (Los Angeles), and Kevyn D. Orr (Washington) were included in the 2026 edition of Lawdragon 500 Leading Bankruptcy and Restructuring Lawyers. The Daily Business Review selected Isel M. Perez (Miami) as an "On the Rise" winner for the Florida Legal Awards. The Florida Legal Awards annually recognize those who have made significant contributions to the legal industry in Florida. Dan T. Moss (Washington/New York) was inducted as a Fellow in the 37th Class of the American College of Bankruptcy at its Annual Meeting in March 2026 in San Antonio, Texas. Christine Borries (Munich) was ranked in the practice area Restructuring/Insolvency in the 2026 edition of Chambers Germany. The 2027 edition of The Best Lawyers in Singapore™ recognized Sushma Jobanputra (Singapore) in the practice area Insolvency & Reorganization. The restructuring transaction involving Eissmann Automotive North America, Inc. received the "2025 Turnaround of the Year (Large Company)" at the Turnaround Management Association (Detroit) Annual Awards Reception. T. Daniel Reynolds (Cleveland) and Nick Buchta (Cleveland) represented subsidiaries of Eissmann Group Automotive in connection with the parent company's German insolvency proceedings. Roger Dobson (Sydney) is among 40 Jones Day lawyers recognized by The Best Lawyers in Australia 2027 for his contributions in Banking and Finance Law; Distressed Investing & Debt Trading; Insolvency and Reorganization Law; Litigation. An article written by Corinne Ball (New York) titled "Ard Finance—A Global Enterprise Combining an LME With a Foreign Insolvency Proceeding and Chapter 15" was published in the April 21, 2026, edition of the New York Law Journal. An article written by Alex Sapp (New York) titled "Recent Developments in Section 510—Subordination" was published in the 2025 edition of the Norton Annual Survey on Bankruptcy Law. An article written by Brad B. Erens (Chicago) titled "New York Bankruptcy Court Approves Insider DIP Litigation Financing" was published on April 6, 2026, by Lexis Practical Guidance. An article written by Corinne Ball (New York), Dan T. Moss (Washington/New York), David S. Torborg (Washington), and Isel M. Perez (Miami) titled "New York District Court Affirms Narrow Scope of 'Public Policy Exception' in Chapter 15 Cases" was published on April 6, 2026, by Lexis Practical Guidance. An article written by Jeffrey B. Ellman (Atlanta) titled "Statutory Cap on Lease Rejection Damage Claims in Bankruptcy Applies to Solvent Debtors" was published on April 6, 2026, by Lexis Practical Guidance. An article written by Trisha L. Mowbray (Real Estate; Chicago) and Ryan Sims (Washington) titled "Chapter 11 Plan that Abridged Non-Debtor Lessee's Rights to Remain in Possession After Rejection Unconfirmable as Having Been Proposed in Bad Faith" was published on April 6, 2026, by Lexis Practical Guidance. Lawyer Spotlight: Ben Rosenblum Ben Rosenblum, a partner in the New York Office, represents debtors, creditors, and other parties in out-of-court restructurings and court-supervised proceedings, including chapter 11 cases, municipal bankruptcies, international insolvency matters, and stockbroker liquidations. His experience spans industries such as manufacturing, shipping, mining, aviation, energy, real estate, and telecommunications. Ben's notable debtor representations include Peabody Energy, the City of Detroit, Chrysler LLC, Spansion Japan, and Dana Corporation. Significant creditor representations include General Maritime Corporation, Calpine Corporation, American Home Mortgage, and Murray Energy. He currently represents creditors in Puerto Rico's restructuring. He also has extensive experience advising financial institutions on bankruptcy law as applied to derivatives.
U.K. Needs to Take More Risks to Retain Startups, Business Secretary Says
The government has taken stakes in startups like Kraken, Wayve and Oxford Quantum Circuits in recent weeks, in a bid to prevent them from moving out of the country to look for funding.
Scientists mapped every neural connection in a fruit fly and found a surprise
A groundbreaking new connectome maps every neural connection in an adult fruit fly’s central nervous system, creating an unprecedented view of how the brain and body work together. The findings suggest that complex behaviors emerge from distributed local circuits rather than a single central controller, offering new clues about intelligence, movement, and brain function.
City Files Suit Regarding Proposed Business
The City of Greenville has filed a lawsuit in Bond County Circuit Court against the company and three individuals who proposed a sports bar/restaurant business in the former Watson’s Drug Store building on the Greenville square. Named as defendants are W.G.O. Investments, LLC, and member managers of the developer, Joseph Gira, Tim O’Donnell and Dan
Tribeca 2026 After Hours: A Guide to the Fest’s Best After Parties and Events
As New York City braces for a stretch of 80-degree days this week, Tribeca’s 25th anniversary edition is also bringing some serious heat to New York’s after-hours circuit. Running June 3-14, this year...
Backfire News Weekly Recap: June 4–6, 2026
It was a packed week on Backfire News, with coverage spanning Formula 1, NASCAR history, truck culture, collector cars, and a few somber losses across the racing world. Thirteen posts went live between June 4 and June 6, 2026. Here is the full rundown. Formula 1 in the Spotlight F1 dominated the week. A feature on the Monaco Grand Prix experience explored why the street circuit remains the sport's most iconic and unusual weekend, while a look at a $75 million superyacht captured the glamour that
Ferrari confirm Vasseur replacement for Monaco after health-related absence
Ferrari deputy team principal Jerome d'Ambrosio will step in for Frederic Vasseur during Saturday's action in Monaco, Ferrari confirmed to GPblog. The French team principal is absent from the circuit due to health reasons.
EA SPORTS launch F1 25 2026 Season Pack worldwide
EA SPORTS have launched the 2026 Season Pack for F1 25, adding the latest regulations, cars, teams, driver line-ups, and the virtual Madring circuit.
Scientists reverse anxiety by fixing a tiny brain circuit
A newly identified group of amygdala neurons appears to play a central role in anxiety and social behavior. Restoring normal activity in this tiny brain circuit reversed anxiety and social deficits in mice, revealing a promising new target for future treatments.
Where biology meets behavior
The University of Utah launches a new undergraduate neuroscience major.
Clutch is Maverick Games' new AAA cinematic driving game, coming in 2027
Developed by a team of Playground Games and Codemasters veterans, Clutch aims to “break the mould of modern driving games,” combining professional circuit competitions, underground street racing and cinematic chases.
Gravity Circuit 2 announced for PS5, Switch, and PC
Publisher Dear Villagers and developer Domesticated Ant Games have announced side-scrolling action platformer sequel Gravity Circuit 2. It will launch for PlayStation 5, Switch, and PC via Steam an…
New 3D silicon chip breakthrough could extend Moore’s Law for years
As traditional chip miniaturization slows, researchers have found a way to pack more computing power into the same space by stacking silicon circuits in multiple layers. The new process uses ultra-thin silicon membranes and low-temperature manufacturing techniques to overcome a major obstacle that has long blocked the production of true 3D chips.
New 3D silicon chip breakthrough could extend Moore’s Law for years
As traditional chip miniaturization slows, researchers have found a way to pack more computing power into the same space by stacking silicon circuits in multiple layers. The new process uses ultra-thin silicon membranes and low-temperature manufacturing techniques to overcome a major obstacle that has long blocked the production of true 3D chips.
Caffeine reversed memory problems caused by sleep deprivation
Scientists discovered that sleep deprivation damages a key brain circuit responsible for social memory, making it harder to recognize familiar individuals. In laboratory studies, caffeine restored communication between neurons in this pathway and reversed the memory deficits caused by lost sleep. The effect was remarkably targeted, helping the impaired circuit recover without overstimulating normal brain function.
‘Respect for rule of law’: Miami-Dade Fraternal Order of Police backs Destiny Alvarez for Circuit Court Judge
There's a Donald Trump angle to Alvarez's bid.
Tennessee attorney general says Kalshi is running sports betting under another name
Tennessee’s legal fight against prediction market platform Kalshi is now heading to the Sixth Circuit Court of Appeals, setting up for a growing national battle over whether sports event contracts …
Delighted Hamilton rolls back years with vintage runner-up effort
Delighted Lewis Hamilton rolled back the years on Sunday to finish second for Ferrari in the Canadian Grand Prix then declared Circuit Gilles Villeneuve his favourite track in the world.Hamilton, 41, claimed his maiden F1 victory in the 2007 Canadian Grand Prix and shares the record of seven wins at the circuit with Ferrari great Michael Schumacher.
Bill Belichick Appears To Be Doing 'Damage Control' Right Now
North Carolina head coach Bill Belichick has been doing the media circuit recently, appearing on major programs with Sean Hannity and Pardon My Take. But one analyst believes that the longtime rival of the media is doing it more out of damage control than a desire to get his face on camera. It was ...
Rewrite the Grid: EA SPORTS™ Reveals F1® 25: 2026 Season Pack
The story continues with the 2026 Season Pack* for EA SPORTS’™ F1® 25, Featuring New Teams, Drivers Rosters, Rules Regulations, and MADRING Track Watch the Reveal Trailer Here Electronic Arts Inc. (NASDAQ: EA) invites players to rewrite the grid in the all-new 2026 Season Pack* for EA SPORTS’™ F1 ® 25 , the official video game of the 2026 FIA Formula One World Championship™, coming to PlayStation®5, Xbox Series X|S and PC on June 3, 2026. The 2026 Season Pack welcomes in a groundbreaking new era of F1®, featuring the updated rules and regulations for the 2026 F1® season, the introduction of two teams: Audi Cadillac, and their driver rosters to the grid, new action-packed gameplay features, and the highly anticipated MADRING circuit; the first new F1® circuit since 2023. The F1® 25: 2026 Season Pack continues to innovate the iconic racing experience. Implementing real-world regulation changes, the 2026 Season Pack showcases lighter, smaller cars† with active
New MatterChat Model Helps AI to ‘See’ the Language of Science
From writing emails to generating computer code, much of the artificial intelligence prevalent in our daily lives has succeeded by mastering one domain: text. However, this leaves a major blind spot in the physical sciences, where models depend on the high-resolution, three-dimensional data of the physical world, like the intricate lattice of atoms in a crystal. Delivering on the promise of using AI for science requires teaching these data-driven text models to seamlessly “talk to” physics-based models. Now, a new AI framework from Lawrence Berkeley National Laboratory (Berkeley Lab), called MatterChat, solves this problem by creating a specialized “bridge.” It connects the conversational power of a Large Language Model (LLM) with a physics-based AI that models “interatomic potentials”: the complex physical forces between atoms. The resulting system already significantly outperforms general-purpose AI tools like GPT-4 at predicting material properties, and the team hopes it can accelerate scientific discovery by serving as a robust research partner that provides grounded insights and generates step-by-step instructions for synthesizing novel materials. A paper describing this work was recently published in Nature Machine Intelligence. “Traditional simulations can provide the physical rigor required for materials science, yet their computational cost remains prohibitive for high-throughput screening. Conversely, while LLMs excel at rapid knowledge synthesis, they inherently lack the ‘structural vision’ to interpret materials directly from their underlying atomic coordinates,” said Yingheng Tang, a postdoctoral researcher in Berkeley Lab’s Applied Math and Computational Research Division (AMCR) and lead author on the paper. “MatterChat was built to solve this dilemma, empowering LLMs with a structural ‘vision’ that allows researchers to leverage their full potential for solving complex, real-world materials challenges.” Empowering language models to solve complex challenges in materials science To build MatterChat, the Berkeley Lab team drew inspiration from technologies like Vision Question Answering (VQA) and Text-to-Image (T2I) generation. In these tasks, AI must translate high-level text concepts into visual images, or vice versa. Doing so requires developers to build tools that “bridge” two fundamentally different forms of data. The researchers adapted this concept to the physical sciences. With MatterChat, they created a “bridge model” that successfully connects an LLM’s general knowledge with the deep understanding of the atomic-scale world encoded in scientific interatomic potentials. Until now, researchers using LLMs to solve materials problems usually had to feed them raw data files as if they were just strings of text. It’s like asking an AI to understand a complex 3D engine based only on a parts list: the LLM can read the names, but it can’t “see” how the atoms fit together in space. MatterChat solves this by training a specialized AI bridge model, pre-trained on millions of crystal structures and an LLM, to align the LLM’s representation of the world with the interatomic potential’s representation of the world. The bridge model can translate physical insights into a format the LLM can actually understand. By giving the LLM these “scientific eyes”— a scientific “inductive bias” in the terminology of AI — the Berkeley Lab team has transformed it into a robust research tool capable of providing grounded scientific insights into complex materials challenges, such as predicting thermal stability or analyzing electronic band gaps. “We think of atoms as living in a physical space, but from a machine learning perspective, they are just vectors living in some very non-trivially structured manifold in a high-dimensional Euclidean space; and, of course, the same is true for the sentences and paragraphs that we use to express our ideas about those atoms,” said co-author Michael Mahoney, Berkeley Lab’s Scientific Data Division (SDD) AI Initiative Research Lead. “The bridge model basically gets those two structures to ‘talk with’ each other.” As a proof-of-concept of this general approach, the team trained their bridge model on a dataset curated by pairing nearly 143,000 stable atomic structures from the Materials Project with their corresponding physical properties. This training data was automatically assembled using the Materials Project’s API and deliberately enriched with properties fundamental to microelectronics design — like formation energy and bandgap — allowing MatterChat to learn the complex patterns connecting a material’s atomic blueprint to its functional performance. To validate their model, the researchers benchmarked MatterChat against a suite of other AI systems, from general-purpose LLMs to other specialized scientific AI methods. The results show that MatterChat consistently outperformed its competitors across a range of tasks. The model was more accurate in classifying material types and demonstrated superior precision in predicting numerical properties. For example, it excelled at predicting a material’s bandgap, a property critical for designing new electronics from high-capacity energy storage to next-generation computer chips. “Our design is significantly more efficient because we don’t have to build a massive AI model from the ground up,” said co-author Zhi (Jackie) Yao, a research scientist in Berkeley Lab’s AMCR. “Instead, we take two powerful, pre-trained models — a structural encoder for materials physics and an open-source LLM — and use them off-the-shelf. The only component we actually train is the lightweight ‘bridge model’ that translates between them. It’s the difference between building an entire car factory and simply designing a smart adapter that connects a world-class engine to a world-class navigation system. This approach is not only computationally efficient, but also makes the system modular, so we can easily upgrade components or adapt the bridge for other scientific domains in the future.” Crucially, this modular design highlights exactly how institutions like Berkeley Lab and the Department of Energy are carving out a highly valuable niche in the booming AI landscape. Rather than competing with Silicon Valley tech giants to build ever-larger language models from scratch, the lab is focusing on the specialized connective tissue that makes commercial AI useful for hardcore science. Because the bridge model approach underlying MatterChat is forward-compatible, it is perfectly positioned to leverage these parallel tracks of innovation. As Mahoney pointed out, “We expect that industry will continue to develop improved LLMs, and we expect domain scientists and facilities will continue to generate new data. An important part of scientific machine learning is not simply to solve problems on today’s data, but instead to develop general methods that will be forward-compatible with orders of magnitude more data, whether from scientific domains or from LLMs.” According to Yao, the MatterChat project, which was initially developed and enhanced with funding from a Berkeley Lab Laboratory Directed Research & Development (LDRD) Program, will now expand its capabilities. In a collaboration with Fermilab, MatterChat is already contributing to a U.S. Department of Energy Genesis Mission project — called Accelerating eXtreme Environment Specs-to-Silicon (AXESS) — that aims to speed up the development of next-generation, high-speed, radiation-hardened detectors for challenging particle physics experiments by using advanced 3D integrated circuits (chiplets) and AI-driven data analysis. In addition to the LDRD support, the team also credits supercomputing resources at the National Energy Research Scientific Computing Center (NERSC), located at Berkeley Lab, with MatterChat’s success. “We are incredibly grateful to NERSC; this research simply would not have happened without access to the Perlmutter supercomputer through their AI for Science program,” said Tang. Wenbin Xu, a NERSC postdoctoral fellow at the time, was also a major co-author of the work, as was Benjamin Erichson, a research scientist in Berkeley Lab’s SDD, highlighting the benefits of AMCR-SDD collaboration on AI for science. ### Lawrence Berkeley National Laboratory (Berkeley Lab) is committed to groundbreaking research focused on discovery science and solutions for abundant and reliable energy supplies. The lab’s expertise spans materials, chemistry, physics, biology, earth and environmental science, mathematics, and computing. Researchers from around the world rely on the lab’s world-class scientific facilities for their own pioneering research. Founded in 1931 on the belief that the biggest problems are best addressed by teams, Berkeley Lab and its scientists have been recognized with 17 Nobel Prizes. Berkeley Lab is a multiprogram national laboratory managed by the University of California for the U.S. Department of Energy’s Office of Science. DOE’s Office of Science is the single largest supporter of basic research in the physical sciences in the United States, and is working to address some of the most pressing challenges of our time. For more information, please visit energy.gov/science.
The DOJ Just Made a Shocking Confession About One of Trump’s Worst Early Executive Orders
On Thursday, the U.S. Court of Appeals for the D.C. Circuit heard argument in two cases about when the president can target private attorneys.
The brain’s “feel good” chemical may be secretly fueling tinnitus
Scientists have uncovered evidence that serotonin — the same brain chemical boosted by many antidepressants — may actually worsen tinnitus. Using advanced light-based brain stimulation in mice, researchers identified a serotonin-driven circuit linked directly to tinnitus-like behavior. The findings may explain why some people experience louder ringing in their ears while taking SSRIs.
Trump picks Daniel Domenico for 10th Circuit vacancy
President Donald Trump announced on Monday that U.S. District Court Chief Judge Daniel D. Domenico is his choice to fill an upcoming vacancy on the Denver-based federal appeals court. Domenico, who is 54 this year, is Trump’s only appointee to Colorado’s federal trial court. He became its chief judge in March, after seven years on […]
A woman for all seasons: Mescher teaches science and coaches wrestling at Battle when she's not competing in roller derby
A lifelong soccer player, Battle wrestling coach Kelsey Mescher now satisfies her competitive itch through coaching and in the roller-derby rink, where she is a staple of the circuit.
F1 Miami Grand Prix 2026: Kimi Antonelli, Max Verstappen recover from poor starts as anticipated rain does not fall
Formula 1 returns to the track after a five-week hiatus with its first of three trips to the United States this weekend for the Miami Grand Prix. The race, now in its fifth year, takes place on a temporary circuit that envelopes the Miami Dolphins' Hard Rock Stadium.
F1 Miami Grand Prix 2026: Early chaos results in safety car, four retirements
Formula 1 returns to the track after a five-week hiatus with its first of three trips to the United States this weekend for the Miami Grand Prix. The race, now in its fifth year, takes place on a temporary circuit that envelopes the Miami Dolphins' Hard Rock Stadium.
Federal appeals court upholds conviction of ex-Illinois House Speaker Michael Madigan
The news from the 7th U.S. Circuit Court of Appeals comes less than three weeks after oral argument and will likely prompt a bid by Madigan to the U.S. Supreme Court.
Gran Turismo 7 Update 1.69 Now Available: More Power Pack Changes & Nurburgring Reverse Circuit Experience
Gran Turismo 7 continues to evolve, with a new content update available today that brings not only new cars from across the automotive spectrum but a handful of some pretty esoteric changes to the title too. Coming in at around 1GB -- a little under on PlayStation 5, a little over on PlayStation
Judge bars certification of Virginia redistricting results; state AG promises appeal
A congressional map approved by Virginia voters that aims to help Democrats net four US House seats in November’s midterms faces another legal hurdle just one day after its passage. Tazewell County Circuit Court Judge Jack Hurley on Wednesday ordered that the results of Tuesday’s vote not be certified on several grounds, including that state lawmakers did not follow their own rules in passing the redistricting referendum. State Attorney General Jay Jones said his office intends to immediately appeal Hurley’s Wednesday ruling. The fate of Virginia’s referendum was already before the state Supreme Court, which stayed a previous ruling by Hurley in the run-up to the referendum and allowed Tuesday’s vote to proceed before deciding the merits of that case.
3 business owners file lawsuit to end Oceanfront curfew
Five Oceanfront businesses joined together on Monday to file a temporary restraining order in Virginia Beach Circuit Court to block the enforcement of the Virginia Beach City Council’s curfew. The com...
Scientists discover natural hormone that reverses obesity
A hormone called FGF21 can reverse obesity in mice by activating a newly identified brain circuit tied to metabolism. Surprisingly, it works in the hindbrain—the same region targeted by GLP-1 drugs like Ozempic and Wegovy—but through a completely different mechanism. Instead of suppressing appetite, FGF21 ramps up the body’s energy burning. This insight could pave the way for more targeted weight-loss and liver disease treatments.
In the Katzmann Lecture, Senator Andy Kim takes aim at political corruption
Last year’s edition of Transparency International’s Corruption Perceptions Index, which gauges countries’ perceived resistance to corruption, gave the United States its lowest score since the index’s current scale debuted in 2012. That result likely would not surprise US Senator Andy Kim of New Jersey, who focused on corruption in politics when he delivered the fifth annual Robert A. Katzmann Lecture on April 6. The event honors the career and impact of the late Judge Katzmann of the US Court of Appeals for the Second Circuit, a professor of practice at NYU Law.
LIV Golf's future may hang in balance as execs meet, per report
As its five-year battle with the PGA Tour drags on, the Saudi-backed golf circuit has reportedly called executives in New York for "emergency summit."
DOJ moves to erase seditious conspiracy convictions of Oath Keepers, Proud Boys in Jan. 6 cases
In court filings, prosecutors asked the U.S. Court of Appeals for the District of Columbia Circuit to vacate the convictions so that the government can permanently dismiss the indictments.
Cinergy Entertainment Group Partners with Unique X for Full-Circuit Technology Upgrade
Unique X has confirmed a new collaboration with Cinergy Entertainment Group to deploy its cinema software solutions across Cinergy’s entire estate. Through this agreement, Cinergy will roll out RosettaBridge TMS to every site, complemented by the implementation of RosettaNet CMS and BaseKey KDM. Together, these solutions will form a cohesive, circuit-wide platform designed to unify […]
Personnel note: Eric Ludin tapped as Of Counsel for Shumaker's St. Pete office
Ludin is a Florida Supreme Court Certified Circuit Mediator, making him a commodity among other lawyers to resolve client disputes.
The NASA Artemis 2.0 Smartwatch Runs Python And Lets Kids Code Their Own Wearable
NASA's Artemis II lifted off from Kennedy Space Center on April 1, 2026, carrying four astronauts on humanity's first crewed lunar mission in over 50 years. Reid Wiseman, Victor Glover, Christina Koch, and Canada's Jeremy Hansen are currently aboard the Orion spacecraft, preparing for a lunar flyby that will take them farther from Earth than
A gene mutation may trap the brain in the wrong reality in schizophrenia patients
A newly identified gene mutation may help explain why schizophrenia patients struggle to update their understanding of reality. The mutation disrupts a brain circuit involved in flexible decision-making, causing mice to stick with outdated choices even when conditions change. Researchers pinpointed the issue to a key thalamus–prefrontal cortex pathway. By reactivating this circuit, they were able to restore normal behavior—raising hope for future therapies.
Pension Case Offers Entertainment Work Exception Insights
A recent Ninth Circuit decision clarified that any amount of entertainment work can satisfy the entertainment industry exception under the Multiemployer Pension Plan Amendments Act, reinforcing that statutory language, rather than evolving business models, dictates withdrawal liability outcomes, say attorneys at Seyfarth.
Apple's 50-year journey from garage to tech titan
In early 1976 in California, Steve Wozniak had just completed the design of a computer circuit board he intended to share with fellow hobbyists at a prominent local club. His friend Steve Jobs also saw a business opportunity to manufacture and sell the boards, and thus Apple was born.
Ken Burke earns national ‘Government Champions 250’ honor ahead of America's 250th anniversary
Burke has the Pinellas County Clerk of the Circuit Court and Comptroller for more than 20 years.
9th Circuit denies Apple’s rehearing requests in Epic Games case
Apple suffered a significant setback in its case against Epic Games today, as the Ninth Circuit denied both of its rehearing petitions. Here are the details.
Scientists Reinvent a Classic Material To Help Power the Future of Quantum Tech
Researchers have revisited a long-known material and uncovered a way to dramatically enhance its performance by altering its structure at the nanoscale.
Microsoft-backed startup raises $40 million for advanced chipmaking equipment tech
Lace, a Norway-headquartered chipmaking equipment startup which is backed by Microsoft, has raised $40 million in funding to further develop a technology that could enable significant advances in semiconductor design and manufacturing, the company said on Monday. To make cutting-edge chips, manufacturers such as Taiwan Semiconductor Manufacturing Co and Intel employ a process called lithography that uses light to draw complex circuits that form the foundation of advanced artificial intelligence chips. Manufacturers use light-based lithography systems made by the Dutch company ASML - which dominates the market - as they race to shrink chip components and squeeze in more features to boost the computing horsepower on a limited area of silicon.
Analysis of Shaut v. Commissioner: Substantiation, Trade or Business Determinations, and Theft Loss Deductions in the Sixth Circuit — Current Federal Tax Developments
For tax professionals advising clients on the deductibility of losses stemming from defunct investments and complex litigation, the Sixth Circuit’s recent unpublished opinion in Michael H. Shaut v. Commissioner , No. 25-1568, CA6 (March 12, 20 26) serves as a critical reminder of the strict evid
Learning ignites at SHS science circuit
Inside Sandpoint High School’s gym, elementary school students inflated cow lungs, flinched at bowling balls and made bubble tea boba as a part of the annual Science Circuit.
Health IT leaders must adapt to the circuitous route of prescriptions
Hospital and health system CIOs should map current prescription workflows in detail and prioritize interoperability with clear governance frameworks, advises Joseph Kleiman, president of Rx tech company Buzz Health.
Desert Double at Phoenix: Lead Keeps Changing Down the Stretch; Palou Wrecks
The INDYCAR circuit hits Phoenix Raceway with the Good Ranchers 250 on Saturday. Here are live updates from the desert showdown!
Business of Football: Premier League’s ‘worrying concentration of talent’, EFL’s prized assets
A look back at the can't-miss croissant on the sports conference circuit, and why Bradford City and Wigan Athletic might be attractive buys
Fifth grade science in Pre-K; Coppell ISD prepares its students for the future
Fifth graders build hands-on science lessons and share them with Pre-K students, from circuits and light to sound and thermal energy.
The Brains of Ultra-Powerful People Experience an Altered State of Reality, Research Suggests
“The neuroscience is pretty uncomfortable. People in positions of power show reduced activity in mirror neuron systems, the circuitry responsible for empathy and perspective-taking.” –Shonna Waters, PhD
John Kimmel Steps Away from Training to Focus on Bloodstock Business
John Kimmel has announced his retirement from training on the New York circuit to focus on building his bloodstock buisness.
Scientists Don't Just Want to Neutralize Radioactive Waste—They Want It to Power Our Future
Virginia-based Jefferson Lab is leading a project to transform nuclear waste into usable electricity while also drastically reducing its radioactive life.
Trump officials decline Sunday show invitations amid Iran strikes
No senior Trump administration officials or cabinet members appeared on the Sunday show television circuit a day after the US and Israel began a major military operation in Iran, killing Iran’s Supreme Leader Ayatollah Ali Khamenei.
Ducks spend morning teaching science to nearly 7,000 students
On Thursday, students watched Ducks players practice on the ice, who then led demonstrations of the properties of electricity and circuitry.
The Science of It: Lighting Up Circuits For Spark STEMFest in February
The Science of It: Lighting Up Circuits For Spark STEMFest in February
Titans met with small school wideout at HBCU Legacy Bowl
The Tennessee Titans are turning over every stone in search of quality depth, and have met with one of the top HBCU prospects on the All-Star circuit.
Business Restructuring Review
In This Issue: The Year in Bankruptcy: 2025 A brief chronicle of the year's notable developments in corporate bankruptcy and restructuring, including business bankruptcy filings, significant court rulings, and legislative developments. [read more …] U.S. Bankruptcy Court Denies Chapter 15 Recognition of Maltese Liquidation Absent Evidence of Meaningful Activities Supporting Finding of COMI or Establishment in Malta In In re Geden Holdings, Ltd., No. 25-90138, 2025 WL 2484883 (Bankr. S.D. Tex. Aug. 28, 2025), stay pending appeal denied, No. 25-90138, 2026 WL 97993 (Bankr. S.D. Tex. Jan. 13, 2026), the U.S. Bankruptcy Court for the Southern District of Texas ruled that, for purposes of recognition under chapter 15 of the Bankruptcy Code, although a foreign debtor may have had its center of main interests ("COMI") or an establishment in Malta when a liquidation proceeding was commenced for it in a Maltese court in 2017, the absence of any meaningful activity by the debtor's liquidator from that time until the liquidator filed a chapter 15 petition in the United States more than five years later meant that the debtor had neither a COMI nor an establishment in Malta on the chapter 15 petition date. The court accordingly denied the petition for recognition. [read more …] The Ninth Circuit's Expansive Reading of "Financial Accommodations" that Cannot Be Assumed or Assigned in Bankruptcy It is generally well understood that agreements to extend credit or provide financing to a debtor cannot be assumed or assigned in bankruptcy. Even so, the provision of the Bankruptcy Code that precludes assumption or assignment—section 365(c)(2)—also extends to "financial accommodations," a term that is not defined in the Bankruptcy Code and has been the subject of relatively few bankruptcy and appellate court rulings. The U.S. Court of Appeals for the Ninth Circuit examined the meaning of the term in In re Svenhard's Swedish Bakery, 154 F.4th 1100 (9th Cir. 2025). The court of appeals ruled that a deeply discounted settlement of pension plan withdrawal liability is a "financial accommodation" that cannot be assumed or assigned, thereby extending the reach of section 365(c)(2) well beyond conventional lending arrangements. [read more …] Pennsylvania District Court Applies "Hypothetical Test" in Determining that Patent License Agreement Is Assignable in Bankruptcy In Crivella Holdings Ltd. v. Mesearch Media Technologies Ltd., No. 2:25-cv-333, 2025 WL 2443400 (W.D. Pa. Aug. 25, 2025), the U.S. District Court for the Western District of Pennsylvania affirmed a bankruptcy court ruling denying a software licensor's motion for relief from the automatic stay to terminate the license agreement. The court found the license was assumable in bankruptcy under the Third Circuit's hypothetical test as a result of language in the agreement stating that it could be assigned to a "successor in interest" of the debtor without the licensor's further consent, thereby overriding federal patent law's general prohibition against the assignment of patents. [read more …] New York Bankruptcy Court Denies Motion to Terminate Chapter 15 Recognition and Dismiss Chapter 15 Case In In re Oi S.A., No. 23-10193 (LGB), 2025 WL 2806591 (Bankr. S.D.N.Y. Oct. 1, 2025), the U.S. Bankruptcy Court for the Southern District of New York considered whether chapter 15 recognition of a debtor's Brazilian restructuring proceeding should be terminated and the case dismissed due to the debtors' financial deterioration and inability to satisfy its restructuring plan obligations after entry of the recognition order. The court denied the motion, concluding that recognition of the Brazilian proceeding and a court-approved restructuring plan for the debtors should not be terminated under section 1519(d) of the Bankruptcy Code—according to the court, the sole authority for revocation of chapter 15 recognition—because, among other things, the restructuring proceeding was still pending, the debtors might still need relief authorized under chapter 15, and the debtors' prospects for reorganizing under a hypothetical chapter 11 case were uncertain at best. It also found that no provision of the Bankruptcy Code authorizes the dismissal of a chapter 15 case. [read more …] Newsworthy Effective January 1, 2026, Jones Day welcomed Isel M. Perez (Miami), Andrew M. Butler (New York), Sid Pepels (Amsterdam), and Anna C. Bretting (Munich) to the partnership in the Business Restructuring & Reorganization Practice. Sid Pepels (Amsterdam) has been nominated for the Future Leader Award by the Global Restructuring Review, an organization that acknowledges and honors excellence within the global restructuring and insolvency sector. This award is designed to recognize exceptional contributions made by both individuals and firms in the field. The 2026 edition of Chambers UK recognized Ben Larkin (London) in the practice area Restructuring/Insolvency and Adam R. Brown (London) in the practice area Restructuring/Insolvency: Litigation. The 2026 edition of Chambers Asia-Pacific ranked Roger Dobson (Sydney) in the practice area Restructuring/Insolvency. An article written by Corinne Ball (New York) titled "Backstop Fees for Lenders in Chapter 11 Plans: Absent Market Test, Equality of Treatment Now Required in Fifth Circuit After 'ConvergeOne'" was published on November 12, 2025, in the New York Law Journal. An article written by Oliver S. Zeltner (Houston) titled "Delaware Bankruptcy Court: No Legal Authority for Chapter 11 Plan Gatekeeping Provision" was published on November 20, 2025, by Lexis Practical Guidance. An article written by Daniel J. Merrett (Atlanta) titled "First Impressions: Eleventh Circuit Rules that Annulment of Automatic Stay Does Not Violate U.S. Supreme Court's Prohibition of Nunc Pro Tunc Orders" was published on November 21, 2025, by Lexis Practical Guidance. An article written by Genna Ghaul (New York) titled "Iowa District Court: Avoidance Claims Cannot Be Encumbered by Pre-Bankruptcy Liens" was published on November 20, 2025, by Lexis Practical Guidance. An article written by Dan T. Moss (Washington/New York), Corinne Ball (New York), David S. Torborg (Washington), and Ben Rosenblum (New York) titled "New York Bankruptcy Court Rejects Challenge to Barnet Rule Permitting Foreign Debtors to Obtain Chapter 15 Recognition With Only Minimal U.S. Assets" was published on November 21, 2025, by Lexis Practical Guidance. The M&A Advisor has recognized the Silvergate Capital Corporation Bankruptcy case as the Chapter 11 Reorganization of the Year (over $5 billion) during its 20th Annual Turnaround Awards. Jones Day is listed among the professionals for the representation of Exploration Capital, which was led by Joshua M. Mester (Los Angeles). Lawyer Spotlight: Sid Pepels Sid Pepels, a partner in Jones Day's Amsterdam Office, litigates and advises clients on commercial and international insolvency matters, with a focus on complex restructurings and insolvencies. He has advised and litigated high-profile cases, including: the cross-border WHOA (Wet Homologatie Onderhands Akkoord) proceedings concerning Vroon Group and Diebold Nixdorf; proceedings on behalf of expropriated SNS Reaal bond holders against the Dutch State; the bankruptcy of Intertoys, the leading Dutch toys retailer; the restructuring of Oi, the Dutch finance vehicle of the Brazilian telecom giant; and Blokker, the leading Dutch home appliances retailer. Sid holds a Ph.D. in European insolvency law and regularly publishes in academic journals on topics of cross-border insolvency. He has been recognized in The Legal 500 Netherlands and was noted by his peers for being client-minded and a creative thinker with a "strong grasp of the law and strong interpersonal skills." Sid was also nominated for the "Future Leader" award at the Global Restructuring Review Awards 2025. He is a board member for the Netherlands Association for Comparative and International Insolvency Law and a NextGen member of the International Insolvency Institute.
NFL Picks Tiger Woods’ TMRW Sports to Lead Flag Football Ops
The NFL has tapped TMRW Sports to be the operating partner in a league-supported pro flag football circuit, the latest in the NFL's flag push.
Scientists Discover a Brain Circuit That Enhances Physical Endurance In Mice
It's needed to build strength.
Ninth Circuit Upholds Administrator’s Denial of Residential Mental Health Benefits Under ERISA
In an unpublished memorandum decision, the Ninth Circuit in R.R. v. California Physicians' Service d/b/a Blue Shield of California, affirmed the insurer
Ruckersville Elementary to host annual Science Night with over 100 student presentations
Students will demonstrate projects covering topics from the solar system to electric circuits to ocean life and living systems.
Scientists found a way to cool quantum computers using noise
Quantum computers need extreme cold to work, but the very systems that keep them cold also create noise that can destroy fragile quantum information. Scientists in Sweden have now flipped that problem on its head by building a tiny quantum refrigerator that actually uses noise to drive cooling instead of fighting it. By carefully steering heat at unimaginably small scales, the device can act as a refrigerator, heat engine, or energy amplifier inside quantum circuits.
Harley's late goal lifts Stars past Blues, 4-3
Thomas Harley’s goal with just over a minute left short-circuited a late rally by the St. Louis Blues and lifted the Dallas Stars to a 4-3 win on Tuesday night. Matt Duchene scored a pair of goals for his first multigoal game since Feb. 8. Roope Hintz also scored and Jake Oettinger made 23 saves, as the Stars won for the third time in their last four games and improved to 10-2-1 against St. Louis going back to Nov. 28, 2022.
Koepka 'rang Woods first' over PGA Tour return
Five-time major winner Brooks Koepka says Tiger Woods was the first person he called to discuss a return to the PGA Tour after leaving the LIV Golf circuit.
ASM International Logs Strong Orders as China Business, Advanced Tech Pick Up
Orders climbed to roughly €800 million in the fourth quarter on strong demand from producers of integrated circuits that power smartphones and other devices.
Ninth Circuit axes work threshold for entertainment industry pension withdrawal exemptions
Las Vegas case changes how you assess withdrawal exposure for multiemployer pension plans
Federal appeals court upholds California's Prop 50 redistricting maps
A panel of three judges in the Ninth Circuit Court of Appeals voted 2-1 to dismiss claims by Republicans that the maps favored Latino voters.
Comscore and Santikos Entertainment Announce Five-Year Circuit Wide Commitment to Cinema ACE and Enterprise Web Solutions
Comscore (Nasdaq: SCOR), a trusted partner for planning, transacting and evaluating media across platforms, today announced a five-year agreement with Santikos Entertainment to deploy Comscore’s next-generation theatre and circuit management solutions - Cinema ACE and Enterprise Web™- across all Santikos locations.
Trump administration retreats in Newsom lawsuit over National Guard deployment
In a brief filing with the U.S. Court of Appeals for the 9th Circuit on Tuesday, Justice Department lawyers said they no longer oppose lifting a partial administrative stay and formally withdrew their request to keep California National Guard under federal control while the appeal proceeds.
Physicists made atoms behave like a quantum circuit
Using ultracold atoms and laser light, researchers recreated the behavior of a Josephson junction—an essential component of quantum computers and voltage standards. The appearance of Shapiro steps in this atomic system reveals a deep universality in quantum physics and makes elusive microscopic effects visible for the first time.
"Grand Pro Circuit" is a new retro open-wheel sim aiming for 1980s realism
A low-poly look, manual gearboxes and no assists meet tyre temps, changeable weather and mechanical failures in this Steam-bound open-wheel throwback
Brain circuits, bioturbation, and a new physics doc
Yale researchers study a mass extinction from the distant past, uncover hidden brain networks, and share expertise at an international meeting on enhanced weathering.
Court blocks Trump administration effort to halt school mental health worker grants
A federal appeals court on Thursday halted an effort by the Trump administration to block grants to hire more school mental health workers. The 9th U.S. Circuit Court of Appeals denied the adminis…
Alina Habba, Trump's former lawyer, disqualified as New Jersey prosecutor
The ruling from a panel of judges from the 3rd U.S. Circuit Court of Appeals comes amid the push by President Donald Trump's Republican administration to keep Habba as the acting U.S. attorney for New Jersey, a powerful post charged with enforcing federal criminal and civil law.
Cities put science in the spotlight
When three European cities launch an initiative next year to boost scientific excellence and collaboration, much of the action is likely to take place in public spaces rather than in the laboratory.That is welcome news for Ana Marušić. A medical doctor and professor at the University of Split Medical School in Croatia, Marušić champions close connections between “town and gown” to encourage citizen involvement in research, raise public health awareness and ignite young people’s interest in science. “Responsible research and innovation cannot be done in an ivory tower, answering only the questions that are relevant for scientists,” explains Marušić, who chairs the Department of Research in Biomedicine and Health and leads the Centre for Evidence-based Medicine. “The role of the university is to be a medium for transferring new discoveries in science to society, but also to listen to society about what is important and what is needed.”Three cities united by scienceMarušić’s efforts stand to gain traction through Science Comes to Town (SCTT), a new European project to highlight science’s role in society and strengthen cross-border collaboration in research, innovation and sustainability. With funding from the European Commission, three cities—Split, Brest (in France) and Kiel (in Germany)—plan more than 1,000 public events, workshops and competitions for citizens of all ages, researchers, businesses and policymakers. The year-long project kicks off in Spilt on 20 January with a conference involving partner institutions, community representatives and European policymakers. The three cities may be geographically far apart, but they share much in common. All are located on coasts and are home to top regional research institutions that are part of SCTT. Among the project's partners, the University of Western Brittany in Brest, Kiel University and the University of Split belong to the SEA-EU university alliance, uniting nine European coastal academic institutions to advance research, student exchanges and sustainable development. “These universities have a very strong connection between gown and town,” explains Marušić, who is one of Split’s SCTT ambassadors. “It's very important that these universities are there for the community so that we can learn from each other and grow together.”Tackling Europe’s STEM shortagesSCTT will also reinforce efforts to address Europe’s widening gap in science, technology, engineering and mathematics (STEM) education. Studies show that nearly eight out of ten small- and medium-sized businesses cannot find enough workers with the skills required in advanced computing and artificial intelligence (AI)—hindering initiatives to boost European innovation and competitiveness. In healthcare, the European Commission has estimated a shortfall in medical professionals of 1.2 million, due to fewer young people joining the field and an ageing population that needs more care.Strengthening knowledge and dialogue can also help build trust between scientists and the public at time when disruptive technologies are reshaping research and clinical practice, but are also sparking questions about ethics and accuracy. With experience in the classroom and in clinical epidemiology—a discipline involving monitoring and controlling public health problems—Marušić sees the potential risks of over-reliance on AI and chatbot answers for both research and learning. “AI is a very good tool, but one has to be very critical about it,” she adds. “Delegating brain activities will definitely diminish your neural capacities because you are not developing the circuitry that is important for higher-level cognitive engagement.” She stresses the importance of critical thinking and encourages students to use AI as a researcher’s tool to reinforce rather than supplant human discretion and brainpower.The power of outreachSplit’s experience in bringing scientists and the public together has provided a platform for discussing research ethics and explaining science in simple terms. Local efforts to expand health literacy and awareness have helped reduce cardiovascular disease among women, according to Marušić’s research. The city’s university also hosts events to introduce schoolchildren to science, using hands-on experiments to spark curiosity.Marušić’s own love of science began with an interest in studying molecular biology. “But my parents told me, why don't you study medicine?” she recalls. “I said, OK, why not? And that was the best decision that I made.” Marušić is not a practicing physician, but teaches anatomy and public health. She also co-edits ST-OPEN, an overlay university journal that works on capacity building for research publishing among students and their supervisors. Balancing teaching, research and editorial work, she is a strong advocate for medical studies, urging high school students to consider medicine “because later on it gives you a really wide perspective about human life and about society” as well as many career opportunities.As SCTT prepares to bring science into daily life in 2026, Marušić hopes that it will build permanent bridges between scientists and citizens across Europe. “We can be a showcase for making collaboration with the community stronger to share knowledge, attract young talent and integrate critical and scientific thinking into everyday life,” she explains, adding that "collaborating with businesses to improve cities and communities is also an important aspect of this project."Science|Business, which connects policymakers, academics and industry through its news reporting, analysis and events, is an SCTT partner.
Scientists discover a hidden brain circuit that rewrites vision
MIT scientists found that what we see is strongly influenced by how alert or active we are. Parts of the brain responsible for planning and control send specialized signals that either boost or quiet visual details. These areas seem to balance each other, sharpening important information while dimming distractions. The study shows vision is constantly being shaped by our internal state.