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Health officials address spoiled food issues at closed Happy Days
The state Health Department says spoiled food has been removed from the kitchen area of the shuttered Happy Days Chinese Seafood Restaurant in Kaimuki following a partial roof collapse.
Scientists develop 'floating scarecrow' to protect threatened seabirds
New research has shown that a "floating scarecrow" developed by U.K.-based scientists and a repurposed bird-scaring kite can help save threatened seabirds from getting caught in fishing nets.
More Than a Game: How Baseball Became a Classroom
Since 2012, Resolution Copper and the Arizona Diamondbacks have worked together to create opportunities for Arizona youth, educators and communities. What started with Science of Baseball has grown into teacher workshops, hands-on STEM experiences, youth baseball clinics, Tribal youth programming and community recreation.
Debt service and the Pentagon. Private equity and the politics of the US housing market. The return of black lung disease & the Franco-Prussian War in color.
Thank you for opening your Chartbook email. RALPH BALSON. 1890—1964. Oil and enamel, signed. Source: Gavekal This going to hurt - the two 7s in the US: diesel and mortgage rates Source: Gavekal In the US housing market, costs are soaring and the role of corporate, private equity-backed buyers is high on the mid-term election agenda. HEY READERS, THANK YOU for opening the Chartbook email. I hope it brightens your day. I enjoy putting out the newsletter, but tbh, what keeps this flow going is the generosity of those readers who clicked the subscription button. If you are persuaded to click, please consider the annual subscription of $60. It is both better value for you and a much better deal for me, as it involves only one credit card charge. Why feed the payments companies if we don’t have to. Subscribe It is striking how, since 2020, big banks have dropped out of the political spotlight in the US. For contributing subscribers only. Subscribe Rates of the lung disease pneumoconiosis among working US coal miners have risen to levels not seen in nearly 40 years Source: Bloomberg Chinese Clean Technology Exports For contributing subscribers only. Subscribe Ralph Balson (1939) Portrait of Grace Crowley Cole, G. O. & Haseman, S. M., (2023) “‘The Substance of Paint’: Class and Materiality in the Work of Ralph Balson”, Open Library of Humanities 9(2). Ralph Balson (1890–1964) was an English plumber and house painter who emigrated to Australia in 1913 and subsequently became a key member of Sydney’s artistic avant-garde. He is credited with having the first solo exhibition of purely abstract painting in Australia in 1941. Despite his role in developing Australian non-objective painting, Balson remained principally a house painter, working on his art practice at weekends. In 1955 he retired on a state pension and became a full-time artist. Balson’s artistic education and methods were critically shaped by his working-class background. He did not travel abroad until 1960 and was an avid auto-didact. His materials, palette, techniques and compositional strategies were likewise informed by his trade. Balson’s profession as a painter-decorator made him conspicuous within the predominantly middle-class Sydney art scene, though his painting partner Grace Crowley considered it an advantage in their pursuit of constructive painting. This paper explores the impact of Balson’s trade on his trajectory towards pure abstraction. While his art was at odds with the predominantly figurative mode of class-conscious art in Australian Modernism, we argue that it is embedded in the experience of class through its creative adaptation of labour into aesthetics. Source: OLH Svetlana Alexievich, The Art of Oral History No. 1 Paris Review Issue 257, Fall 2026 Interviewed by Elena Kostyuchenko INTERVIEWER How were you able to go to Chernobyl? Did you need special papers? ALEXIEVICH It was a time of chaos. They let me right into the zone. … More than anything, there was confusion. Adamovich [Ales Adamovich, the Soviet Belarusian writer], I remember, persuaded Gorbachev to send in the scientists, who showed up without even bringing their shaving kits. They were told that there had been an explosion at a nuclear power plant, but for some reason they thought that they’d be there for only a day or two. The first time I went was several months later, and people kept telling me about things they didn’t understand—how the fishermen couldn’t find worms, because they’d burrowed deep into the earth, how the milk wouldn’t curdle at the cheese factories. The honeybees wouldn’t come out of their hives. The evacuations started, I think, in the first month. The old women hid, they wouldn’t leave. I mentioned radiation to one of them and she said, “I’ve seen that radiation, all right! It’s yellow with green in it. I saw puddles of it in my garden, and I told the other women, and we ran and looked, and she had it in her garden, and the other one, too!” God, it was wild, the way the mind made sense of it. There was a story going around about Gorbachev telling the scientists to show him the radiation. “We can’t, it’s invisible.” “But I want to see it!” I also ran into the soldiers who’d been flown in on helicopters from Afghanistan. I asked them, “What are you doing here with your machine guns?” They said, “We’re collecting the radiation, that’s what.” So you had some of them running around with their guns, others out in the village washing off firewood or burying soil in the soil. These were the kinds of things that exploded our worldview. They made you realize that culture was just a chest filled with old manuscripts. There were no books in there that could help me. Our philosophers turned out to be useless when faced with the unprecedented. Derrida, Baudrillard—philosophy fell silent. What was happening? How would we live with it? That’s when I decided it simply needed to be witnessed. Which is what I did. INTERVIEWER I wanted to ask about how you talk to people. … ALEXIEVICH Yes, we sit and we talk—about what interests me and about life in general. About love, about everything in the world. That way, what comes out is three-dimensional. If you cut straight to the part you need, which is what journalists do, it won’t be interesting, and it won’t be the truth, either. Not the whole truth. INTERVIEWER Do people always open up when you ask questions, or can questions get in the way? ALEXIEVICH You have to ask questions, of course. Your job is to scour away the banality and return people to their true selves, to make them face what they rarely tap into. With every new person, you have to find a new way to do it. When you ask an interesting question or you share what happened to you, you help people really think about what they’re saying and not just repeat whatever they’ve picked up from the newspaper. But not everybody is capable of it, not everyone wants to put themselves through that. Either the chemistry starts to kick in or it doesn’t. A person might be wonderful, but you can tell that the conversation just isn’t going to happen. You can try to push it, but it will be a product of your own intellect, rather than of that mysterious connection. Life doesn’t come from the mind. Some people I can call two years after our last conversation, and they’ll say, “Oh, Svetochka! I think of you all the time,” and we’ll start talking again. With others, that won’t happen. That doesn’t mean they’re not extraordinary people, just that you can’t connect with them. They might have some insight, but you don’t have the right antenna to pick up their signal. Source: The Paris Review Colorized Franco-Prussian war … the ruins of Strasbourg with a French photographer and his mobile dark room. Ralph Balson (1961) Matter Painting If you’ve scrolled this far, you know you want to click: Subscribe
Agreement in principle reached for FC Nantes’ sale
As per a report from AFP, an agreement in principle has been reached for the sale of Ligue 2 side FC Nantes. Waldemar Kita had revealed that he had received three bids for the Loire-based club earlier...
🚨 Bordeaux sold to investment fund Park Bench (L'Équipe)
A brighter future for the Girondins?It’s a big day for French football: in addition to the sale agreement signed by Waldemar Kita for FC Nantes, Girondins de Bordeaux have finally found a buyer, acc...
Health officials address spoiled food issues at closed Happy Days
The state Health Department says spoiled food has been removed from the kitchen area of the shuttered Happy Days Chinese Seafood Restaurant in Kaimuki following a partial roof collapse.
HP Work Relationship Index 2026: Workplace Health Rebounds as Workers Turn to Agentic AI, Skills-Building, and Better Tech Tools
Today, HP Inc. (NYSE: HPQ) released the fourth annual HP Work Relationship Index, a global study of more than 19,000 desk-based workers across 15 countries. This year’s study finds that workers with the healthiest relationship with work are becoming more confident in how they navigate uncertainty.
‘Dazzling’ globetrotting adventure in history of alchemy wins 2026 Royal Society Trivedi Science Book Prize
The Age of Alchemy: How Early Innovators Shaped Modern Chemistry by self-proclaimed science adventurer Kit Chapman has been announced as the winner of the 2026 Royal Society Trivedi Science Book Prize.
Leonardo’s owner expands into the restaurant business with Pa'l Corazón
Hugo Leonardo came to the United States from Mexico in 2001 as a teenager, working his way through various kitchen positions in Park City until he opened his own market and taquería — Leonardo’s — four years ago to provide specialized goods to Park City’s Hispanic community. But Leonardo says his latest business venture, a Mexican restaurant in the heart of Kamas, is a lifelong dream that has finally come to fruition.
Scientists Unveil Underwater Solar Panels
Researchers working off China's southwestern coast successfully generated solar energy from a depth of nearly 33 feet.
Lesbian Bar Project Co-Founder: Purity Politics Could Destroy Our Remaining Spaces
Subscribe As a professional lesbian and Massachusetts native, I’ve recently been asked by a lot of folks what I think about the saga unfolding at Last Ditch. The now-viral story, first reported by The Boston Globe, centers on a Western Massachusetts lesbian bar that lifted its mask requirement for one night a week to help drum up business. The decision ignited an intra-queer controversy that has been feasted on by media outlets across the political spectrum—from the New York Post to LGBTQ Nation—and is even reportedly being eyed for a Hollywood adaptation. Apparently nothing is more entertaining than a bunch of lesbians and queers fighting with each other over KN-95s. What has been lost in all of the chatter and media coverage is the very real possibility that Last Ditch, which just opened in April 2025, will have to close its doors. The venue’s one remaining founder, Jackie Matellian, revealed in a community Zoom meeting that she’s working four jobs, is now solely responsible for the bar’s $50,000 business loan and is struggling to keep up with the bills. So as we laugh about the controversy’s similarity to a “Portlandia” skit and how one of the bar’s founders left to enroll in clown school, we forget that yet another lesbian bar is facing an existential crisis—and this time the call is coming from inside the house. In 2020, my friend Elina Street and I created The Lesbian Bar Project, an Emmy-, Webby- and GLAAD Media Award-winning docuseries and initiative that tells the stories of lesbian queer bars around the world. We were moved to act because at the time there were only an estimated 16 lesbian bars in the United States, and the pandemic threatened to bring that number down even further. There are now more sapphic bars than there were just before the pandemic—about 36 of them in total—but this is down from approximately 200 in 1980. Maybe that doesn’t mean much to you, but for the millions of sapphics living in the U.S., this number is calamitous. As the world laughs at lesbians and sapphics, I want to take a second and tell you what I feel when I walk into one of these bars, which are all unique and irreplaceable in their own way: I feel seen. Sometimes I think Cubbyhole in New York City’s West Village neighborhood knew I was gay before I did. When I walked in there for the first time, before I was even out, I was transfixed by the colorful array of tchotchkes hanging from the ceiling and how the women standing next to me were completely unafraid to express their desire for one another. I knew the minute I was ready to come out, I had a home. I also felt the joy of a new couple falling in love at Seattle’s Wildrose, the quiet confidence of a short king lining up her shot at the pool table at Ginger’s in Brooklyn and the kick of cayenne pepper in Julie Mabry’s crawfish at Houston’s Pearl Bar. Subscribe Lesbian bars don’t just serve lesbians; they serve queer folks across the spectrum, including bisexual, pansexual and trans people. As Elina and I traveled across the U.S. and Europe and to parts of Latin America to document the bar owners, staff and patrons that make up the ecosystems of these spaces, we also became uniquely acquainted with the factors that threaten their existence: gentrification, wage gaps, sexism, environmental disasters, gun violence, rising insurance premiums and political administrations working to annihilate queer people and their families. Lesbian bar owners, like all leaders and entrepreneurs, are imperfect. There have been significant issues over the years at lesbian bars: employee harassment, racism, lack of accessibility, sexual assault and transphobia. All bar owners should be held accountable and should listen to their communities to evolve into safer and more equitable spaces. I also acknowledge my privilege: I am able-bodied, white, cis and from a family system that loves me for who I am. Not everyone has that. Queer people, especially trans and bisexual people, are suffering from disproportionately high levels of depression, and our mental health system isn’t equipped to support them. Immunocompromised people and long COVID are real, and many of my friends are suffering to this day. The people with the least safety net are often the ones for whom a bar closing costs the most. And yet, as we’re seeing with Last Ditch, the queer community often lashes out at each other. It’s also the mainstream media taking the internal conflict and making a mockery out of it, distracting from the real possibility that this bar could close due to financial pressures. A bar that many people loved and needed is facing extinction. Perhaps it’s safer to dissent with one another than with the larger forces trying to eradicate us, but in doing so, we risk destroying the few spaces we have left. Due to the constraints of purity politics—some in good faith, some not so much—lesbian bar owners, almost all of whom are queer women themselves, are forced to be everything for everyone, similarly to how women are forced to be everything for everyone. By asking these bars to uphold impossible standards—standards very few other third spaces are asked to consider—we all end up losing. I want to move as a community toward dialogue, compassionate dissent and collaboration to make our spaces better with the goal of keeping them OPEN and thriving, rather than destroying them from the inside with expectations that are arguably unattainable. Subscribe While I have your attention—for this fleeting second of the news cycle—may I urge us to spearhead a way to keep these small businesses afloat without attacking our own community along the way? Bar owners are left with an impasse: They want to be community-centered, but they also have to make money to keep their doors open. Sometimes they might make business decisions that don’t work for everyone—and that’s partly because different patrons have different priorities and want different things—but these owners deserve the opportunity for productive dialogue**.** We have to work with them and with each other to keep our spaces open, to keep them growing. Lesbian bars raised me into the queer woman I am today. One thing I think about as I reflect on the six years of work we’ve done to document these spaces is that shared, unspoken language I have with a stranger the moment we both walk into one of these bars: the nod, the ease, the not having to explain ourselves. I don’t want to lose that, and neither should you. If objective, nonpartisan, rigorous, LGBTQ-focused journalism is important to you, please consider making a tax-deductible donation through our 501(c)(3) fiscal sponsor, Resource Impact, by clicking this button: Donate
Lions sign Miles Kitselman in NFL Week 4
Detroit signs former Tennessee tight end Miles Kitselman in NFL Week 4.
Leaked: Roma’s possible third Centenary kit
Roma’s centenary is also starting to take shape through the jerseys. FootyHeadlines has published the first previews of the third kit the club is expected to wear in the 2027-2028 season, the centen...
Senate approves sweeping college sports bill on athlete pay, transfers and NCAA rules
WASHINGTON – The Senate approved a bipartisan college sports overhaul that would codify athlete revenue sharing, regulate NIL and transfers, and give the NCAA limited antitrust protection. Critics say it undercuts athletes’ leverage.
Nancy Pelosi rallies Democrats at Crow fundraiser in Colorado’s 6th CD
Nancy Pelosi told a fundraiser for U.S. Rep. Jason Crow the path to preserving the country's democratic form of government runs through the kitchen table
Nancy Pelosi rallies Democrats at Crow fundraiser in Colorado’s 6th CD
Nancy Pelosi told a fundraiser for U.S. Rep. Jason Crow the path to preserving the country's democratic form of government runs through the kitchen table
Lions Announce Pair of Roster Moves Following Win Over Jets
The Detroit Lions released DB Natrone Brooks from the practice squad and brought back TE Miles Kitselman ahead of Week 4.
Food Safety Finds a Place Among ‘Kitchen-Table’ Political Issues
By Stephanie Armour The run-up to the midterm elections is turning into a food fight — literally. The summer was marred by a massive foodborne outbreak that sickened scores of people and the recall of tens of thousands of pounds of imported meat, turning the safety of the U.S. food supply into a ...
Food Safety Finds a Place Among ‘Kitchen-Table’ Political Issues
By Stephanie Armour The run-up to the midterm elections is turning into a food fight — literally. The summer was marred by a massive foodborne outbreak that sickened scores of people and the recall of tens of thousands of pounds of imported meat, turning the safety of the U.S. food supply into a ...
Josh Hokit shares bizarre reaction to UFC title opportunity
Josh Hokit has a strange reaction to his first UFC title opportunity.
Food Safety Finds a Place Among ‘Kitchen-Table’ Political Issues
Recent outbreaks of foodborne illness and high-profile recalls have made this issue a concern of voters.
Food Safety Finds a Place Among ‘Kitchen-Table’ Political Issues
Recent outbreaks of foodborne illness and high-profile recalls have made this issue a concern of voters.
Haverhill Chamber Names Damark Woodcraft Business of the Month
Damark Woodcraft of Haverhill is the Greater Haverhill Chamber of Commerce’s September business of the month. The company, formed more than 35 years ago, makes hand-built custom furniture, kitchens, doors and more. It helps clients design homes, offices, restaurants and other settings. Mark Brady, owner and president, incorporated the business with his father in 1991.
HECO activates PSPS outages in Pukalani following Hurricane Nolo
HECO has activated its PSPS program in Pukalani as crews work to repair Hurricane Nolo damage and restore power across Maui, Oahu, and Hawaii Island.
Siloam Springs business owner raises concern over water leaking into basement of historic structure
SILOAM SPRINGS -- When a leak was noticed in the basement of Park House Kitchen + Bar, staff checked for plumbing leaks, drainage issues, air-conditioning runoff and anything else they could think of that might be causing the issue, according to business owner Alma Sanchez.
Think Beyond Brita — These Advanced Water Filter Pitchers From $15 Help Remove Microplastics From Your Glass
More microplastics and forever chemicals are popping up in our drinking water. As a public health expert, I rounded up seven water filter pitchers to help reduce your microplastic exposure in your drinking water. Picks include pitchers from Culligan, Aquagear, LifeStraw, Aarke, and more.
Why rehabilitation cannot be an afterthought in a health emergency: a new WHO toolkit is put to the test
When disaster strikes, saving lives is the priority. But what happens to the people who sustain injuries such as amputations, spinal cord damage, brain injury, or complex fractures if rehabilitation is not part of the response plan from the start? That question shaped a four-day training workshop held in Nadi, Fiji, from 14 to 17 April 2026, where 23 emergency managers, rehabilitation professionals, and partner representatives from 12 countries piloted a new World Health Organization (WHO) toolkit designed to help ministries of health build rehabilitation into their emergency preparedness planning.
First Month in Review: Leonardo Balerdi Already Exceding Expectations
Balerdi came in as a Plan D after several other moves fell through. You can’t tell from his play in a Roma kit.
SNL skit mocks Dario Amodei's AI doomsday predictions
In a sketch, "Saturday Night Live" portrayed Dario Amodei as a bumbling megalomaniac struggling to explain why his own technology won't end the world.
📸 This week’s kit news 👕
Official releases, leaks and great finds: OneFootball rounds up all the kit news of the week.This week, we begin our overview with Ecuadorian club Deportivo El Nacional, which has pinned around sixty ...
What’s the Best Pet DNA Test? We Tested the Most Popular Ones
I sent my cats’ saliva to the lab to get health and genetic insights sent to my inbox—with very different results.
11 Cool New Apple Accessories Worth Adding To Your Kit
Explore the new Apple accessories worth adding to your kit, from colourful charging cables and MagSafe wallets to iPhone straps and refreshed Apple Watch bands.
Why does healthcare cost so much? Look at administration.
Iowa made progress to help patients in the 2026 legislative session, but more work is needed, writes Dr. Michael Kitchell.
IShowSpeed Set for Huge Stream With Liverpool Star Hugo Ekitike
Hugo Ekitike is reportedly teaming up with IShowSpeed, as the Liverpool striker prepares to swap Premier League pressure for the unpredictable world of Speed.
Intel Panther Lake Teardown, 18A, BSPD, GAAFET, SemiAnalysis STEEL
Panther Lake debuts the first commercial implementation of backside power delivery (BSPDN), introduces Intel’s first iteration of gate-all-around (GAA) transistors, and showcases their advanced packaging capabilities with its Foveros-S assembly. With Panther Lake, Intel’s manufacturing arc has shifted from nebulous roadmaps to shipped silicon, a significant milestone on their long road back to competitive semiconductor manufacturing. To evaluate the extent of Intel’s comeback, we tore down Panther Lake. The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. Our teardown traces 18A from its four-sheet RibbonFETs (Intel’s marketing name for GAAFETs) and gate stacks through contacts, frontside and backside wiring, and the bonded carrier. We explain how these material and integration choices improve gate control and reduce resistance, while adding capacitance, thermal resistance, and process complexity. Our measurements put Panther Lake’s 18A compute logic and TSMC N3E GPU logic at similar logic density. However, 18A does not lead TSMC N3P, N2 or Samsung SF2 in peak density. Panther Lake’s CPU cores are incremental updates, and the high-end GPU still uses TSMC N3E. Panther Lake assembles one compute tile, one GPU tile, and one I/O tile atop a passive base tile using Intel’s Foveros-S advanced packaging. Both compute tile variants use Intel 18A. The Xe3 GPU options are a 4-core GT1 tile on Intel 3 and a larger 12-core GT2 tile on TSMC N3E. Both I/O tile variants use TSMC N6. [1], [2] Our analysis centers on the PTL-U compute tile, both the 4-core and 12-core GPU tiles, as well as the 12-lane I/O tile. In conventional chips, power and signal are routed through the same frontside metal stack towards the device frontend. Power rails consume scarce routing resources near the transistors, while tall via stacks carry VDD and VSS from the coarse upper wires to local rails. Backside power delivery (BSPD) moves the main power network behind the transistor layer, to the backside, separating it from frontside signal routing. We covered BSPD and its impacts in 2024. [3], [4], [5] Intel’s BSPD implementation, branded as “PowerVia”, routes power through dedicated backside metals to nano-TSVs, which connect those rails to local source/drain (S/D) contacts. Implementing that separation requires Intel to build the interconnect stacks from both sides of the wafer. The frontside comprises the M0-M14 signal stack, while the backside comprises the BM0-BM5 power stack. M0 and BM0 are closest to the transistors. The nano-TSVs connect the two sides, but Intel patterns and etches each via from the front after forming the contacts. A narrow via runs from the side of the contact deep into the silicon substrate. Intel then completes the frontside signal metal stack, bonds the wafer to a carrier, flips it and removes the original substrate until the buried via tips are exposed. The backside metal stack is then deposited directly on the revealed vias. The nano-TSV and backside-via profiles taper in opposite directions because Intel forms them from opposite sides of the wafer. The transistor structures form the FEOL. Local contacts and nano-TSVs connect them to the wiring. M0 begins the frontside interconnect stack. The silicon carrier remains attached above the frontside interconnects. It supports the device wafer during substrate removal and backside processing and remains part of the finished chip’s thermal path. PowerVia removes the main power distribution from the congested frontside metals, routing supply through shorter and wider backside wires. Its lateral landing still occupies area in the standard cell, so it recovers less cell area than a direct backside contact. [3] Nano-TSVs beside the logic devices carry VDD or VSS from the backside power network, while signal connections continue upward through the frontside metals. Backside Interconnects Samsung SF2 data is included for comparison to Panther Lake’s within this article. SF2 is the incumbent GAA foundry node but lacks BSPD, serving as a useful reference to evaluate 18A. A full teardown of Samsung’s S26 products, processed on SF2, will be shared soon.Nanosheet-cut EDS comparison. The PowerVia supply path runs from the backside Cu rails through Mo-lined W nano-TSVs to the local transistor contacts. In this cross section, the tapered connection spans roughly 150 nm from the contact level to BM0. The Ta liner confines Cu and promotes adhesion to the surrounding stack; the AlOₓ etch stop controls the next dielectric etch above the rail. Dielectric beneath the ribbons electrically separates the devices from the backside wiring and removes the conducting silicon body below the channel. [6] AlOₓ serves as an etchstop (ES), enabling endpointing and protecting the underlying layers. Low-volatility aluminum fluoride reaction products resist the fluorinated plasma, allowing a thin AlOₓ film to protect the metal while the surrounding low-k dielectric is removed. [6], [7]. While the BM0 and layers above the M1 lines show double AlOx layers, Our SMIC N+3 teardown showed single AlOₓ layers. SMIC uses a simpler local AlOₓ substack, while the remaining cap and etch sequence provide the required landing protection. So why double layers? The closely spaced AlOₓ doublets provide two protected endpoints in the etch sequence. Intel documents an AlOₓ/SiN/AlOₓ stack that explains the benefit. The main dielectric plasma etch stops on the first AlOₓ film; a selective wet clear opens that film; a second plasma etch removes the intermediate SiN and stops on the second AlOₓ film. The final wet clear exposes the metal landing surface. SiN is the intermediate dielectric in Intel’s published example. [8] The second stop protects the metal through a cap breakthrough. Wide openings can etch faster than narrow ones, and etch depth varies across the wafer. Metal under an early-clearing opening would otherwise be exposed while other openings still need more etching. Staged protection widens the process window and reduces metal erosion, corrosion and void formation. [8] TSMC documents AlN/AlOₓ/SiOC/AlOₓ above Cu, with AlN blocking Cu diffusion, and a simpler AlN/SiOC/AlOₓ variant that omits one AlOx film. [9] Levels with different opening sizes, aspect ratios, pattern densities and cap materials need different etch margins. A double AlOx stop is useful where another protected endpoint justifies the added processing. The extra film adds formation, selective opening and cleaning steps, plus another set of interfaces to control adhesion, moisture, and stress. These blanket films are opened through the existing via pattern, so each film does not require another lithography mask. AlOₓ adds parasitic capacitance when it replaces lower-k dielectric; two thin AlOₓ films can nevertheless contain less AlOₓ than one thick film. Total thickness, placement, and theintermediate dielectric determine the electrical cost. Deposition chemistry also changes AlOx permittivity and residual hydroxyl content, which can oxidize the underlying metal. [7], [8], [10], [11] The backside stack separates into relatively fine BM0-BM2 wiring near the devices and coarser BM3-BM5 power distribution. The largest pitch increase occurs between BM2 and BM3. BM0’s pitch closely matches the logic-row height, fitting local power delivery to the cell rows. Higher levels aggregate current through larger conductors: routing density becomes less important than low resistance and current capacity as the network approaches the package. This hierarchy provides wide power wiring for the power delivery network without consuming scarce frontside signal-routing resources. [3] The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. Frontside Interconnects Intel 18A combines Mo-lined W contacts and nano-TSVs with a separate backside Cu power network. Samsung SF2 keeps power on the frontside, using Ti-based contact interfaces and Ta-based barriers and Co liners around Cu wiring. In 18A standard-cell rows, backside power rails supply the devices through nano-TSVs within the cells, freeing frontside routing resources. Samsung’s M0 accommodates both power and signal connections. From the device toward M0, the connection runs through a Ti-based S/D interface, W contact fill, a Mo-lined W via, and the Cu M0 wire. Mo supplies a conductive nucleation and adhesion layer for W, replacing the resistive TiN liner used in conventional W integration. This increases the effective conduction volume within the feature while retaining W fill and its established polishing, cleaning and etching processes. Intel’s Mo/W patent describes this integration tradeoff. The nano-TSV uses the same Mo-lined W construction in the backside supply path. [12] The move from TiN to Mo is an incremental change. While a full Co or Mo fill can also reduce the volume lost to liners in very small features, it requires new integration schemes that increase complexity and risk. Cu remains attractive for wider wires due to its low resistance. As wires and vias shrink, the diffusion barrier consumes an increasing fraction of their cross-section. [12], [12], [14] Intel uses Co/Ru liners at M0-M1, Co at M2-M4, and Nb at M5-M9. The lower-level liners help Cu adhere and reduce void formation during trench fills. Applied Materials’ Endura has new thermal control that facilitate wetting process, so the thin film continuity is good enough that good capillary pressure will drive Cu atoms to the via bottom without voiding. Intel’s choice to use Nb is particularly interesting. Intel’s Nb patent describes a conductive diffusion barrier intended to reduce the barrier’s contribution to resistance relative to conventional Ta-based barriers, particularly at via bottoms where all current crosses the barrier. The patent pairs Nb in coarser levels with the option of lower-cost PVD processing. [15], [16] The upper metal layers support thicker barriers formed through physical vapor deposition (PVD) despite its worse coverage and uniformity. Meanwhile, the lower metal layers require thinner barriers deposited through conformal atomic layer deposition (ALD). Co/Ru adds another material interface and requires controlled deposition and Cu fill. Changing liners and barriers by metal layer allows Intel to optimize interconnect resistance, process complexity, and reliability. [15, 16] RibbonFET, Intel’s name for its gate-all-around FETs (GAAFETs), replaces the FinFET’s vertical fins with four stacked horizontal silicon nanosheets, allowing the gate to surround the channel on every side. The path to GAAFET begins with the planar transistor. A planar MOSFET places the gate above the channel between its source and drain. Pairing an NMOS with a PMOS transistor creates a CMOS inverter, in which the NMOS pulls the output low for a high input, and the PMOS pulls it high for a low input. The gate must retain electrostatic control of the channel to ensure clean switching. As gate lengths shrank, the drain began to compete with the gate for that control, increasing off-state leakage. Electrostatic control was restored through an architectural evolution that raised the channel into a vertical fin and wrapping the gate around three sides. Called “FinFET”, this new architecture packed more effective channel width into a smaller footprint. Further scaling made it harder to maintain both drive current and leakage within smaller cells, and reintroduced the same problems planar MOSFETs faced. Nanosheet GAAFETs close the fourth side by replacing the vertical fin with a stack of horizontal nanosheets, each surrounded by the gate. The tighter electrostatic control suppresses leakage at shorter gate lengths while stacking adds effective channel width within the cell footprint. In a FinFET process, channel width changes in discrete steps as designers must add or remove whole fins. Nanosheet width can instead be adjusted continuously within the process’s design rules. Wider sheets increase drive current, while narrower sheets reduce capacitance at the cost of drive current. Intel 18A uses stacks of four nanosheets each and varies their widths across logic and SRAM. At the process level, adding more sheets to each stack increases effective channel width and drive current, but complicates fabrication. RibbonFET vs MBCFET Samsung began GAAFET production in 2022 with SF3E, following with SF3 and now SF2. Its ‘MBCFET’ provides a useful structural comparison with Intel’s first RibbonFET implementation. [17] STEEL is digging deeper into SF2, used in the Exynos 2600, and TSMC’s GAAFET N2, used in Apple’s A20 Pro, in upcoming newsletter articles. We’re throwing some teasers on X. Let’s compare Samsung SF2’s MBCFET with Intel 18A’s RibbonFET. Subscribe Even to the untrained eye, Intel’s extra nanosheet is obvious. Intel stacks four ribbons to Samsung’s three. Samsung’s sheets are much wider in these fields, so both sheet count and width matter to the available channel perimeter. Sheet width also changes which silicon surfaces carry current. On conventional (001) silicon, wide nanosheets emphasize the broad top and bottom surfaces, favoring electron transport; the larger sidewall contribution in a narrow sheet favors hole transport. Thinner sheets improve gate control but increase confinement and scattering. This makes width and thickness part of the NMOS/PMOS balance, alongside strain and threshold voltage. [18], [19] GAAFET designs like 18A use different work-function-metal (WFM) stacks for NMOS and PMOS. Around each ribbon, a thin SiOx interfacial layer separates the silicon channel from the HfOx high-k dielectric, with La providing dipole tuning and the WFM wrapping the dielectric. NMOS uses a TiAl-based stack, while PMOS uses TiN WFM. W fills the remaining gate trench, providing a lower-resistivity path where the work-function layers are no longer needed. In this field, the PMOS stacks leave room for W between ribbons, while the NMOS stacks occupy more of those gaps. A silicon-based dielectric marks the P/N boundary, allowing the PMOS and NMOS gates, sharing the same gate trench, to be processed sequentially. Fast logic paths, retention circuits, and SRAM need a family of threshold options. Changing threshold without substantially changing device dimensions, capacitance or fabrication complexity is valuable. FinFET processes typically use different work-function-metal stacks. In a four-ribbon GAA stack, the narrow sheet-to-sheet gap limits how much WFM can fit around each channel. La in the gate dielectric creates interfacial dipoles at the SiOx/HfOx boundary, shifting effective work function and tuning threshold voltage. This gives Intel another control alongside its NMOS and PMOS WFM stacks. Low-threshold devices improve critical-path drive; higher thresholds reduce leakage elsewhere. Dipole tuning is especially useful in GAA because it changes threshold without consuming the narrow intersheet gap with thicker WFM. Precise control of La incorporation, diffusion and interface quality has long been a challenge, limiting viability in high volume production but is now seen from every leading-edge foundry. Intel’s patent describes depositing a dipole-forming oxide above HfOx and annealing it toward the interfacial oxide before completing the work-function and fill metals. This separates threshold tuning from the space available for metal. Newer research addresses the thermal cost: imec’s 2026 dipole-middle research inserts the shifter between two HfOx depositions, shortening the diffusion path while protecting SiOx during patterning. [20], [21]Matched-cut EDS, Intel 18A (left) vs. Samsung SF2 (right). Intel retains raised source/drain epi beneath its contacts, while Samsung recesses W deep into the epi to form a V-shaped Ti-lined interface. The deeper contact increases metal-to-semiconductor area and shortens the current path from the lower sheets, reducing contact and spreading resistance. It also removes epi volume and brings the contact etch closer to the channel ends. Retaining more epi preserves the material available for strain transfer, especially from SiGe into PMOS. These geometries balance contact access against stress engineering and etch margin. [22], [23] Samsung stacks three sheets to Intel’s four ribbons, and both processes use sheet width to tune drive strength. In our Samsung cross-sections, widths range roughly from 19 to 30 nm in the NPU rows and 37 to 50 nm in the CU cell. The Samsung nanosheets taper, with the widest sheet at the bottom and the narrowest at the top. Both processes use HfOx gate dielectric and Ti-based work-function stacks, with Al in the NMOS stack. In the Samsung devices shown here, the dielectric and WFM occupy the intersheet gaps, leaving W above the top sheet. Intel’s PMOS stack leaves more room between ribbons, and W fills those gaps while the thicker NMOS stack leaves W mainly in the upper trench. Gate-stack EDS maps. The W between Intel’s PMOS ribbons provides a conductive path close to the lower gates. Where WFM fills the entire gap, the gate still surrounds the channel, but voltage reaches it through the more resistive work-function films. Thinner WFM and dipole tuning preserve room for low-resistivity fill; Mo and Ru are alternative fill metals being developed for further scaling. [24] A masked, sequential WFM flow explains the different gate heights and inter-nanosheet fill. The proposed sequence below shows how separate NMOS and PMOS work-function steps produce that geometry. Enabled by the BSPDN process, Intel replaces the dense-logic silicon subfin with dielectric, removing the parasitic conduction path below the ribbons and reducing substrate-related capacitance. A retained silicon body as in classical, non-SOI, planar and FinFET designs needs junction and punchthrough-stop engineering to suppress leakage. Dielectric isolation makes that leakage less sensitive to the subfin doping profile but adds removal and fill steps. It also weakens the direct thermal path through silicon, making the contacts, metal stacks and package more important for heat extraction. [24], [26] Fluorine is concentrated around selected Intel device structures in the maps. WF6 is a standard precursor for W nucleation and fill, while barrier films protect adjacent dielectrics from fluorine attack. Low-fluorine W processes reduce the residual-F burden. Chloride-based precursors avoid introducing F during W deposition, but require control of chlorine attack, nucleation and fill quality. The integration target is a continuous, low-resistance W path with a thin protective liner and minimal chemical damage to the surrounding stack. [20], [27], [28] The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. We measured cell height, gate pitch, metal geometry, and ribbon dimensions at the XTEM sites shown below. The tables group these dimensions by site and device polarity. Our “sheet cuts” cross the silicon channel and show the ribbons end-on. “gate cuts” run along the channel through successive gates. The 18A logic cell dimensions point to a five-track logic library while the N3E and Intel 3 cell dimensions evidence a seven-track logic library. The DDR-PHY uses wider M0 wires and much larger spacing than core logic. That trades routing density for lower wire resistance and weaker coupling between neighboring nets. The geometry suits the current delivery and coupling requirements of analog, clock, and I/O circuitry. PowerVia lets 18A combine a compact cell height with wider M0 geometry by moving the main power rails off the signal-routing tracks. That relaxes local wire scaling while preserving a small cell footprint. Cell height and gate pitch set the geometric density; pin access and routability determine how much of it a real block can use. [29] The biggest takeaway from our gate-pitch measurements is that Intel 18A compute logic and TSMC N3E GPU logic have similar density in the Bohr representative-cell model. The 18A example is 18.6% denser than the Intel 3 GPU example. Gate pitches are nearly identical across the three sites, so cell height drives most of the difference. The Bohr model combines a four-transistor NAND2 spanning three gate pitches and a 32-transistor scan flip-flop (SFF) spanning nineteen pitches, weighting their densities 60:40. The sensitivity column shows how independently changing cell height and gate pitch by ±1 nm changes the result. This compares representative cell geometries; whole-die density also depends on cell mix and placement. The 18A P-core gives M0 substantially more metal cross section than the N3E vector engine. Treating each profile as a trapezoid gives 2.63 times the area per line and 1.84 times the area after normalization by routing pitch. The larger section reduces the geometric contribution to line resistance and lowers current density for a given current. Taller and wider wires also add capacitance, so circuit delay depends on the balance of resistance and capacitance. The DDR-PHY has less metal area per routing width than the 18A core fields, while remaining above N3E. [30] Area = height × (top CD + bottom CD) / 2, including liners. Area/pitch normalizes by routing width. Taper is the symmetric sidewall angle from vertical, with the largest angle belonging to the DDR-PHY. Compute tile The measurements show how ribbon dimensions and gate-stack geometry vary across the compute tile and between NMOS and PMOS to balance channel drive, gate load and the space needed for the dielectric/WFM stack across logic, SRAM and the DDR-PHY. Width mainly changes available channel perimeter; thickness also changes electrostatic control and carrier confinement. Gate-stack thickness then determines the space left for low-resistivity fill P-core and LP E-core logic Both the P-core and LP E-core use multiple nanosheet widths. Widths are measured on high-magnification XTEMs while wider-field images demonstrate additional width choices within the LP E-core. Multiple widths are expected even within an LP E-core. Timing-critical paths, buffers and cells with different fanout need different drive strengths. The lower-magnification fields show this width diversity beyond the sites quantified in the table. L2 and L3 SRAM GAA gives SRAM designers another way to balance the pull-up (PU), pass-gate (PG), and pull-down (PD) transistors. FinFET bitcells set device strength through fin count while GAA adds nanosheet width as a sizing knob. In a 6T SRAM cell, a strong pull-down relative to the pass-gate limits read disturbance, while a strong pass-gate relative to the pull-up improves writability. During a write, the pass-gate and write driver pull the node storing “1” below the inverter trip point. During a read, the pull-down holds the node storing “0” low. Bias, threshold voltage, mismatch and assist circuitry set the remaining margin. FinFET high-current cells commonly use a PU:PG:PD fin-count pattern of 1:2:2, a device-sizing ratio rather than a current ratio. Ribbon width lets Intel balance SRAM strengths without adding whole fins. The L2 cell uses its narrowest ribbons for PU and widest for PD, improving writability and read stability respectively. Intel’s disclosed HCC operates without assist; its denser HDC uses negative-bitline write assist. Pulling the selected bitline briefly below ground increases pass-gate overdrive so it can overpower the pull-up at lower supply voltage. That buys density and low voltage writability at the cost of boosting circuitry, switching energy, and additional voltage stress that must be controlled. [31], [32] Four rectangular ribbons give the perimeter = 8 × (width + thickness), before corner rounding. PG/PU is 1.49 and PD/PG is 1.16. The L3 structures closely resemble L2 in layout and cell height. Fewer L3 nanosheet widths are tabulated because fewer high-magnification images were available. DDR PHY The DDR-PHY trades density for controlled analog behavior and reliable off-chip signaling. It contains drivers, receivers, delay circuits, and calibration logic that set drive strength, sampling time, and voltage margin. Repeated four-sheet devices with similar widths fit the use of regular transistor units for matching and programmable drive. Its wider local wiring provides room for current delivery and separation of sensitive signals, while consuming more area than a dense core-logic grid. The layout serves the memory channel’s electrical requirements as well as digital logic density. [33] The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. Intel 3 GPU devices Vector engine logic Intel 3’s XVE logic uses two-fin PMOS and NMOS devices with power rails in M0. Its cell height and M0 pitch give a seven-track geometry, two tracks more than the 18A logic. One-fin groups also appear among the two-fin devices. Intel 3 L2 SRAM The Intel 3 L2 SRAM uses the familiar HCC sizing pattern: one PU fin, two PG fins, and two PD fins. N3E GPU devices Vector engine logic The N3E XVE field contains repeated two-fin devices with seven-track cell geometry. N3E remains a FinFET process, giving Panther Lake a direct FinFET-to-RibbonFET comparison. N3E L2 SRAM The N3E L2 SRAM uses the same PU:PG:PD fin-count pattern of 1:2:2. Panther Lake-U follows Lunar Lake’s floorplan quite closely. Both pair 4 P-cores with 4 LP E-cores and NPU, media and display engines in similar locations. Lunar Lake also uses Xe2, the direct predecessor to Panther Lake’s Xe3 GPU. This makes Lunar Lake the most direct basis for our comparisons. Arrow Lake differs in core count and uses the older Xe-LPG GPU architecture, so we only use it where it offers a more direct component-level comparison. Compute tile Panther Lake compute-tile floorplans remain sparse even months after launch. Intel 18A’s backside metal and dielectric stack must be removed without damaging the underlying structures before a clean transistor-level floorplan can be imaged. Most published die shots hide or heavily process the background, but we are quite proud of the die shot we achieved and are excited to show the work we have done. We measured the areas of the key components on the compute tile and compared them with their Lunar Lake predecessors on TSMC N3B. These help us to capture changes in block area and compare the two chips across process nodes and designs. Our total tile areas exclude the scribe-line area. The compute-plus-GPU subtotal below uses the PTL-U compute tile and GT1 GPU; it excludes the I/O tile and passive base. Individual block areas use the boundaries marked on the floorplans The compute-plus-GPU row is recomputed from the displayed PTL-U and GT1 areas. Component rows use their stated per-region counts and are not an additive partition of the whole tile. The P-core area remains almost unchanged between Lunar Lake and Panther Lake, despite L2 capacity increasing from 2.5 MiB to 3 MiB. Arrow Lake uses the same Lion Cove core as Lunar Lake but also has a 3 MiB L2. Cougar Cove fits 20% more L2 into the same P-core area. The larger private cache keeps more of each core’s working set close to its execution units, reducing access to shared L3 and DRAM. Extra capacity adds storage leakage and lookup energy, so designers balance it against avoided lower-level accesses. The shared P-core L3 cache also shrank by 14.8%. [2] Cougar Cove combines a similar footprint with Intel’s reported power-efficiency improvements. RibbonFET’s tighter channel control reduces leakage, while PowerVia reduces supply droop and allows tighter voltage guardbands. [1] Darkmont’s four-core LP E-core cluster is 5.0% smaller than Skymont’s on Lunar Lake, with most of the reduction in its L2 regions. The 1 MiB region shrank by 8.4% and the 1.5 MiB region by 14.9%. The tag arrays also use one fewer visible row. Tags identify which memory addresses the data array holds, so rearranging them changes the cache’s layout and wiring without requiring less data capacity. [2] The LP E-cores share one L2. This pools capacity and avoids duplicating all the cache machinery, but the four cores contend for its banks and bandwidth. Their separate cluster also keeps light work away from the performance cluster and its L3, allowing that larger domain to sleep. [1], [2] Cache area includes more than the storage cells. Tags identify each line, decoders select rows, sense amplifiers read the small bitline signal, and wires connect to the banks. Splitting an array into smaller sections shortens wordlines and bitlines, improving access speed, but duplicates peripheral circuits. Panther Lake’s smaller cache regions therefore reflect the complete memory implementation, including how much of each region is devoted to storage. [34] Unlike Meteor Lake and Arrow Lake, Panther Lake has no separate SoC tile. The NPU, LP E-cores, memory controllers, PHYs, media and display engines now share the compute tile. This removes an active die and keeps CPU memory traffic on one die. The cost is moving PHY and I/O-related circuitry onto 18A: drivers, receivers and analog circuits must still meet external voltage, loading and signal-integrity requirements, so their area does not shrink like dense digital logic. [1], [2] The biggest shrink comes from the NPU, which occupies 36.9% less area. NPU 5 consolidates the same total INT8 MAC count into half as many neural compute engines. Each of the three NCEs has a larger MAC array to make the complete NCE envelope 22.6% larger than an NPU 4 engine. Consolidation also halves the number of scratchpads and SHAVE DSPs, from 12 to 6. The MAC array handles matrix multiplication and convolution, while SHAVE executes vector and custom operations that fit the array poorly. [1], [2], [35] The paired floorplans identify each NCE envelope and its scratchpad, MAC, and SHAVE regions. Each measured MAC polygon is counted once per NCE in the area accounting below. The scratchpads store weights, activations, and intermediate results near the MAC arrays, allowing repeated use without fetching them again from DRAM. Halving their number delivers the largest measured area saving but leaves less local storage for the same total MAC count. Layers that no longer fit locally require smaller working tiles or more transfers of intermediate data. The benefit depends on keeping the enlarged arrays busy while managing that tighter storage budget. [36] NPU 5 also adds native FP8. Using half the operand width of FP16 reduces storage and transfer demand, helping workloads fit the smaller local memory budget. Lower precision and format-dependent range make scaling and model validation part of deployment. Hardware activation functions further reduce work that would otherwise occupy the programmable DSPs. [1], [2] Microsoft requires an NPU to deliver at least 40 TOPS for Copilot+ PCs. Both Lunar Lake and Panther Lake meet this threshold, but Panther Lake uses significantly less silicon. GPU tiles Panther Lake is Intel’s first product with Xe3, its latest GPU architecture. It offers two different GPU tiles: a smaller GT1 tile with 4 Xe3 cores on Intel 3 and a larger GT2 tile with 12 Xe3 cores on TSMC N3E. Panther Lake allows us to compare the same GPU architecture across both Intel 3 and TSMC N3E. Wildcat Lake adds a third Xe3 implementation on Intel 18A. A future newsletter will detail Xe3 and its implementation differences across all three process nodes. GT2 scales Xe3 to a different physical layout, with render slices arranged vertically instead of GT1’s horizontal arrangement. Slice placement sets the distances to shared cache banks and the D2D interface. Those wires consume area and add delay, so scaling the number of Xe cores also requires a new balance of cache placement, routing and timing. [1] What’s immediately obvious is that the GT2 tile on TSMC N3E has much smaller Xe cores than GT1. These block areas include logic, caches, and routing. An Xe core on the GT1 tile is ~69% larger than one on Lunar Lake, and ~55% larger than one on GT2. Intel 3 therefore uses substantially more area per Xe core. The block-area gap exceeds the measured logic and SRAM density gaps, bringing routing, timing targets, cell mix, and floorplan allocation into the comparison. The measured vector/matrix engine region is almost unchanged between Lunar Lake and Panther Lake’s GT2 tile. Xe3 retains eight 512-bit vector engines and eight 2048-bit XMX engines per core. Its gains also come from feeding those engines more effectively: more resident threads hide stalls, and variable register allocation lets shaders trade registers per thread against the number of threads kept active. [1] The shared L1/SLM capacity increased by 33% from 192 KiB to 256 KiB, while its area increased only 5%, raising effective density by 27%. L1 retains reused cache lines, while software-managed SLM lets a thread group share data locally. Both reduce traffic to more distant memory. Allocating more SLM per group can also limit how many groups reside on a core at once. [1], [37] The GT1 tile carries 4 MiB of L2 against 16 MiB on the GT2 tile. GT1 divides its L2 cache into four 1 MiB banks, while GT2 uses eight 2 MiB banks. Each bank contains 128 macros, but each N3E macro stores 16 KiB, twice the Intel 3 macro’s 8 KiB capacity. The N3E macro is only 54% larger while holding twice as many bits, giving it 30% higher density: ~23.7 Mbit/mm² versus 18.3 Mbit/mm². Including bank-level circuitry, the gap widens to ~16.9 Mbit/mm² on GT2 versus ~10.4 Mbit/mm² on GT1. GT2 gains density with its macros storing more bits per unit area, and those macros occupy more of each cache bank. Larger macros spread decoder and sense-amplifier overhead across more storage, while a more compact bank layout reduces the share spent on control and routing. The compromise is longer wordlines and bitlines that carry more capacitance. [34] I/O tile Panther Lake uses two I/O tile variants, both fabricated on TSMC N6. The smaller one provides 4 PCIe 5.0 and 8 PCIe 4.0 lanes and serves lower-tier systems as well as those without a discrete GPU, while the larger one adds 8 PCIe 5.0 lanes, bringing the total to 20 lanes, for discrete-GPU connectivity. Panther Lake SKUs with the larger 10- or 12-Xe GPUs use the smaller I/O tile. [38] The smaller I/O tile adds a PCIe 4.0 block and a Thunderbolt block to Lunar Lake’s I/O layout, providing four additional PCIe 4.0 lanes and another Thunderbolt 4 port. Its repeated N6 blocks retain nearly identical areas and layouts. Reusing these proven PHYs and controllers avoids porting and requalifying external interfaces on 18A, where faster digital logic offers less benefit to circuits constrained by the off-chip link. [38] SemiAnalysis’s teardown lab (STEEL) dives deep into the world’s advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. We’re hiring technical experts from system to transistor and everywhere in between. Check out our Careers page. Panther Lake offers scalability and modularity through its disaggregated packaging that partition compute, GPU, and I/O silicon into separate tiles allowing for a suite of tile configurations. This partitioning makes the package part of Intel’s node economics as it determines how much leading-edge wafer area each product consumes, which functions can remain on other processes, and how much configuration freedom Intel can offer from a shared set of tiles. Furthermore, fabricating the compute and GPU tiles separately confines the new 18A process to the compute tile and allows graphics and I/O to use other, more established, and more cost-effective processes. For Panther Lake, the GPU and I/O tiles are assembled alongside the compute tile on a passive silicon base using Foveros-S. Intel’s current technology brief lists a nominal 36 µm pitch for Foveros-S. Through-silicon vias (TSVs) in the base connect the fine wiring above to the larger package connections below. The functional tiles sit side by side on that passive base in a 2.5D configuration. [39] Our cross-section through the compute and GPU tiles shows the package’s wiring hierarchy. Microbumps connect each active tile to the passive silicon base; its fine redistribution layer (RDL) carries the short, dense tile-to-tile links. TSVs carry connections through the base to the package substrate, which fans them out to the much coarser motherboard solder joints. The base supplies interconnect, while computation remains in the active tiles above it. [39] At the compute-tile edge, the higher-magnification inset shows a local microbump spacing of approximately 25.24 µm and a feature width of 12.33 µm. These local spacings are finer than Intel’s nominal Foveros-S value. The X-ray fields further confirm tighter neighboring bumps, consistent across every die-to-die area found on each tile. Additional X-ray analysis is offered after the paywall. Putting the memory controller beside the CPU removes the D2D transfer that CPU memory requests required in Meteor Lake and Arrow Lake. This avoids the extra transmitter, receiver, and link traversal, saving interface energy and latency. Panther Lake’s separate GPU still crosses a D2D link to reach DRAM, so its larger local caches also help contain package traffic. [1], [40] Smaller dies are less likely to contain a random fatal defect, and screening them before assembly prevents one bad tile from consuming a complete package of good silicon. Reuse also spreads design and qualification work across more products. Against those gains, Intel pays for the passive base, D2D circuits, extra bonding and test steps, and losses during assembly. Cost per working product across the portfolio captures the combined effect of wafer yield, reuse, test, and assembly. [29] Wildcat Lake packaging Intel launched Core Series 3, formerly Wildcat Lake, on 16 April 2026 for value mobile and edge systems. Wildcat Lake keeps 18A but removes the passive base and combines more functions on one die to simplify the package. The two products therefore reveal two distinct ways to commercialize the same leading-edge process. [41] Wildcat Lake’s 18A die combines up to two Cougar Cove P-cores, four Darkmont LP E-cores, two Xe3 cores and a smaller NPU. A separate platform-controller die supplies I/O, connected through UCIe, Intel’s first processor implementation of the standard. Consolidating graphics remove a tile boundary and the passive base, reducing assembly complexity for a modest-bandwidth value product. It also ties CPU and graphics scaling to the same die, giving up Panther Lake’s ability to swap in a much larger GPU. [42], [43] In July 2021, Intel CEO Pat Gelsinger set out an ambitious process roadmap aimed at regaining performance leadership by 2025, later described as five nodes in four years. Five years and one CEO later, Intel’s comeback story is not as unambiguously positive as Pat may have hoped. [44], [45] Intel once set the pace for process technology, bringing high-k metal gate technology and FinFETs into volume production years ahead of the rest of the industry. Its 22 nm FinFET process reached consumers with Ivy Bridge in 2012. [46] Intel’s integrated device manufacturing (IDM) model allowed its architects and process engineers to co-optimize products and processes. Starting with Sandy Bridge, Intel dominated x86, while AMD struggled with Bulldozer. That lead faltered at 14 nm and broke at 10 nm. Intel targeted a massive 2.7× density increase, but the node arrived years late and required several revisions before it could support Intel’s full lineup. This delay forced Intel to stretch 14 nm across six generations, while TSMC moved ahead in process technology and AMD recovered in x86. By 2019, Intel was still shipping 14 nm across most of its product stack, with its 10 nm client ramp focused on Ice Lake mobile processors. Meanwhile, TSMC was shipping N7 and N7+, and AMD’s Zen 2 compute chiplets used N7 to raise core counts and improve efficiency. Intel’s process failures were central to its decline, but unsound business decisions furthered their downward slide. Product delays compounded product mistakes, pushing client, server, and FPGA roadmaps off schedule. Several attempts to enter AI (Nervana and Gaudi) and networking (Tofino) also failed to establish lasting businesses. Intel’s recovery has focused on consumer CPUs and advanced packaging. Tiger Lake, Alder Lake, Lunar Lake and now Panther Lake have restored Intel’s consumer roadmap. On the process side, Intel 4 shipped with Meteor Lake, Intel 3 with Granite Rapids and Sierra Forest, and Intel 18A with Panther Lake. Intel has also made advanced packaging part of its foundry offering. However, Intel is still playing catch-up in servers. Several Xeon generations arrived years late and trailed contemporary AMD and Arm server CPUs in performance, efficiency, and core count. The process roadmap is back, but Intel does not hold the same process-technology leadership position it held prior to 10 nm. The introduction of gate-all-around nanosheets and backside power delivery are two of the biggest changes to transistor integration in a decade. Intel took on both changes at once: 18A paired its first RibbonFET with PowerVia in Panther Lake. Panther Lake is a substantial manufacturing milestone. Our cross-sections show how RibbonFET and PowerVia reshape local contacts and wiring, while the floorplans show where architectural consolidation and process choices save area. A sustained competitive lead depends on product performance, cost, yield, and the next implementation. The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page.. 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Family business blends Cajun, Caribbean flavors at Continental Kitchen
Family-run catering business -- Grub 2 Go -- is combining Cajun and Caribbean flavors while working out of a shared commercial kitchen during Hispanic Heritage.
Family business blends Cajun, Caribbean flavors at Continental Kitchen
Family-run catering business -- Grub 2 Go -- is combining Cajun and Caribbean flavors while working out of a shared commercial kitchen during Hispanic Heritage.
Family business blends Cajun, Caribbean flavors at Continental Kitchen
Family-run catering business -- Grub 2 Go -- is combining Cajun and Caribbean flavors while working out of a shared commercial kitchen during Hispanic Heritage.
Family business blends Cajun, Caribbean flavors at Continental Kitchen
Family-run catering business -- Grub 2 Go -- is combining Cajun and Caribbean flavors while working out of a shared commercial kitchen during Hispanic Heritage.
Family business blends Cajun, Caribbean flavors at Continental Kitchen
Family-run catering business -- Grub 2 Go -- is combining Cajun and Caribbean flavors while working out of a shared commercial kitchen during Hispanic Heritage.
Family business blends Cajun, Caribbean flavors at Continental Kitchen
Family-run catering business -- Grub 2 Go -- is combining Cajun and Caribbean flavors while working out of a shared commercial kitchen during Hispanic Heritage.
Family business blends Cajun, Caribbean flavors at Continental Kitchen
Family-run catering business -- Grub 2 Go -- is combining Cajun and Caribbean flavors while working out of a shared commercial kitchen during Hispanic Heritage.
Family business blends Cajun, Caribbean flavors at Continental Kitchen
Family-run catering business -- Grub 2 Go -- is combining Cajun and Caribbean flavors while working out of a shared commercial kitchen during Hispanic Heritage.
Family business blends Cajun, Caribbean flavors at Continental Kitchen
Family-run catering business -- Grub 2 Go -- is combining Cajun and Caribbean flavors while working out of a shared commercial kitchen during Hispanic Heritage.
Family business blends Cajun, Caribbean flavors at Continental Kitchen
Family-run catering business -- Grub 2 Go -- is combining Cajun and Caribbean flavors while working out of a shared commercial kitchen during Hispanic Heritage.
Family business blends Cajun, Caribbean flavors at Continental Kitchen
Family-run catering business -- Grub 2 Go -- is combining Cajun and Caribbean flavors while working out of a shared commercial kitchen during Hispanic Heritage.
Family business blends Cajun, Caribbean flavors at Continental Kitchen
Family-run catering business -- Grub 2 Go -- is combining Cajun and Caribbean flavors while working out of a shared commercial kitchen during Hispanic Heritage.
Family business blends Cajun, Caribbean flavors at Continental Kitchen
Family-run catering business -- Grub 2 Go -- is combining Cajun and Caribbean flavors while working out of a shared commercial kitchen during Hispanic Heritage.
Family business blends Cajun, Caribbean flavors at Continental Kitchen
Family-run catering business -- Grub 2 Go -- is combining Cajun and Caribbean flavors while working out of a shared commercial kitchen during Hispanic Heritage.
Family business blends Cajun, Caribbean flavors at Continental Kitchen
Family-run catering business -- Grub 2 Go -- is combining Cajun and Caribbean flavors while working out of a shared commercial kitchen during Hispanic Heritage.
Family business blends Cajun, Caribbean flavors at Continental Kitchen
Family-run catering business -- Grub 2 Go -- is combining Cajun and Caribbean flavors while working out of a shared commercial kitchen during Hispanic Heritage.
Family business blends Cajun, Caribbean flavors at Continental Kitchen
Family-run catering business -- Grub 2 Go -- is combining Cajun and Caribbean flavors while working out of a shared commercial kitchen during Hispanic Heritage.
Family business blends Cajun, Caribbean flavors at Continental Kitchen
Family-run catering business -- Grub 2 Go -- is combining Cajun and Caribbean flavors while working out of a shared commercial kitchen during Hispanic Heritage.
Family business blends Cajun, Caribbean flavors at Continental Kitchen
Family-run catering business -- Grub 2 Go -- is combining Cajun and Caribbean flavors while working out of a shared commercial kitchen during Hispanic Heritage.
Family business blends Cajun, Caribbean flavors at Continental Kitchen
Family-run catering business -- Grub 2 Go -- is combining Cajun and Caribbean flavors while working out of a shared commercial kitchen during Hispanic Heritage.
Celebrating National Lobster Day with coastal flavors and weekend entertainment at Confab Kitchen and Bar
Confab Kitchen & Bar owner Doug Gross and Chef Jason Hall visit WANF’s ATL Live Show to demonstrate how to assemble a fresh lobster roll for National Lobster Day and share details on Friday live patio music and fall game-day viewing.
Talks advanced in FC Nantes sale
Waldemar Kita is nearing an agreement to sell FC Nantes to a group of French and Portuguese investors, as per a report from L’Équipe. Kita bought Nantes for €10m back in 2007 and has now set a ��...
Chris Weidman Explains How Josh Hokit Can Beat Ciryl Gane
UFC Hall of Famer Chris Weidman explained how Josh Hokit can defeat UFC heavyweight champion Ciryl Gane at UFC 334.With less than one year of UFC experience, Hokit will be fighting Gane for the undisputed UFC heavyweight title at UFC 334, which goes down on November 14 at Madison Square Garden in New York City, […] The post Chris Weidman Explains How Josh Hokit Can Beat Ciryl Gane appeared first on HEAVY.
George Kittle weighs in on 49ers’ surprising early success
San Francisco 49ers tight end George Kittle weighs in on the team's early success.It’s only been about three weeks into the NFL season, and no team might be hotter than...
Erling Haaland's ridiculous Norway record continues to grow 📈
Erling Haaland is simply a goal-scoring machine when he puts on the Norway kit. The Manchester City striker is no stranger to finding the back of the net at the club level, but when he suits up for hi...
Climate change is expanding extreme heat's threat to human health
I was 12 when the worst heat waves hit our home in rural New South Wales, Australia. It was summer vacation, a few weeks after we'd celebrated Christmas. I sat at the kitchen table, next to the sheets ...
NVIDIA Unleashes The Next Chapter of Neural Rendering & Path Tracing With RTX Kit SDK While RTX Mega Geometry 2.0 SDK Gives Devs the Ability To Stream Insane Levels of Detail
NVIDIA unleashes RTX Kit and RTX Mega Geometry 2.0 SDKs, giving devs a taste of next-gen Neural Rendering, Path Tracing & game technologies.
Hairy feet, red eyes: Salish Sea reveals two sea spider species new to science
If you're swimming in the Salish Sea late at night and feel a skittering along your calves, tiny hairy feet tip-tapping their way higher and higher toward your face, don't worry—it's probably just the ...
Beats 360 Pre-Orders Open at Amazon With Cushion Kits on Sale, Plus More Beats Deals
The new Beats 360 headphones were announced today, and can be pre-ordered on Amazon ahead of their launch on Thursday. They're available in Black, Cloud, plus a bundle where you can style the headphones however you'd like thanks to interchangeable ear cushions and headbands. Note: MacRumors is an affiliate partner with Amazon. When you click a link and make a purchase, we may receive a small payment, which helps us keep the site running.
Kit Harington has never met Leonardo DiCaprio but has an epic nickname for him
Harington’s nickname for DiCaprio might just be worth keeping.
Scientists develop real-time AI monitoring for an advanced nuclear reactor component
Just as a clogged kitchen sink can bring household routines to a halt, a blockage in a nuclear reactor's heat exchanger can slow operations and require urgent attention. Researchers at the U.S. Department ...
Kayak Clarifies Position in Business Travel Marketplace
Kayak for Business is looking to broaden its appeal beyond its enterprise configuration with Blockskye, targeting SMEs as well as large clients. SVP Eva Fouquet told BTN's Elizabeth West the company also is pursuing a hybrid strategy, developing AI capabilities while maintaining traditional online booking options as traveler trust develops.
A 12-year-old in California built a Braille printer from a $350 Lego robotics kit for a school science fair, at a time when the cheapest commercial machine cost about $2,000, and Intel invested in it
When a middle schooler cracked an accessibility problem that the technology industry had left unsolved for decades, major investors took notice.
SpaceX Seems to Expand 'Free' Starlink Mini Perk to All Residential Plans
Starlink quietly tweaks language about the 'Optional Mini Kit' perk, which used to only be for the Residential Max plan.
Texas DPS honors crime lab staff during National Forensic Science Week
Texas DPS spotlights its Crime Lab Division for Forensic Science Week, citing 113,259 tests, record CODIS DNA uploads, new survivor DNA consent kits, and Rapid DNA booking pilots in Williamson and Montgomery counties.
NST appoints new presidents to Korea Basic Science Institute, KITECH and KIER
Park Sung-gyun, Son Woong-hee and Jung Hak-geun begin three-year terms at government-funded research institutes
Hayden Panettiere remembered at Malibu memorial service
Hayden Panettiere attends the Los Angeles premiere of Netflix's new film 'Blonde' at TCL Chinese Theatre on Sept. 13, 2022, in Hollywood, California. (Jon Kopaloff/Getty Images)Hayden Panettiere was celebrated over the weekend at a memorial service held in California, her representative confirmed to ABC News.Around 80 friends of the late Nashville star, who died on Aug. 16 at the age of 36, gathered in Malibu on Saturday to share "an evening of music, memories, laughter and tears."“We wanted to honor Hayden in the best way we knew how—with as much love as possible," Panettiere's representative, Kasey Kitchen, said in a statement with a group of the actress's friends, who jointly organized the memorial.The statement continued, "It was a beautiful and intimate ceremony where friends came together to celebrate her life and honor the beautiful, magnetic light and love she infused into the world.”Panettiere's Nashville co-star Connie Britton and other celebrities, including Evan Ross and Ruby Rose, were photographed attending the memorial.Panettiere died after she was found unresponsive and in cardiac arrest at a Greenville, South Carolina, apartment.The actress's official cause and manner of death have not yet been announced.An investigation into her death has expanded from South Carolina to Los Angeles, and investigators are focusing on the role drugs may have played in her death, sources told ABC News last week.Kitchen, Panettiere's representative, said in a statement on Sept. 15 that her death "remains under investigation pending toxicology results.""As we await the answers we are all seeking, may we also remember Hayden for the incredible legacy she leaves behind — the light she shined on mental health and postpartum depression, and the voice she gave to those who felt unseen and unheard," Kitchen said. "The answers we are all seeking will come."Copyright © 2026, ABC Audio. All rights reserved.
Adidas to release final Germany kit on November 3
In a promotional video featuring prominent football figures, Germany's equipment supplier Adidas announced that they will release one more football kit on November 3 to mark the end of its partnership with the German Football Federation (DFB). In the video published on social media on Monday, Joachim Löw, Jürgen Klinsmann, Philipp Lahm, Manuel Neuer and Florian Wirtz, among others, debate on which Germany jersey is the most beautiful one in history.
Scientists reveal how our cells conduct emergency repairs for DNA
Two new federally funded studies offer detailed views of proteins repairing broken DNA inside tightly packed chromatin, and of the molecular toolkit they assemble at a break, with potential implications for cancer treatment
Dutch scientists discover tin-based solar breakthrough that keeps hot electrons 1,000 times longer than current panels, changing the future of solar power
Scientists at the University of Groningen in the Netherlands have discovered how tin-based perovskite materials allow hot electrons to retain their excess energy for around 1,000 times longer than expected, a finding that could shape the future of solar power. The researchers found that two physical effects, the hot phonon bottleneck and the Burstein–Moss effect, work together to slow electron cooling from picoseconds to nanoseconds.
BUSINESS MONDAY: Spotlight on Undergrowth in Great Barrington—from kitchen table dream to reality
This new mother-daughter business is bringing together art, craft, and community through meaningful experiences and beautifully made goods rooted in creativity, nature, and shared stories.
New Pittston meal prep business delivers comfort food
Michael Langdon, chef at Pittston’s Rotten Tomato Company meal prep store, competed on “Hell’s Kitchen” with Gordon Ramsay. The business offers delivery and pickup.
China tests first practical submarine solar farm at 10 metres depth in open sea
Scientists successfully charge batteries and power a LED using lead halide perovskite solar cells in world-first test.
Scalpers List Steam Frame Reservations at $1,700+ on eBay, Community Fights Back
Scalpers have apparently started listing Steam Frame reservations on eBay within hours of Valve sending its first reservation emails. Per IGN, listings for the 256 GB kit start around $1,700 versus Valve's $1,059, while 1 TB kits are listed at roughly $2,000 versus $1,299. IGN says at least some...
It's confirmed: Electric striker ready to join Liverpool squad
Liverpool have a fantastic striker ready to join their first-team squad. It’s time, that much is clear.Liverpool are low on strikers right now. Hugo Ekitiké's injury has them down to just the one e...
UFC 334: Gane vs. Hokit Officially Announced
During the UFC 331 event, the UFC officially announced the upcoming UFC 334 fight card that takes place in November. UFC 334 goes down on November 14 at Madison Square Garden in New York City, New York. Here is the full card. UFC 334 Main Card In the main event of UFC 334, Ciryl Gane […] The post UFC 334: Gane vs. Hokit Officially Announced appeared first on HEAVY.
Scientists mix a simple molecule into perovskite solar layer, and efficiency climbs past 25.6%
Tests showed the combined layer was less prone to clumping and covered the surface more completely.
Your Kitchen Sponge Has More Bacteria Than a Subway Pole: The Startling Science of What’s Really Living in New York Homes
New Yorkers are famously germ-conscious. We hover over subway poles, elbow-push door handles, and carry hand sanitizer like it’s a fifth borough accessory. But here’s the uncomfortable truth backed by peer-reviewed research: the dirtiest place most New Yorkers touch every single day isn’t on the 4 train — it’s sitting next to their own kitchen […]
How I underestimated how unpredictable mental health can be
The Lindsay Clancy trial is shocking, but the complexity of mental health and our inability to control everything should be humbling to us all.
Ten-man Linfield secure narrow win over Crusaders
A second-half Kitt Nelson goal gives Linfield a 1-0 win over Crusaders in their Irish Premiership game at Windsor Park.
Warhammer 40k: Auspex Scanning the New Space Marine Models
The drop pod assault has begun, and we have a close-up look at the new Angels of Death. Codex: Space Marines is up for pre-order alongside some much-needed reinforcements for Space Marine players everywhere. Games Workshop sent us a selection of these new kits, and we wasted no time in getting them built! Captain on […]
ASU discussing playing more international games in more sports
Given the interest from Sun Devils fans in the Union Jack Classic, ASU is considering playing more international games in more sports.
CT Culture Corner: ‘Hell's Kitchen,' Olivia Rodrigo lead local entertainment news
For the 25th season of "Hell's Kitchen" every contestant will be under age of 25, Gordon Ramsay said.
CT Culture Corner: Hell’s Kitchen, Olivia Rodrigo and more
For the 25th season of "Hell's Kitchen" every contestant will be under age of 25, Gordon Ramsay said.
Vegas Five-Day Sale to offer up to 60% off on resort stays
Las Vegas resorts are offering up to 60% off stays for booking during a five-day sale from Sept. 22 to 26; the sale also includes deals on dining and entertainment.
George Kittle will play in Week 2
George Kittle is set to play in Week 2 against the Dolphins.
👕 Check out this week's big kit launch round-up
Friday (18) has arrived and, as has already become tradition, it’s time for the big roundup of shirt releases from the past week.With the European season already underway, the new items were the alt...
Former Sony Suits Recreate Infamous PS4 Game Sharing Skit, Only without the Disc
Hits different these days
Lysol Maker Plans New Science and Innovation Center in Nutley
A new research complex is coming to Essex County as the company behind Lysol and Mucinex expands its New Jersey operations.
Countdown to Stuttgart: TV coverage, kits, record
Head-to-head: Strong runThe Bundesliga record between BVB and VfB Stuttgart is almost perfectly balanced: in 112 meetings, VfB Stuttgart have won 44 times, Borussia Dortmund 42 times, and 26 matches e...
Just 100 pieces: special Europa League jerseys available
Limited edition kit from UEFA Europa League openerOur Red Bulls kicked off their UEFA Europa League campaign with three points away to Levski Sofia. The special version of our white jersey - worn by ...