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AI in Mental Healthcare Presents Both Opportunities and Challenges
Artificial intelligence (AI) technology and its applications are reshaping many domains of modern life, including how individuals seek support for mental health needs and how they receive that care. Healthcare professionals are rapidly adopting AI-based applications designed to support workflow and care delivery, streamline processes, and help expand access to services.
Health insurers are seeking rate hikes again. Here’s what to know
The Connecticut Insurance Department annually reviews requests by insurance companies to raise or lower rates on health coverage.
FIU experts are available to speak on artificial intelligence and emerging technology
As AI continues to reshape industries and spark critical conversations around innovation, access, and technology, FIU researchers are available to offer expert insight.
CIBC US Faces of Impact Chicago Affordable Housing
Since 2014, CIBC has been financing affordable housing initiatives in Chicago to strengthen neighborhoods and make a difference in communities that need it the most. As of publication, more than 50 structures have been completed from West Ridge to Calumet Heights, each with a unique story. Faces of Impact highlights three of those stories, and the people behind them driving safe and accessible housing.
CVS Pharmacy® expands GLP-1 support to lower costs, improve access, and help patients stay on therapy
New $50 monthly copay for eligible Medicare patients, one-on-one pharmacist guidance, and over-the-counter products to help manage common side effects available to support patients
Can a Community Move Beyond the Systemic Fractures of Mental Health Care? "All Access hosted by Andy Garcia" Explores the Coordinated Response in Kansas
The educational segment, filming on June 23, 2026, features Mental Health America of South Central Kansas as it challenges the traditional boundaries of regional behavioral healthcare. Filmed on location across outpatient counseling spaces, children and family programs, adult support services, and residential environments supporting recovery, stability, and independence in Wichita, the feature captures how connected programs, community partnerships, and compassionate care create a functional saf
Bulloch County Health Department to host WIC Farmers Market this Tuesday & Wednesday
Eligible Georgia residents participating in the Women, Infants, and Children (WIC) Program will soon have more access to fresh, locally sourced fruits and vegetables through a series of farmers' markets hosted by the Southeast Health District. The market will be at the health department (1 W. Altman St.) on Tuesday, June 23, 2026, and Wednesday, June 24, 2026, from 9am-2pm each day.
What men should know about the US government’s latest move on testosterone therapy
The US Department of Health and Human Services is requesting revisions to the labels on testosterone replacement therapies for men after reviewing new data and evidence on their safety and benefits. These updates could pave the way for easier access to testosterone replacement therapy.
Stanislaus County OKs new mental health plan, prepares for state monitoring
County officials hope the plan increases access to care and serves to reduce homelessness, relieve burden on the criminal justice system and reduce untreated mental illness.
World Refugee Day 2026
Marking World Refugee Day 2026 and 75 years of the Refugee Convention, WHO calls for inclusive and resilient health systems that ensure refugees access to quality, continuous and culturally sensitive care. With 117.8 million people forcibly displaced worldwide, the organization emphasizes that protecting refugee health strengthens public health, preparedness and social cohesion. WHO highlights progress in integrating refugees into national health policies while urging greater investment, stronger data systems, emergency preparedness and meaningful participation of refugees in health planning and governance.
Medicaid Work Requirements and Access to Health Care
Scholars examine whether implementing Medicaid work requirements may limit access to health coverage.
Business group backs Becerra, sparking GOP anger as progressives preach caution
Republican Steve Hilton blasted CalChamber’s endorsement as “Stockholm syndrome,” saying business groups are chasing access, not change.
Philadelphia-area STI disparities still fueled by stigma and misinformation, health care leaders say
At a Philadelphia panel on HIV and health equity, experts pointed to gaps in education, funding and access to care.
Real Estate Is Still a People Business
Unless you’ve been avoiding the internet for the past few years, you’ve probably noticed that artificial intelligence is everywhere. From customer service chatbots to content creation and personal assistants, AI is reshaping how people work, communicate, and access information. Real estate is no exception. Buyers, sellers, and real estate professionals are incorporating AI into their […]
Clemson Athletics Introduces Multi-Sport “Paw Pass” Ticket
Clemson Athletics is launching a new ticket platform, Paw Pass, designed to give fans more flexibility and access to a wide range of athletic events throughout the year.
MARCO Mobile Medicine Brings Care Closer to Home
For many families across Appalachia, a doctor’s appointment can mean taking time off work, arranging transportation, traveling winding mountain roads and spending hours on the road for a visit. It’s a challenge familiar to generations of West Virginians, particularly those living in rural communities where access to specialty care can be limited. Today, Marshall Health Network is helping change […]
TGH Behavioral Health Hospital Launches Partial Hospitalization Program, Expanding Access to Outpatient Mental Health Care
/PRNewswire/ -- Tampa General Hospital (TGH) Behavioral Health Hospital has launched its Partial Hospitalization Program, a structured daytime treatment...
Prime Day 2026: Best Early Apple Device and Accessory Deals Now Live
Amazon is soon to be back with its annual summertime Prime Day event, lasting for four days from June 23-26, one of the longest Prime Day events yet. As it does every year, Prime Day offers shoppers a huge selection of deals across Amazon's storefront, and there are already many deals you can get on sale ahead of the event. Note: MacRumors is an affiliate partner with Amazon. When you click a link and make a purchase, we may receive a small payment, which helps us keep the site running.
Hartford HealthCare highlights commitment to advancing health equity
HARTFORD, Conn. (WTNH) — As the nation observes Juneteenth, health care organizations are reflecting on the holiday’s enduring lessons of equity, access, and opportunity. Hartford Healt…
Guest opinion: Rural Wisconsin workers lose health insurance twice as fast as before the pandemic
Wisconsin should expand Medicaid, invest in renewal pathways that don’t assume broadband internet access and revamp the renewal system so eligible people do not lose coverage, Jiyue Wang writes.
Blueprint Capital Advisors CEO Jacob Walthour Featured on The New Jersey Business Media Podcast Discusses Access, Capital, and Opportunity for Entrepreneurs
/PRNewswire/ -- Jacob Walthour, founder and CEO of Blueprint Capital Advisors and creator of the Power 100 initiative, appears as a featured guest on The New...
HPAE Nurses Ratify New Contract giving Patients Access to a Virtua Health Hospital with Safe Nurse-to-Patient Ratios
HPAE Nurses Ratify New Contract giving Patients Access to a Virtua Health Hospital with Safe Nurse-to-Patient Ratios Now every NJ Hospital with HPAE Nurses has enforceable safe staffing in their union contract EMERSON — HPAE Local 5105 Registered Nurses at Virtua-Mount Holly Hospital have ratified a new three-year contract with Virtua Health that includes enforceable safe nurse-to-patient[...]
Diapers for Dignity: Program helps seniors access free incontinence supplies
The Area Agency on Aging Pasco-Pinellas is seeing an increase in the number of senior citizens who can’t afford incontinence supplies.
A 'perfect storm’: Why rural hospitals across Michigan are struggling
As Sturgis Hospital closes, there have been concerns raised over healthcare access in southwest Michigan.
Gemini Live can now access your past chats Memory, Connected Apps info
Following the big Neural Expressive redesign and new voices last month, Google has updated Gemini Live with Memory access.
What patients need to know about the Baptist-Cigna dispute as Cigna claims Baptist costs 40% more than other hospitals
Thousands of Northeast Florida residents could soon lose in-network access to Baptist Health hospitals and providers as contract negotiations between Baptist Health and Cigna remain unresolved days before a June 24 deadline.
At CMS, Oz Eyes Faster Tech Approvals and a 'Power to Convene'
Top Centers for Medicare & Medicaid Services officials said Thursday they plan to increase patients’ access to new technology, including AI, but that they’re still exploring how best to regulate it and ensure patient safety. Addressing the U.S. News Healthcare of Tomorrow conference in Washington,
PAHO Executive Committee concludes 178th session with key decisions to strengthen health across the Americas
Washington, D.C., 18 June 2026 (PAHO) – The 178th Session of the Executive Committee of the Pan American Health Organization (PAHO) concluded today after four days of discussions on the Region's most pressing public health priorities, with Member States approving a series of strategies, plans of action and resolutions that will help strengthen health systems, improve preparedness for health emergencies, and expand access to essential health services across the Americas.
UMG, The World’s Biggest Music Company, Is Investing In A Mental Health Ecosystem. Here’s How It Works
Universal Music Group's circle of shared care, access and economic responsibility that streamlines the process to obtaining mental health support from trained Amber Health clinicians is a blueprint for companies large and small.
Reframing exercise: How simple physical activity boosts health | Harvard T.H. Chan School of Public Health
For many people, consistent exercise feels daunting — an all-or-nothing proposition in which setbacks signal failure and advice overwhelms. This discussion reframes physical activity as something accessible and sustainable by challenging common myths about exercise.
High 5 Entertainment’s hiring fair set for early 2027 jobs
High 5 entertainment venue in Estero is progressing with vertical building. Amenities include a pickleball club, bowling alley, bars, golf courses, and a full-service kitchen with memberships and public access.
EA SPORTS FC 26 Is Now on EA Play
Members can shape your legacy in The World's Game. Get unlimited access with EA Play, and score a Supercharge Pack starting June 18 until July 17.
Regulatory investigations reveal systemic failures among Commercial California Health Plans in delivering timely behavioral health care
Commercial California health plans are failing enrollees who need access to behavioral health services for mental health and substance use disorder care, recent investigations have shown. Across three rounds of investigations, the California Department of Managed Health Care found 70 Knox-Keene Act violations and 35 barriers to care across 14 health plans, spanning national, regional, and county-based plans.
Playing politics with water access in Anne Arundel? Behind the vote to delay two projects.
Two projects for public water access in Anne Arundel were quickly amended out of next year’s budget. Advocates described feeling blindsided, and some officials decried the move as potentially motivated by politics.
Heathrow third runway likely to affect health of millions nearby, official report warns
Analysis says expansion could also harm access to housing, education, healthcare, open spaces and transport
City launched $2.4M small business loan program in partnership with Business Impact NW -
Fourth Plain Commons The City has launched a new citywide $2.4 million Revolving Loan Fund designed to expand access to capital for small businesses.
Number of Americans who afford high-quality healthcare has dropped
Only about half of US adults could afford their healthcare and had access to quality care last year, according to new data.
States file to stop DOJ from demanding patient data from providers
California and 18 other states are asking the court to bar the U.S. Department of Justice from accessing the protected health information of minor patients as part of a federal investigation into gender-affirming care.
Agreement between MUSC Health, Cigna Healthcare set to expire end of June
The deadline for MUSC and Cigna Healthcare to come to a new agreement to maintain access for those insured with the company is nearing with both sides pointing
Business News: Basel Returns To Watch Calendar With April Basilia Watch & Jewelry Show
Baselworld is defunct, but Basilia aims to fill a gap for accessible watch and jewelry brands, but no details yet on who might participate among 400 exhibitors.
How many Americans can afford high-quality health care? A new poll finds the number has fallen
A new poll shows only about half of U.S. adults could afford their health care and had access to quality care last year.
French Twist: Trump Upends GOP Plans | WSJ Politics Newsletter for June 18
Plus, Kevin Warsh makes his debut as Fed chairman and Trump offers encouragement to Anthropic over access to its powerful AI models
Premium credit cards promise rewards, but change how consumers spend
Premium rewards cards offer points, lounge access, and luxury perks — but those rewards are also changing how consumers think about spending.
Here are the music, entertainment lineups for this year’s ArtBlaze beach parties
“ArtBlaze brings accessible, immersive art to public spaces, infusing joy and wonder into places that already belong to the community.”
How many Americans can afford high-quality healthcare? A new poll finds the number has fallen
New data from the West Health-Gallup Affordability Index shows that only about half of U.S. adults could afford their healthcare and had access to quality care last year.
Poll: Only about half of Americans say they can afford quality healthcare
New data from the West Health-Gallup Affordability Index shows that only about half of U.S. adults could afford their healthcare and had access to quality care last year.
Nationwide nursing-home picture comes into focus with new analysis
Either the stakeholders issuing the warnings overstated the risk of widespread closings—or COVID-era emergency funds succeeded in heading off a calamity of national proportions. Either way, patient access has taken a hit here and there.
Boston overdose deaths hit decade low
Boston overdose deaths fell to their lowest level in a decade, with health officials crediting wider naloxone access.
iPadOS 27 Hands-On: Everything New for iPad
Like iOS 27, iPadOS 27 gains a smarter, more capable version of Siri, the Siri app, and new Apple Intelligence features in apps, but there are a few iPad-only standouts. Subscribe to the MacRumors YouTube channel for more videos. Siri AI on iPad has all of the same features as Siri AI on the iPhone, so it can access your personal data, search the web for answers, complete tasks in apps, and answer questions about what's on your screen.
Cedarville University to launch online sports business management degree program
The new online degree will expand access to the university’s sports business management program
Cedarville University to launch online sports business management degree program
The new online degree will expand access to the university’s sports business management program
What it's like flying in premium class with Icelandair; upgrade worth it
My upgraded seat in Icelandair's Saga Premium class came with meals, a comfy seat, lounge access, and other perks that made the price worth it.
I was using Anthropic's Fable when it disappeared mid-project
A UK founder was mid project with Anthropic's Fable 5 model when a US government order halted foreign access. Luckily, he had a backup plan.
First 'Super' Veterans Business Outreach Center opens in San Antonio
Texas has opened its first “Super” Veterans Business Outreach Center in San Antonio, launching a statewide effort to help veterans, service members, and military spouses start and grow businesses. Officials said the center will provide training, mentorship, and access to capital for 1.5 million veterans in the state.
Health Outcomes Data For Wearables Key To Medicare Coverage Expansion
Insurance coverage of wearables is spotty. This could soon change as Medicare begins a pilot to facilitate access to wearables while gathering data on health outcomes.
Trump accused Obama of funding Iranian terrorism. His agreement could grant Iran access to much more money
President Donald Trump’s nascent agreement with Iran is beset by problems right now, but at the top of the list may be the issue of money flowing to Iran.
UConn Health Celebrates Grand Opening of Expanded Torrington Location
The newly renovated facility brings a range of healthcare services together under one roof, making care more convenient and accessible close to home.
Preparing Leaders for the Business of Sports
Cedarville University is expanding access to its sport business management program through a new online degree that prepares students for leadership roles in a...
Preparing Leaders for the Business of Sports
Cedarville University is expanding access to its sport business management program through a new online degree that prepares students for leadership roles in a...
Northwestern Medicine Announces a $35M Grant to Launch a Community Health Institute
Schreiber Philanthropy is investing in Northwestern Medicine’s efforts to expand access to care, build the community health workforce, and address social health needs
The Women’s Health Problem Halle Berry And Nella Want To Help Solve
Nearly 75% of women delay gynecological exams. Halle Berry discusses Nella's mission to improve comfort, access, and preventive healthcare.
Under Mission 300, a New Way of Doing Business Connects Over 50 Million People to Electricity Across Africa
Mission 300 is now delivering electricity access at nearly double the pace recorded at the initiative's launch — proof that coordinated action can drive
This Teen Activist Wants to Make Sure No Girl Is Denied the Right to Play Sports
With Girls4Sports, Maegha Ramanathan has built a global youth-led movement to expand access to athletics and empower the next generation of female leaders
Philips Foundation 2025 Annual Report: enabling access to healthcare for 69 million people by scaling what works
Philips Foundation’s 2025 Annual Report shows progress toward reaching 100 million people a year by 2030, with 69 million people gaining access to healthcare in 2025.
Pathlock Partners with NTT DATA Business Solutions to Deliver Managed SAP Cybersecurity Services Worldwide
/PRNewswire/ -- Pathlock, a leader in Identity and Access Governance and ERP Security, today announced a global strategic partnership with NTT DATA Business...
Orlando Health Lakeland to bring more than 1,000 jobs to Polk County
Hospital leaders say every new hire brings them one step closer to expanding healthcare access for Polk County.
Trump insists U.S. will not invest money in Iran as part of peace deal
Others in the president's circles, including Vice President JD Vance, have suggested Tehran could gain access to a major investment fund if it upholds its side of the peace accord.
David Vaughan: Expanding Credit Access Strengthens SC's Small Businesses
"This new proposal will help further President Trump’s goal of improving the cost of living..."
These forward-looking, early-stage businesses are already standing out
The World Changing Ideas On the Rise honorees are tackling issues like accessibility, climate change, and more.
United States Announces U.S. Government Members of the U.S.-Uzbekistan Business and Investment Council
United States Announces U.S. Government Members of the U.S.-Uzbekistan Business and Investment Council Press Release June 16, 2026 Today, at the fifth annual Tashkent International Investment Forum (TIIF 2026), the United States announced the following inaugural members of the U.S.-Uzbekistan Business and Investment Council: U.S. International Development Finance Corporation (DFC) Vice President Bethany Aquilina Brez Export-Import Bank of the United States (EXIM) Senior Vice President Sarah Witten Assistant Secretary of Commerce, David Fogel Assistant Secretary of State for Economic, Energy, and Business Affairs, Caleb Orr U.S. Ambassador to Uzbekistan, Jonathan Henick Launched in Washington, D.C., in April 2026, the U.S.-Uzbekistan Business and Investment Council serves as the premier bilateral platform to accelerate trade and catalyze private sector investment between the United States and Uzbekistan. The Council is Co-Chaired by Special Envoy for South and Central Asia, Ambassador Sergio Gor and Saida Mirziyoyeva, Head of the Administration of the President of the Republic of Uzbekistan. The Council gives American businesses direct access to U.S. government financing, trade promotion, and market development tools to execute large-scale projects in Uzbekistan. Uzbekistan holds significant reserves of critical minerals essential to U.S. technology, defense, and energy sectors. The Council provides a direct mechanism to advance U.S. access to these resources through transparent, mutually beneficial partnerships. Through their participation, the American members of the Council will deepen the institutional framework for American commercial engagement in Uzbekistan.
Rural Health Challenges and Opportunities for Transformation
Understanding the needs of rural communities and how Massachusetts can support better health, access, and care.
Siri AI in iOS 27: Features, Requirements, and How It Works
The biggest change in iOS 27 is Apple's total overhaul of Siri, with Siri turning into Siri AI. Apple delivered on the features originally promised at WWDC 2024 and added new capabilities that turn Siri into a viable competitor to chatbots like Claude and ChatGPT. Siri AI is available in the iOS 27 beta, but everyone will get access this fall. Below, we walk through everything new you can expect from Siri.
Do Michigan parents have a right to see everything in kids’ medical records?
In Michigan, parents may face limited access to certain medical records, such as substance abuse treatment, as their children get older. State Rep. Joe Aragona, R-Clinton Township, would change that.
Fluorescent nanosensor enables rapid, first-of-its-kind detection of key gut health biomarker
Researchers developed an optical nanosensor to rapidly detect a key gut biomarker, enabling faster, accessible screening for conditions such as inflammatory bowel disease, Type 2 diabetes, and liver disease.
"Three Women and Me" Launches a Bold New Health Media Platform Designed to Change the Conversation Around Women's Health and the Issues Families Face Every Day
Award-Winning Producer Charles Mattocks and Bionic Bloom's own Dr Angela Fisher- Join Heather Reilly Hiemstra, Dr. Jenny Vaughn-Curtman, and Dr. Cathleen Gerenger, for a Powerful New Television Series and Podcast Featuring World-Renowned Experts, ...
Indian Health Service payment delays are limiting dental care for Native American patients
Some clinics outside Richmond say they have waited months for reimbursement, forcing patients to switch providers or lose access to routine dental care.
New Monroe County mental health office director appointed
Melissa Armstrong was previously program director of Rochester Regional Health's Behavioral Health Access and Crisis Center.
First Plain Language Summary of Publication in veterinary science
Taylor & Francis has announced the publication of the first Plain Language Summary of Publication (PLSP) in veterinary research, a milestone in making discoveries in animal health more accessible, engaging ...
Fort Leavenworth AFWC relocation supports greater access to preventive health services
The Fort Leavenworth Armed Forces Wellness Center will temporarily close June 19 as the program relocates to a new location on post within Munson Army Health Center. The center is scheduled to reopen June 29.
Paranovus Entertainment Technology Limited Signs Non-Binding Letter of Intent to Acquire Jabanero Inc.
NEW YORK, NY / ACCESS Newswire / June 15, 2026 / Paranovus Entertainment Technology Ltd. (NASDAQ:PAVS) ("PAVS" or the "Company"), a consumer products and digital commerce solutions company, today announced that it has entered into a non-binding Letter ...
'All or Nothing: Manchester United' documentary coming to Prime Video in 2027
Prime Video's access-all-areas docuseries will follow the Premier League's most successful club through a transformative 2026/27 season.
North Canyon Medical Center and All Access Hosted by Andy Garcia Highlight Rural Healthcare Infrastructure and Advanced Robotics
As rural medical facilities face increasing operational challenges, North Canyon Medical Center joins the award-winning series, "All Access Hosted by Andy Garcia," to explore how technical innovation and organizational agility stabilize local economies and healthcare access.
Mind, Body, Soul: Self-Care Is Health care Community Health Day
Ethan Temple Seventh-day Adventist Church invites residents throughout the Miami Valley and surrounding communities to attend its “Mind, Body, Soul: Self-Care Is Healthcare: Community Health Day” on Saturday, July 25, 2026, at Ethan Temple SDA Church, 4000 Shiloh Springs Road, Clayton, Ohio 45315.The free community event is designed to promote holistic wellness by addressing physical, mental, emotional, and spiritual health while connecting individuals and families with valuable healthcare and community resources.The day opens with Morning Worship at 11:00 a.m., featuring guest speaker Alberta Scruggs, a licensed registered dietitian and nutritionist, who will share practical guidance on nutrition, self-care, and healthy living. Following the service, attendees will enjoy refreshments and a light lunch before taking part in the afternoon's health screenings, community resource fair, and wellness-focused activities.From 2:00 p.m. to 5:00 p.m., attendees will have access to free health screenings provided through a partnership with Premier Health, along with information and resources from local health and human service organizations.A Community Health Fair from 2:00 p.m. to 3:30 p.m. will feature representatives from several organizations such as Black Women’s Health Initiative, CareSource, and many more.Recognizing the growing importance of emotional wellness, the event will also feature a Mental Health Panel Discussion from 3:30 p.m. to 5:30 p.m. led by respected professionals in behavioral health and counseling. The panel will provide an opportunity for open conversation, education, and community engagement around mental health awareness, treatment, and support.In addition to health services and educational opportunities, attendees will receive complimentary lunch bags while supplies last, and school supplies will be distributed to students and families while supplies last.The Community Health Day is open to the public and free of charge. No registration is required.
A new generation of public health students
Public health is often associated with hospitals, disease outbreaks and government agencies. But health also is shaped by architecture — by sidewalks, green space, accessible design and the environments people move through every day. Teddy Basa, a rising junior at Washington University in St. Louis, is seeking to better understand those connections. Basa arrived at […]
Campaign Early Access Now Included in Modern Warfare 4 PS5 Pre-Orders
Play one week early from 16th October
Is SMIC N+3’s Metal Pitch Smaller than Intel 18A’s?
Almost four years ago, we published that SMIC had started shipping 7 nm (N+1) chips. Now, SMIC is shipping its third-generation 7 nm (N+3) process in Huawei’s Kirin 9030, with a minimum metal pitch of 32.5 nm, about 10% tighter than the 36 nm minimum metal pitch shipping in Intel’s latest Panther Lake CPUs on 18A. The headline is true, but incomplete cherry picked metric. N+3 reaches the density of TSMC N6 through aggressive DUV multi-patterning and design-technology co-optimization (DTCO), but it pays for that in complexity, efficiency and process control. We found this and more in our reverse engineering and teardown where we cover SMIC’s N3 process technology, Huawei’s packaging, memory, architecture, and more. SemiAnalysis has been building a state-of-the-art teardown lab in Oregon capable of analyzing the world’s most advanced and important chips over the last year and half. We have already generated revenue on advanced datacenter chip teardowns including our recent reverse engineering of a major TSMC customer’s COUPE CPO optical engine + EIC 3D stack. This is the first public report from the SemiAnalysis Teardown Engineering & Evaluation Lab, or STEEL for short. The lab is aggressively scaling up and out and we’re excited to announce it publicly. This is a bit of inconvenient timing for TechInsights as they are private equity owned and currently being sold while having enjoyed virtually no credible competition for decades. This has led to TechInsights underinvesting in CAPEX. SemiAnalysis exceeds TechInsights in revenue despite no venture or private equity ownership and being founded only 6 years ago. Because we have no external investors and are founder led, we move faster, build faster, and we can release client chip teardowns for free regularly, while focusing on datacenter for our major clients. Here’s the first public image from our lab, the HiSilicon Kirin 9030 Pro SoC: This report will detail our teardown of the Kirin 9030 and our findings on SMIC’s N+3 process, the most advanced in China. For comparison, we’ll show our teardown of the MediaTek Helio G99, made on TSMC N6. Through this comparison, we can look at the effect of export controls – SMIC N+3 and TSMC N6 are comparable nodes, but one is heavily export-controlled, the other free to use the West’s most advanced equipment. Here we see both China’s progress and constraints. SMIC N+3 reaches TSMC N6-class logic density, but it requires far more aggressive DUV multi-patterning, so it does not match N6 on process maturity or cost. The Kirin 9030 Pro performs similarly to three-year-old Android flagships, and trails far behind the current flagship SoCs from Apple, Qualcomm, MediaTek, and Samsung. The efficiency gap is even wider. Export controls have not stopped Huawei and SMIC from shipping advanced silicon, but they have forced a different path. Without EUV, SMIC is leaning harder on DUV multi-patterning, DTCO, and increasingly complex integration. The roadmap continues forward through tighter design rules and backside power, but each step adds cost and process risk. Huawei’s τ scaling and LogicFolding show another path: stacking active logic and recovering density through advanced packaging and system-technology co-optimization (STCO). To understand the Kirin 9030, we must first understand Huawei’s SoC history. HiSilicon is Huawei’s chip design arm, responsible for the Kirin smartphone SoCs, Kunpeng server CPUs, Ascend AI accelerators, and switch/router networking silicon. Before export controls, Huawei was TSMC’s largest customer – the only customer on TSMC’s first EUV node, N7+, and among the first on N5, alongside Apple. That ended in late 2020. Huawei switched to Qualcomm SoCs in its flagship smartphones, though export controls limited them to 4G-only variants. In late 2023, Huawei returned to in-house silicon with the Kirin 9000s, a successor to the Kirin 9000, fabricated on SMIC N+2 instead of TSMC N5. In the following years, they released the Kirin 9010 and 9020 on the same N+2 process. These chips used Huawei’s in-house TaiShan CPU cores and Maleoon GPU. We have not torn down a Kirin 9020 ourselves, so the predecessor die shot is from Kurnal. The die shots show how Huawei spent its silicon budget: which functional blocks are where, and how their areas compare to the predecessor. First, a quick guide to the major blocks on the die. The total die area is nearly identical, but the 9030 uses that area more aggressively. A denser process lets Huawei fit an extra middle CPU core, more GPU and NPU cores, and larger caches into the same footprint. In contrast, the Helio G99 is a much smaller, low-cost SoC, built for budget smartphones rather than a flagship device. While the Kirin 9030 is ~140 mm², the G99 is only ~29 mm², roughly one-fifth the area. The underlying TSMC process technology, however, is directly comparable as a baseline for analyzing SMIC’s. The Kirin 9030 is an evolutionary refresh, not a clean-sheet design. Its CPU, GPU and NPU cores carry over the 9020’s families, and the gains come from three levers: the SMIC N+2-to-N+3 process step, DTCO and floorplan work, and incremental microarchitecture. Area is where the first two show up, and the 9030 scales well here. Performance and efficiency are the harder test. Huawei’s design holds up better than its node would suggest, but the chip still trails, both because N+3 sits behind the leading-edge nodes and because its cores, while competent, remain a few generations behind the newest designs. The new prime core is an incremental update. The main changes are a 10% frequency increase from 2.5 GHz to 2.75 GHz and a doubling in the L2 cache from 1 MiB to 2 MiB. Despite the increased cache, the core size decreased by 7.6%. Excluding the private L2 cache, the core size decreased by 21%. This is a large reduction for an incremental node. Compared with the TaiShan New V120 core in the Kirin 9020, the Kirin 9030’s middle core is almost unchanged architecturally, yet each core shrinks by ~22%. Most of that comes from the move from N+2 to N+3, with layout likely accounting for the rest. Visually, the most noticeable change is the increase from 3 middle cores to 4. There is also a 20% increase in the shared L3 cache of the big cluster. This helps to improve multi-core performance without sacrificing much in terms of area. Even with each core shrinking, the big CPU cluster’s total area is essentially unchanged. The per-core savings went back into an additional middle core and larger caches. The tiny cores shrank less than the prime core (excluding its L2 cache) and less than the middle cores. This is likely because fixed overhead is a larger share on a small core. We cannot resolve any architectural changes from the die shot alone, but the per-clock and efficiency gains shown below point to more than pure process and layout scaling. The area reduction was offset by a doubling of the shared L2 cache from 2 MiB to 4 MiB, leaving the total tiny CPU cluster area slightly larger. Area is the easiest improvement to see from a die shot, but it is only one part of PPA (power, performance, area). For modern logic, power and performance matter just as much, and often more. Since Dennard scaling broke down in the mid-2000s, voltage and frequency have not scaled in step with transistor dimensions, so each node has had to fight harder for gains in performance and efficiency. The starkest comparison is not Kirin 9020 versus Kirin 9030 Pro. Apple’s efficiency cores run circles around Huawei’s prime core. Apple’s low-power core delivers 20% higher integer performance while drawing only 1 W, compared with 4.5 W for Huawei’s prime core. N+3 matches TSMC N6, but N6 is several generations old. Apple and Qualcomm build on N4 and N3P, which are denser and sit on a better voltage-frequency curve, giving them a larger transistor budget and more performance per watt. The 9030’s own cores did improve. The middle and tiny cores gained 17% and 14% in per-clock integer performance over the 9020, with floating-point flat on the middle core and up 11% on the tiny. The tiny core improves cleanly, with performance rising while power falls and efficiency increases by 45% in integer and 24% in floating point. The middle core is mixed: integer performance rises but power rises faster, cutting integer efficiency by 7%, while lower power lifts floating-point efficiency 16%. Per-clock gains at the same or lower frequency are microarchitectural, so the cores are tuned, not just shrunk. Both also failed to hold their rated maximum frequencies, pointing to thermal, power, or stability limits. Per clock, the middle core sits around Arm Cortex-A720 and the tiny core near the Cortex-A520; absolute performance trails because Huawei clocks them much lower. The prime core is roughly Cortex-X2 class per clock, a 2021 design. Apple’s 2020 M1 Firestorm core is still 35% higher per clock and 57% faster in absolute integer performance at a similar 4.5 W. The current leading edge is further ahead again: the Apple M5 P-core is 60% higher per clock and 2.7× faster, the Arm C1 Ultra 45% higher and 2× faster. Matching older high-end cores per clock is a genuine design achievement. What Huawei cannot match is the voltage-frequency curve and transistor budget of leading-edge nodes, which let Apple, Qualcomm and others spend more transistors in the same area on wider cores, larger caches and deeper buffers while running at lower voltage. Huawei’s LogicFolding roadmap is one answer, stacking active logic to recover density and shorten signal paths. We return to it later. The GPU compute units (CUs) changed more visibly than the CPU cores, moving to a more rectangular layout for both the arithmetic logic unit (ALU) clusters and the CU overall. Even with ray-tracing support added, a CU shrank ~28%. However, that shrink is offset by the increase from 4 to 6 CUs and the area outside the CUs grew 33%. Overall, the GPU cluster is larger by ~10%. The GPU is where Huawei makes its biggest gains. The Maleoon 935 is not competitive with current flagships, but it is a large step up from the 920 and reaches older-flagship territory. In 3DMark it is 70% faster in Wild Life Extreme (WLE) and 79% faster in Steel Nomad Light (SNL) than the 920; with 11% higher clocks and 50% more CUs, the ~67% theoretical uplift roughly matches WLE and is beaten by SNL. It edges ahead of the Snapdragon 8+ Gen 1 in WLE and SNL, and the Dimensity 9200 and Apple A16 in WLE, but stays far behind newer parts: the Snapdragon 8 Elite Gen 5 and Dimensity 9500 are ~2.4–2.6× faster in WLE and ~3.2× faster in SNL. The Maleoon 935 is Huawei’s first GPU with hardware-accelerated ray tracing; there it lands slightly ahead of the Exynos 2200, and on par with the Apple A16, with current flagships up to 3.7× faster. The Neural Processing Unit (NPU) saw the largest structural changes of any block, moving from a Lite and a Tiny core in the Kirin 9020 to a Lite and two Tiny cores in the Kirin 9030. Both core types also show significant layout changes. This is a reversal in Huawei’s NPU design. The Kirin 9000 5G, its last flagship chip on TSMC N5, used two Lite and one Tiny core. The series of SoCs on SMIC N+2 moved to one Lite and one Tiny core, likely for area savings. With the Kirin 9030, Huawei has shifted back toward a larger multi-core NPU cluster, but with the additional area going to a Tiny core rather than a Lite core. We’re diving deep into the most advanced datacenter and AI hardware hitting the market. To learn more about what’s in the pipeline or to commission a custom teardown, contact sales@semianalysis.com. Interested in joining us on this ride and think you can be a difference maker? Check out our Careers page. Before diving into the process stack, the package and memory are worth separating from the SoC itself. The Pro variant of the Kirin 9030 carries 12 GB of Samsung DRAM, with two stacks of four dies each. The dies were identified as the K4L2E165YD, a 12 Gb LPDDR5X-9600 device fabricated on Samsung’s 1a node, the fourth generation of its 10 nm-class DRAM after 1x, 1y and 1z. 1a has shipped in volume since 2022, so this is current memory rather than older-node inventory. The 16 GB Pro Max variants we obtained were found with both CXMT and Samsung packages. The CXMT package is marked CXDD7JEDM, with two stacks of four dies, packaged in week 45 of 2025. The inferred die dimensions from X-ray computed tomography (CT) are consistent with a known density of ~0.3 Gib/mm² for the CXMT G4 process, roughly equivalent to other manufacturers’ 1z processes. The Kirin 9030 uses a typical integrated package-on-package (iPoP) stack: multiple DRAM dies in a memory package sit above an organic redistribution layer (RDL) interposer, which sits above the SoC and package substrate. The full package is then mounted to the printed circuit board (PCB) through ball-grid array (BGA) solder bumps. The memory package substrate is a thin bismaleimide-triazine (BT) laminate carrying the LPDDR5X stack. The organic RDL interposer over the SoC routes the PoP signals around the die and carries possible dummy thermal copper pillars. The package substrate, a thicker Ajinomoto Build-up Film (ABF) build-up over a BT core, fans the flip-chip bumps out to BGA pitch and embeds the power planes. The whole stack is organic. The only silicon is the SoC and the LPDDR5X dies; there is no silicon interposer. Keeping it all-organic brings the package’s coefficient of thermal expansion (CTE) close to the PCB’s, reducing board-level warpage, and avoids the cost of a silicon interposer the SoC’s bandwidth does not need. In an iPoP stack, the memory package connects to the organic RDL interposer through an array of solder bumps. Underfill fills the gap around those bumps, adding stiffness and protecting the joints from mechanical stress. The Pro and Pro Max variants differ here, which we cover behind the paywall. The die shot and architecture tell us how Huawei allocated its silicon budget. The process tells us what SMIC can manufacture. We use the Helio G99 as the process reference for TSMC N6. Both SMIC N+3 and TSMC N6 are evolutions of previous 7 nm-class nodes. We used targeted TEM cross-sections through logic and memory regions, imaged in both fin-cut and gate-cut directions. Each cross-section caption gives its horizontal field width (HFW), the real width of the imaged area. We start at the transistor fins, then move up through standard cells, local interconnect, and SRAM. SMIC has not overtaken Intel or TSMC. It uses aggressive DUV scaling and DTCO to reach N6-class density, but that density doesn’t translate into comparable performance and efficiency, for two reasons: the node gap to leading-edge nodes, and Huawei’s core designs. Fin Profile One of the most important knobs in a FinFET process is the fin profile: the shape of an individual fin and the channel where current passes from source to drain. The ideal fin is tall, narrow, and nearly vertical. A taller fin increases effective channel width, while a narrower fin improves electrostatic control by thinning the body the gate must control. Push either too far, and the process pays for it: weaker drive current, fragile fins, taper, footing and line-edge variation that hit yield and device variability. The Intel 22 nm, 14 nm, and 10 nm fin cross-sections show how FinFET nodes have improved over time. 22 nm fins were a first-generation structure, relatively short, wide and strongly tapered. The shape limits current density and reduces gate control uniformity across the height of the fin. At 14 nm and 10 nm, Intel pushed the fins taller and narrower while also making the sidewalls more vertical. Rather than shrinking the device, these changes increase the effective channel width per fin and improve electrostatic control. The trade-off is that taller fins at tighter pitches are much more difficult to manufacture. Now, let’s compare the Helio G99 on TSMC N6 with the Kirin 9030 on SMIC N+3. Both processes are in the same class, with fin pitch of 30-32 nm on N+3 and 34 nm in our N6 cross-section. The pitch for N6 is especially interesting as N7’s HD library is generally listed with a 33 nm fin pitch, and N6 did not shrink pitches directly. Its density gains came from DTCO instead of tighter pitches. The 34 nm pitch was stable across our sampled region and serves more as a comparison against the SMIC N+3 we have not investigated further. Pinning down N+3’s fin patterning scheme takes more than one core unit. The CPU cores show a dense ~32 nm pitch, with the pitch between N-P fin pairs alternating between 78 and 88 nm. Logic alone may be consistent with dual-pitch mandrels of 120 and 110 nm, but this is a complex and unusual approach. Combining the pitch from the the 8T SRAM, which has more complex repeat unit, with the CPU core sequence allows us to reverse engineer the patterning steps with more confidence. As both the logic and SRAM should share the same base grid, a single CD mandrel lithography pattern with 128 nm pitch undergoing SAQP produces a die-wide ~32 nm grid (128 nm/4), which supports the pitch sequencing seen in both logic and SRAM cells. In the sampled cross-sections, N+3 shows a taller, narrower, higher-aspect-ratio fin than N6. The measured fin aspect ratio is ~9.5:1 on N+3 versus 7.8:1 on N6. N+3 also shows less top rounding, with an estimated radius of ~2 nm, compared with 2.8 nm on N6. Even though the fin widths differ, the ratio of top rounding to fin width tells the same story, with N+3 at 0.37 and N6 at 0.44. In a geometric sense, lower is better; a perfectly rectangular fin would have no top-rounding penalty. These are single-digit-nanometer features measured from a handful of cuts, so treat the absolute numbers as approximate. The important result is the relative gap: N+3’s fins are consistently taller, narrower and less rounded than N6’s. We’re diving deep into the most advanced datacenter and AI hardware hitting the market. To learn more about what’s in the pipeline or to commission a custom teardown, contact sales@semianalysis.com. Interested in joining us on this ride and think you can be a difference maker? Check out our Careers page. Standard Cell A standard cell is the basic building block of chip layout: a fixed-height row pairing one NMOS and one PMOS transistor that share a gate, tiled in a grid to build logic blocks. The key dimensions are contacted gate pitch (CGP), cell height (CH), fin count, and the lower-metal routing grid. To measure density, we use the Bohr metric: a weighted average of NAND2 gate area (60%) and scan flip-flop area (40%). This represents a realistic mix of combinational and sequential logic. This metric has its limitations, especially for complex cell layouts like TSMC’s FinFLEX, which alternates cells with different fin counts. Even so, it is the best metric for a pure process-level comparison. Another important measurement is the fin pitch; it refers to the distance between two fins of the same transistor. In a FinFET process, multiple fins are used in each transistor to increase the drive current and thus performance. TSMC N6 ships both a high-density (HD) library with 2 PMOS and 2 NMOS fins per cell, and a high-performance (HP) library with 3 of each. More fins under the shared gate mean more effective channel width. HP cells switch harder at the cost of area. Designers mix the two on a die, primarily spending HP cells on timing-critical paths, and matching their PPA targets. In the Cortex-A55 core of the Helio G99, we found a cell height of 240 nm for the HD cell. MediaTek has used HD cells in the G99 to minimize die size and thus cost. As an SoC for budget smartphones at ~$100, this is essential. By contrast, we found only one library in the Kirin 9030, with 2 NMOS and 2 PMOS fins. This suggests a narrower library strategy than TSMC N6, where both HD and HP libraries are widely used. This likely reflects the smaller customer base and the more constrained domestic design and electronic design automation (EDA) ecosystem. In all three CPU cores of the Kirin 9030, we found cell heights of 228 nm, 5% smaller than on N6. This is also a reduction of 9.5% over SMIC N+2’s cell height of 252 nm. SMIC N+3 and TSMC N6’s HD library both feature a CGP of 57 nm. For SMIC, this is a 9.5% shrink over N+2. In the past, CGP and cell height alone may have been enough to compare transistor density. Now, however, we must consider scaling boosters and DTCO as well. SMIC’s density gain does not come from EUV. It comes from using every available DTCO booster aggressively. First is fin depopulation: reducing the number of NMOS and PMOS fins in each cell. The first FinFET nodes started with 3 or 4 fins for each transistor. SMIC N+3 and TSMC N6 HD both use only 2 fins per transistor, trading drive strength for density. Next is contact over active gate (COAG). By landing the gate contact directly over the active gate, instead of out over the isolation region, the cell height drops. N+3 integrates COAG while N6 does not. Our N+3 gate-cut cross-sections indicate COAG, with the gate contact sitting over the active region, while N6 shows an off-gate contact. Last is single diffusion break (SDB). Diffusion breaks are inserted between cells in the same row to provide electrical isolation, but they also introduce local layout effects (LLE), layout-dependent shifts in electrical characteristics. In the past, a double diffusion break was used, consuming the space of two CGPs. SMIC N+3 and TSMC N6 instead use SDB, saving area but increasing LLE sensitivity. This must be controlled at the process level and accurately modeled in the process design kit (PDK) so that EDA tools can account for it. Overall, SMIC N+3 has a transistor density of 113.4 MTr/mm², slightly above TSMC N6 at 107.7 MTr/mm². Even without EUV, SMIC has achieved density beyond TSMC’s mature N6 node which utilizes EUV. Metal Stack The smallest critical dimension in the teardown is M0; SMIC N+3 uses a 32.5 nm local metal pitch. That is smaller than the 36 nm M0 pitch on Intel 18A in Panther Lake. However, this does not mean that SMIC has a better process than Intel 18A or TSMC N3P. M0 is a local intra-cell routing layer. Its usefulness depends on the full interconnect stack: M1 and M2 pitch, track count, via and line resistance, design rules, mask count, overlay control, and routing flexibility. The 32.5 nm M0 is consistent with self-aligned quadruple patterning (SAQP), whose four-population line-width loading we read coarsely as alternating widths of 21.5 to 24 nm; M1 and M2, at 38 and 40 nm, are consistent with self-aligned double patterning (SADP), a single A/B split. On TSMC N6, M0, M2, and M3 sit at a relaxed ~40 nm and are consistent with SADP-class double patterning, with no need for quadruple patterning. That said, we measure M2 for example at ~43 nm, likely inflated by sparse routing. We do not assign any specific layer to EUV from our cross-sections; the distinction we can draw is double versus quadruple patterning, not lithography wavelength. Transistor-level density in the front-end-of-line (FEOL) sets an upper bound, but the design is ultimately limited by what the interconnect stack can route. The lowest metals are the most important for standard-cell density, but the semi-global and global layers determine how usable that density is at the block and chip level. Two axes are commonly used for chip cross-sections: the fin-cut and the gate-cut. The micrograph above is a fin-cut and shows metals 0 through 3. This axis lets us see the even-numbered metals, with M0 right above the fins. There are two kinds of M0 lines. The first are the power rails; these are wide wires for the VDD and VSS running horizontally at the top and bottom edges of each standard cell. The wide wires measure 55 nm across, more than double the other M0 lines. Their width minimizes resistance and reduces IR drop. The second kind are intra-cell wires, short segments within the cell that connect terminals to M1. These have alternating widths between 21.5 and 24 nm. The M0 pitch is 32.5 nm, a 19% reduction versus N+2 and N6. At this pitch, DUV patterning requires more aggressive multi-patterning, increasing mask count, overlay sensitivity, process complexity and cost. M0 is below what a single DUV-defined spacer (SADP) can resolve, so SMIC cascades a second spacer step (SAQP). The cross-section reflects the cost: the M0 trenches are visibly more re-entrant (narrower at the bottom than the top) than M1 or M2 on the same chip and carry a bright barrier-rich foot where the trench meets the etch-stop layer. That shape is partly the intended damascene profile, as a slightly narrow bottom helps void-free copper fill, but its magnitude at M0 is driven by the tight pitch and the higher trench aspect ratio. Intel 18A supports an M0 pitch of 32 nm, although Panther Lake has only shipped with a looser 36 nm pitch. This is due to Intel’s heavy usage of HP libraries. Among leading-edge nodes, 18A has the loosest M0 pitches due to PowerVia. With power routing moving to the backside, congestion is reduced, and the entire front-side metal stack can be used for signal routing. M2 is the first true inter-cell routing layer. It runs horizontally like M0 but spans across multiple cells to carry block-level signals. The M2 pitch sets the cell’s track height – the number of M2 tracks that fit between the VDD and VSS rails, defining what the library calls a 6-track or 7.5-track cell. This layer is the most important, limiting the routing of entire blocks. SMIC N+3 features a 5.7-track cell. The M2 pitch is 40 nm, a 5% decrease over N+2 and the same as N6. This shrink keeps the pitch at the edge of what is possible with double patterning. Future nodes will need to increase the number of masks for M2 as reducing the number of tracks is much harder due to the limitations in routing. The micrograph above is in the perpendicular direction, the gate-cut, and shows metals 0 through 4. This allows us to see and measure the odd-numbered vertical metal layers. The M1 pitch is 38 nm, 9.5% less than N+2 and 33% less than N6. The M1-to-gate ratio matters because it sets local routing flexibility. N+2 and N+3 use a 3:2 ratio, while N6 uses a 1:1 ratio, explaining the huge differences in M1 pitch. The more M1 lines there are compared with the gates, the more flexibility there is for power and signal crossing within the cell. Routing flexibility enables more complex and better cells. Clean fractional ratios are also preferred as a grid is periodic and improves layouts. The 3:2 ratio gives SMIC more local routing flexibility than a strict 1:1 grid, but it also complicates layout and patterning. This is a DTCO choice, with SMIC increasing process complexity to recover density and routability without EUV. This 3:2 ratio is not very popular in the leading-edge nodes. TSMC has only used it on N7+, the N5 family, and the short-lived N3(B). They have switched back to a 1:1 ratio for N3E. Intel has only used it on the 10 nm/Intel 7 family, with Intel 4, 3 and 18A all using a 1:1 ratio. Samsung is the only one still using a 3:2 ratio at the leading edge, using it in the SF4 and SF3 families. It remains to be seen if SMIC will remain at a 3:2 ratio or move to a 1:1 ratio with its future nodes. The industry is still actively exploring these local-routing ratios. At VLSI 2026, imec will be presenting work on even higher ratios, including a 2:1 scheme that can reduce area by up to 14%. We will be covering the conference in a future newsletter article. Subscribe We’re diving deep into the most advanced datacenter and AI hardware hitting the market. To learn more about what’s in the pipeline or to commission a custom teardown, contact sales@semianalysis.com. Interested in joining us on this ride and think you can be a difference maker? Check out our Careers page. The final local interconnect layer for N+3 is M3, with a pitch of 44 nm. The M3 pitch is the same as on N+2 and 10% larger than on N6. The semi-global layers carry the majority of block-level signal routing. They have a coarser pitch than the lower local layers. On leading-edge nodes, they are designed to sit at the limit of DUV single patterning. M4 through M11 pitches were found divided between 80–82 nm (M4–M6), 128 nm (M7–M10), and 148 nm (M11). Given limited sampling, it is possible these are divided further in dense routing areas. At the top are two giant metal layers, M12 and M13. These have kept the same pitches as N+2 at 1920 nm and 4600 nm respectively. While the lower layers’ pitches are generally fixed by the process and library, the upper layers vary much more in pitch and count, depending on the design. Even two smartphone SoCs on the same process can have wildly different metal stacks. The Helio G99 carries fewer routing layers, reaching coarse metal pitches of 850 nm by M9, while the larger and higher-performance Kirin 9030 keeps fine pitches until M11. SRAM At the leading edge, SRAM is much more difficult to scale than logic. TSMC’s latest nodes have seen little to no bitcell scaling, while logic still has more DTCO levers to pull. While looking for other logic libraries in the GPU compute units, we stumbled upon the SRAM. The most common type of SRAM has 6 transistors (6T), but this cell had 8 transistors (8T) instead. 8T SRAM adds two transistors to form a dedicated read port. Unlike a 6T cell, where reading disturbs the storage, the decoupled read port removes read-disturb, improving read stability and letting the cell be pushed harder for performance. At first glance, the cut looked like an unusual logic library, with each cell row having 3 fins of one polarity and 5 fins of another. The rows also alternated in orientation. Energy-dispersive X-ray spectroscopy (EDS) resolved our confusion. The cut had not landed on the GPU logic, but on the SRAM macro beside it. The unusual fin pattern was due to the SRAM library. We return to EDS in the process flow analysis behind the paywall. SRAM libraries are not like traditional logic libraries. Due to the unequal number of PMOS and NMOS transistors, they require specialized rules and layout libraries. They do not need the flexibility of logic libraries, so they are hyper-optimized for one purpose: dense, reliable memory. The SRAM cell we found is a 1:2:2-2:2 cell. This means there is 1 fin per pull-up (PU) PMOS transistor, and 2 fins per pull-down (PD) and pass-gate (PG) NMOS transistor. These 2 PU, 2 PD and 2 PG transistors would usually form a single 6T high-current cell (HCC). An 8T HCC adds a read-pull-down (RPD) and a read-pass-gate (RPG) NMOS transistor, each with two fins. We measured a cell height of 406 nm, which brings the bitcell size to 0.0463 µm². That is a theoretical peak density of 21.6 Mib/mm². We estimate that a 6T HCC would have a cell height of 292 nm and a size of 0.0337 µm². This is ~12% larger than a 6T HCC on Intel 3 and 4. We also estimate the 6T high-density cell (HDC) to have a cell height of 228 nm and a size of 0.0260 µm². This is coincidentally the same as the logic standard-cell height measured earlier. The estimate puts the cell near Samsung 7LPP/5LPP and slightly below TSMC N7/N6. That is a theoretical peak density of 38.5 Mib/mm². 6T HDC is arguably the most important cell as it is used for the largest caches in a chip, the L3 caches and system-level cache (SLC). Both the Kirin 9020 and 9030 have split the SLC into 4 banks to raise total SLC bandwidth. In the Kirin 9030, the SLC increased from 2 MiB to 3 MiB per bank. Correspondingly, the number of arrays within the bank also increased by 50%, from 16 to 24. Each array can store 128 KiB and forms an orderly pattern on the die shot. From the Kirin 9020 to the Kirin 9030, the area of a 128 KiB SLC array decreased from 0.0477 mm² to 0.0392 mm², an 18% shrink. The achieved density is 25.5 Mib/mm², 66% of the theoretical maximum. While the SLC was quite similar across both chips, the L3 has seen some major changes, particularly in terms of its layout. The total capacity also went up from 10 MiB to 12 MiB. Much like the SLC, the L3 is also split into 4 banks. In the Kirin 9020, an L3 bank consisted of 16× 128 KiB arrays and 16× 32 KiB arrays. However, an L3 bank in the Kirin 9030 instead consists of 48× 64 KiB arrays. In the Kirin 9020 L3, a 128 KiB array was 0.0513 mm² and a 32 KiB array was 0.0154 mm². The size of the 128 KiB array is different on the L3 and SLC as the assist circuitry for the two arrays differs depending on their purpose. In the Kirin 9030 L3, a 64 KiB array is 0.0210 mm². Although not a like-for-like comparison, normalized for capacity, it is 18% smaller than the 9020’s 128 KiB L3 array and 31% smaller than its 32 KiB L3 array. The achieved density is slightly lower than the SLC, at 23.8 Mib/mm², 62% of the theoretical maximum. Unlike the L3 and SLC, the prime cores’ private L2 cache uses a 2-bank design. As the prime cores’ L2 is latency-critical, it likely uses 6T HCC instead of 6T HDC. The 9020 has 16 arrays in each bank while the 9030 has 32. Each array has a capacity of 32 KiB. A 32 KiB array in the L2 shrank from 0.0171 mm² to 0.0142 mm², ~17% smaller. The density is 17.6 Mib/mm², ~59% of the theoretical maximum for 6T HCC. SRAM scaled well from N+2 to N+3, shrinking by ~19%, close to the theoretical logic shrink. The caveat is that N+2’s bitcells were unusually large, bigger than comparable 7 nm-class nodes, so part of the gain is catch-up rather than true scaling. With the insights from STEEL’s teardowns, we will be doing a deep dive into SRAM in a future newsletter article. Subscribe Everything above came out of a single STEEL teardown: die annotation, block-level area analysis and TEM cross-sections through logic and SRAM. We’re diving deep into the most advanced datacenter and AI hardware hitting the market. To learn more about what’s in the pipeline or to commission a custom teardown, contact sales@semianalysis.com. Future Roadmap The same cross-sections that pin down N+3 also show where SMIC can go next. Although N+3 is already close to the practical limits of DUV multi-patterning in several layers, SMIC still has a few scaling levers left. A theoretical N+4 would likely start with cell height. N+3 uses 5 M0 tracks between its power rails. Moving to 4 M0 tracks, as on SMIC N+2 and TSMC N6, could reduce cell height by roughly 15%. The routing grid is only one side of the shrink; the front end also must fit into the smaller cell. One possible FEOL lever is reducing the p-to-n isolation spacing from two diffusion grid units to one. Intel used this scaling booster on Intel 4, and TSMC did so on its N3 family. This path trades layout flexibility for density. Fewer M0 tracks reduce local routing resources, while tighter p-to-n spacing raises integration and design-rule difficulty. M2 is also constrained by the cell height shrink. For SMIC to maintain a ~5.7-track cell, M2 would need to move toward ~35 nm. That would move another layer into SAQP territory. SMIC could also reduce the CGP from 57 nm to 54 nm. Intel reached a similar CGP on Intel 10 nm/Intel 7 without EUV. The local interconnect is also tougher. If SMIC keeps the 3:2 M1-to-gate ratio, M1 would need to shrink to 36 nm and would likely require SAQP as well. If SMIC moves to a 1:1 ratio, M1 could relax to 54 nm, but it would give up routing flexibility. Under this theoretical path, we estimate that SMIC N+4 could reach a cell height of 198 nm and a CGP of 54 nm, implying a Bohr density of 137.8 MTr/mm², on par with TSMC N5 or Samsung SF4. However, the difficulty is cumulative. Each step is individually plausible, but together they make N+4 harder than the transition from N+2 to N+3. It will likely take longer, cost more, and carry less process margin. A theoretical N+5 would require a larger integration shift. One possible path is backside contacts (BSCon), moving power routing and source/drain contacts to the backside, which would reduce front-side routing pressure and enable another reduction in cell height. The front-side metal pitches could relax to reduce the process complexity. M0 would likely relax slightly to ~34 nm, and M2 and M4 pitches could relax further. CGP is unlikely to shrink much further. Even with EUV, 48 nm has been the practical limit for yield and process control. This approach would allow N+5’s cell height to fall to 170 nm and its CGP to 53 nm. This implies a Bohr density of 163.6 MTr/mm², on par with Intel 18A’s HP library. However, this would not make N+5 cost-competitive with the leading edge. It would reach a similar density through a much more expensive route. The integration difficulty rises sharply, with new process flows for backside alignment, wafer thinning, contact reveal, and backside metallization. Past this point, standard density and interconnect scaling become increasingly unattractive. That is where Huawei’s roadmap stops looking like a normal foundry roadmap and starts looking like a packaging roadmap. At ISCAS 2026, Huawei unveiled its tau (τ) scaling law, reframing process scaling in the time domain. τ is the time cost of data movement and processing: switching delays in transistors, RC signal propagation delays in circuits, compute, memory, and networking latency. Outside Huawei’s terminology, this is called system-technology co-optimization. This is Huawei’s answer to its lack of EUV lithography. Without EUV, planar density cannot keep pace with TSMC, Intel, or Samsung. If transistor density cannot shrink further, Huawei’s alternative is to shorten wires, reduce buffering, and stack logic vertically. “LogicFolding”, Huawei’s implementation of this new scaling idea, is, in practice, an aggressive 3D stacking approach. AMD V-Cache places SRAM above or below a CPU die. AMD’s MI350X places active interposer dies (AIDs) underneath accelerator and compute dies (XCDs), with the AIDs handling cache, IO interfaces, the network-on-chip (NoC) and embedded metal-insulator-metal (MIM) capacitors. With LogicFolding, parts of the same logic block are split across multiple active dies bonded face-to-face at ultra-fine pitch. This allows Huawei to shorten some critical paths and reduce buffer overhead, not merely add cache capacity or offload the IO and interconnect. Shortening wires is where the higher clocks come from. A large share of a modern core’s delay and energy budget goes into driving long interconnects and the repeater buffers along them. LogicFolding distributes a block’s critical-path gates across multiple stacked tiers bonded at a very fine pitch, so the bond interface behaves like an additional metal layer and the longest paths get shorter. That is how Huawei expects to recover frequency and efficiency it cannot get from the process alone. Huawei’s roadmap shows its intent. Prime core frequency is targeted to rise from 2.75 GHz in the Kirin 9030 to roughly 5 GHz by 2031, far beyond what planar scaling alone could deliver. Prime cores with 3.1 and 3.39 GHz clocks are being tested in its labs, although their power consumption is unknown. Beyond that, chips are in the design, simulation or pathfinding phase, meaning the frequencies are targets. However, the direction matters more: LogicFolding also helps with performance, not just density. The catch is that Huawei’s density claim is not directly comparable to foundry densities. A stacked design can report more transistors per package footprint by adding active layers, even if each patterned die remains well behind TSMC or Intel in front-end density. This is how Huawei can claim to reach foundry 14A-equivalent density by 2031. This is not a like-for-like foundry comparison, with Huawei using stacked logic and measuring density per package footprint. On a normalized Bohr-density basis, SMIC N+3 is ~114 MTr/mm², 38% less than Intel 18A’s HD library. Huawei’s 3D roadmap closes the gap by stacking active logic, reaching 215 MTr/mm² by 2030. In 2031, the roadmap density jumps to 295 MTr/mm², implying either a third active layer, partial EUV insertion or aggressive planar DUV scaling. Huawei’s methodology makes other foundries look much denser as well. Applying it to AMD’s MI450X with an N2 top die on an N3P base die yields a theoretical density of 460.2 MTr/mm² in 2026, compared with Huawei’s 295 MTr/mm² in 2031. This Kirin 9030 does not use LogicFolding, remaining in a conventional mobile SoC package. Instead, it forms the baseline for how far Huawei and SMIC can push planar scaling. Future teardowns of Kirin and Ascend chips will show both planar logic density and Huawei’s hybrid bonding solutions. Export controls changed China’s optimization problem rather than ending it. EUV restrictions raised the cost and complexity of leading-edge manufacturing without freezing it. SMIC reaches N6-class logic density through DUV immersion, SAQP and DTCO, while Huawei shifts more of the burden onto architecture, packaging and system-level integration. Future nodes will be tougher. N+3 still had room to tighten local metals and reduce cell height and CGP. Further scaling without EUV leaves fewer levers. More aggressive multi-patterning adds masks and overlay error. SMIC can keep pushing DUV, but each step will get more expensive and less forgiving. The design side is just as critical. Huawei had domestic EDA tools and flows before the Kirin 9030, with the Kirin 9000s, 9010 and 9020 making that clear. Huawei was able to ship multiple consumer SoCs on SMIC N+2 and N+3 while cut off from the Western EDA stack. US export controls restricted EDA tools for advanced chips in 2022 but did not target tools for more mature chips. In 2025, the US government briefly placed much broader restrictions on EDA software from Synopsys, Cadence, and others, before lifting them less than two months later as part of a trade deal tied to rare earths. Huawei has been unable to access those tools because it remains on a US trade blacklist. That forced Huawei, SMIC and Chinese academic institutions to build their own tools and flows. Researchers at Peking University recently announced a prototype EDA tool for Huawei’s LogicFolding architecture, which requires a new flow to handle the multilayer layout and floorplan. This is not the same as replacing the full Synopsys or Cadence stack, but it shows where domestic EDA is headed: toward tighter co-optimization between architecture, process and packaging. These advances are also diffusing into the Chinese ecosystem. SMIC is licensing its N+2 and N+3 processes to HLMC/Hua Hong at the government’s direction rather than by choice. If the same process learning feeds into Ascend accelerators for AI training and inference, the choke point shifts from one named fab to an ecosystem. Alibaba’s T-Head silicon arm and Cambricon, a Chinese AI chip designer that is expected to supply ByteDance, could also be major beneficiaries. Sanctions aimed at SMIC alone become less effective once the manufacturing knowledge has spread to other fabs and design houses. China is not closing the gap with Intel, Samsung and TSMC. The teardown shows the opposite in several places: no EUV, no backside power, higher process complexity, and visible trade-offs. But China is still advancing. If domestic chips become good enough for phones, inference, networking and security-sensitive workloads, they can matter strategically without matching TSMC at the leading edge. Behind the paywall, we show what else STEEL can do, with material and process flow analysis of SMIC N+3, and analysis of the Kirin 9030 package. We’re diving deep into the most advanced datacenter and AI hardware hitting the market. To learn more about what’s in the pipeline, access the full Kirin 9030 and SMIC N+3 analysis or to commission a custom teardown, contact sales@semianalysis.com.
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