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A European swallowtail butterfly rests on purple lilacs April 20, 2019, in Mareil-Marly, France.
Sportico’s Invest London Unveils Agenda With Global Sports Leaders
Sportico is bringing the sports business industry’s premier event series to London next week. Taking place Oct. 6 at Fulham Pier, Invest London will convene leaders across sports, finance, media and technology to explore where the industry’s next wave of growth will come from. Today, Sportico unveils an agenda spanning global football ownership, basketball’s European …
Debunking political fearmongering over data centers
Americans can meet this new challenge as we always have, leveraging our embrace of the free-market, entrepreneurial spirit, and institutional respect for private property and the rule of law — but …
Travis County passes $2.3B budget
Travis County’s revenue comes mostly from property taxes, and it makes up about a fifth of an Austinite's property tax bill.
BioMed to Land $915M for Life Science Asset
BioMed will soon secure a $915 million mortgage loan for 585 Kendall, a life science property in Cambridge, Mass.
Demanding schedule will gauge Hearts progress
With the domestic season on pause, it is time for Hearts to take a breath and reflect on what has been a whirlwind start to the season. For new head coach Wouter Vrancken, there was precious little time to settle in before the European qualifiers arrived in mid-July. Since then, Hearts have played 15 matches in just 61 days with a record of six wins, four draws and five defeats.
U.S. officials, business leaders urge Europe to cure ‘Eurosclerosis’
White House National Economic Council Director Kevin Hassett has told CNBC that a strong Europe is in America’s interest, warning of the threat of long-term stagflation, or “Eurosclerosis.” Hassett’s remarks come as JPMorgan Chase CEO Jamie Dimon urges the U.S. and Europe to strike a “big, beautiful economic and free-trade agreement.”
Sterling business owners want city zoning office changes
Six current and former Sterling business and property owners spoke at the Sterling City Council’s recent meeting about ongoing problems they say they are having with the city’s building and zoning department.
Huge Deadlock Update Propels Valve's MOBA Hero Shooter to the Top of the Steam Charts, Smashes Peak Concurrent Player Record
Valve has issued a huge update to its in-development MOBA hero shooter Deadlock, propelling it to the top of Steam’s most-played games chart.
Christina Aguilera continues her European vacation and pops bottles and dances on a boat
Christina Aguilera dances on a yacht in Portofino, Italy, as fans ask for new music. The singer recently teased an album and documentary in the works.
Beijing warns of retaliation if Europe imposes curbs on Chinese businesses
China must "respond firmly" if the EU introduces restrictions on Chinese businesses or products, the Commerce Ministry said, according to a CNBC translation.
SU Catering failed county health inspection during ‘Citrus in the City’
SU Catering failed a surprise inspection at SU’s August 2026 “Citrus in the City” event, for improperly stored food and other violations.
SU Catering failed county health inspection during ‘Citrus in the City’
SU Catering failed a surprise inspection at SU’s August 2026 “Citrus in the City” event, for improperly stored food and other violations.
Bats may have first evolved in Europe 65 million years ago
A huge genomic and fossil study suggests bats first evolved in Europe around 65 to 60 million years ago before spreading across the globe. The findings also indicate that flight and echolocation emerged near the beginning of bat evolution, potentially helping explain how bats became one of the most successful mammal groups on Earth.
Science begins for Smile
On 23 September, the European-Chinese Smile mission was declared ready to start revealing how Earth responds to the wind of charged particles from the Sun. This follows a busy in-space commissioning period since the spacecraft launched on 19 May and reached its target orbit for science operations on 20 June.
Explaining N.C.'s proposed constitutional amendments: Property tax levy limit
North Carolina voters will be facing three proposed constitutional amendments in the upcoming election, and we’re going to explain them all, starting with the property tax levy limit.
The Streamers Tried To Conquer Labor Day…and Whiffed
(Welcome to my weekly streaming ratings report, the single best guide to what’s popular in streaming TV and what isn’t. I’m the Entertainment Strategy Guy, a former streaming executive who now analyzes business strategy in the entertainment industry. If you were forwarded this email, please subscribe to get these insights each week.) What? Another Streaming Ratings Report already? You betcha. Nielsen has moved up the release of their Streaming Ratings data by two weeks, which means I’ve got two extra issues to get out. But I love this change because it will make this report more timely and easier to publish regularly. This week—with the viewership data for the week of 31-Aug—we’ve got some huge, huge topics to discuss. On the film side, two theatrical films (The Mandalorian and Grogu on Disney+ and Scary Movie on Paramount+) contend with two non-Netflix straight-to-streaming films (Mayday on Apple TV and The Runner on Prime Video). The streamers went all in to win Labor Day weekend in America. And we have a bunch of TV shows to analyze, both new shows (Netflix’s The Gentleman, Hulu’s Chad Powers, and an Alix Earle reality show) and weekly shows like Reacher, Ted Lasso, House of the Dragon and Lioness. All that, plus nepotism in Hollywood, some eye-popping fantasy football stats, all the flops, bombs and misses, and a whole lot more. Let’s dive right in! (Reminder: The streaming ratings report focuses on the U.S. market and compiles data from Nielsen’s weekly top ten viewership ranks, Luminate’s Top Ten Data, JustWatch and Reelgood interest data, Samba TV household viewership, company datecdotes, Netflix hours viewed data, Google Trends, and IMDb to determine the most popular content. While most data points are current, Nielsen’s data covers the weeks of August 31st to September 6th, 2026. You can find a link to my terminology here.) Subscribe Film - A Slew of Labor Day Disappointments? A lot of streamers released big new films this week, why? My theory is that the streamers know that four-day weekends can propel streaming films to glory. But if you’ve been reading more over the last two years, you know that big holiday weekends aren’t driving big viewership numbers the way they did post-Covid. And interestingly enough, Netflix didn’t put out a big new film this week. But four other streamers did, trying to take advantage of the holiday with some (not cheap) swings, including… The Mandalorian and Grogu on Disney+ (a Star Wars film that cost $165 million and made $177 million at the US domestic box office) Mayday on Apple TV (rumored $100 million budget, no theatrical release) The Runner on Prime Video (at least a $40 million budget, but likely $50 to $80 million, no theatrical release). Scary Movie on Paramount+ ($30 million budget, made $108 million domestically). (Paramount+ also released a made-for-streaming film based on the Thundermans IP, and I’ll discuss that later.) So…how’d they do? The Mandalorian and Grogu Leads The Way (But That Isn’t Enough) Let’s start with The Mandalorian and Grogu (which I’ll abbreviate to Mando for most of this article). We’re just getting started with this issue, but the rest is for paid subscribers of the Entertainment Strategy Guy, so if you’d like to find out… How Mando, Mayday, The Runner and Scary Movie performed on streaming... How the powerhouse weekly released shows (Reacher, Ted Lasso and Lioness) have accumulate a LOT of viewership… How House of the Dragon finished its run… The latest Netflix show to have a sophomore slump… Whether top creators can drive viewers to their shows… Nepotism in Hollywood and the music business... All the flops, bombs and misses for the week… And more… ...please subscribe! We can only keep doing this great work with your support. Coming Soon! Since Nielsen has accelerated their streaming data release schedule, I’ve got a lot of Streaming Ratings Reports coming your way! Next issue, I’ll be looking at the second season of Peacock’s The Paper, the latest season of Hulu’s The Secret Lives of Mormon Wives, and a very, very expensive Daily Wire fantasy series that’s now on Prime Video. Plus Crew Girl and Dang! on Netflix, a new Tyler Perry film, and one of the biggest bombs of the summer, Supergirl. In the next two issues, I’ll take a look at the return of the NFL to streaming, Toy Story 5 on Disney+, Backrooms on HBO Max, and The Breadwinner on Netflix. On the TV side, we’ve got Netflix’s Monster: The Lizzie Borden Story, Dancing with the Stars on Disney+, Apple TV’s Slow Horses, a Reacher spinoff on Prime Video, and Paramount+’s MobLand, a Woody Harrelson and Matthew McConaughey comedy on Apple TV, a sequel to a Cosby Show spinoff on Netflix, The Great British Baking Show, and the Unabomber film. And while doing all that, I want to take a look at adult animated shows, Ride or Die’s cancellation, and Netflix’s summer films. So much great stuff! Long term, two bits of comic book news. The X-Men cast has been announced, and go ahead and color me bull-ish, if not very, very bull-ish on this bit of comic book IP. In weirder news, HBO Max ordered a “true crime” show by Jimmy Olsen about Gorilla Grodd being falsely convicted of murder. I mean, what? I don’t know, let’s see what happens.
RB Leipzig Receives €353,000 From UEFA for International Duty
The German side secured €353,000 for releasing sixteen stars, topping 611 European teams in a multi-million euro distribution recognizing the rising cost of international player availability.
Seaport Entertainment Group Completes Sale of 85 South Street Residential Building for $8.25 Million
NEW YORK, September 29, 2026--Seaport Entertainment Group Inc. (NYSE: SEG) ("Seaport Entertainment Group," "SEG," "we," "our," or the "Company") announced today it has successfully completed the sale of the eight-story residential building located at 85 South Street, New York, NY to an affiliate of MD Squared Property Group and Churchwick Partners for a sale price of $8.25 million.
Building that houses Mexican restaurant up for sale
The owner of the building that houses a Mexican restaurant on South Minnesota Avenue has listed the property for sale.
Tarheel senators on board with Protect College Sports Act of 2026
(The Center Square) – Regulation of college sports, potentially corralling a volatile period of amateur athletes zooming forward with multi-million dollar deals and major conferences expanding their footprints as valued TV properties, includes the support of both North Carolinians in the U. S.
US drivers are finally getting the adaptive headlights Europe has had for years
Rather than switching between high and low beams, ADBs can dim or shut off only the parts of the beam that would reach another driver's eyes while...
White House urges EU to draw down diesel inventories, sources say
Sept 29 (Reuters) - The White House has urged the European Union to draw down emergency diesel inventories in an effort to lower global prices, as President Donald Trump and his administration purs...
Andy Burnham pledges a big shakeup for Britain in a high-risk political speech
LONDON (AP) — Prime Minister Andy Burnham pledged Tuesday to give Britain “a new social contract for the 21st century," reform the country's electoral system and reset its relationship with its European neighbors. But he acknowledged that economic constraints make delivering his sweeping plans a ...
Waséyabek prepares 100 acres for development at Holland industrial complex
BLDI and Priority Waste have filled the last remaining space in Waséyabek's Holland industrial property as surrounding land is prepared for development.
Ukraine’s Academy of Sciences warns against Russian cooperation after attack
The National Academy of Sciences of Ukraine has urged the international scientific community not to “restore or legitimise institutional cooperation with Russian state scientific and educational structures,” after a Russian drone hit its Presidium building in central Kyiv, killing at least two people and injuring several others. The drone strike took place in the early afternoon on September 28 while staff were working.The academy called the strike, one of several Russian attacks on Ukraine’s capital using jet-powered drones in recent days, an act of terrorism. “It is a strike [. . .] on the very idea that knowledge, research, and the search for truth should serve life, not its destruction,” it said in a statement.The academy thanked the global scientific community for its solidarity following the attack and warned against any temptation to normalise scientific relations with Russia.“Science cannot exist outside of moral responsibility. There can be no ‘ordinary scientific cooperation’ with a state that kills people and destroys scientific institutions of another country,” it said.“We urge not to create opportunities for Russian state institutions to return to the international scientific community as if nothing happened. There can be no ‘science beyond politics’ when science is attacked with weapons.”After the full-scale invasion of Ukraine in 2022, Europe almost entirely cut institutional ties and joint programmes with Russian science, although personal academic contacts are still ongoing.Related articlesRussia widens targeting of European research centresHow geopolitical rifts cut scientific collaborationThe European Federation of Academies of Sciences and Humanities (ALLEA), for instance, continues to exclude the Russian Academy of Sciences from its network.ALLEA condemned the latest attack as a “barbaric act” and part of a broader “systematic targeting of Ukraine’s scientific and cultural infrastructure.” This is a “deliberate attempt to erase the conditions under which free inquiry, knowledge, and democratic life are possible,” it said in a statement.Since Russia’s full-scale invasion, more than 4,650 educational institutions across Ukraine have been damaged, and a further 423 have been destroyed, according to ALLEA.National academies across Europe joined ALLEA in condemning the attack. “Science is about the pursuit of knowledge for the benefit of humanity, so this is an attack on civilisation itself,” said Paul Nurse, president of the UK’s Royal Society.Attacks on scientific, university and cultural institutions “are attacks on the foundations of society and constitute a clear violation of international law,” wrote the German National Academy of Sciences Leopoldina.The presidents of the US National Academies of Sciences, Engineering and Medicine also released a joint statement condemning the attack and pledging to continue to support the Ukrainian research community.The targeting of the Ukrainian academy prompted outcry from European leaders. “Today, science became a target for Russia,” European Commission President Ursula von der Leyen wrote on social media.“These strikes are the latest illustration of the Russian regime’s hostile contempt for science and truth,” said French President Emmanuel Macron.
Zelda 40th Anniversary Concert Tickets Go Live Tomorrow, 30th September (Europe)
Additional dates teased
The Beclowning of Scott Bessent
One iron law of current politics is that nobody who associates themselves with Donald Trump emerges with a shred of credibility. For some, that’s not a big loss — it’s not as if anyone respected Pete Hegseth even before he decided that the key to military success in an age of drones and AI was more testosterone. For others, however, the costs are real. I’m old enough to remember when Marco Rubio was widely considered a reasonable, thoughtful politician. Right now, however, my candidate for the biggest loser is Scott Bessent, the Secretary of the Treasury. Bessent started out with significant reputation to lose: When Trump selected him, this was the headline in the Financial Times: Jason Furman, Barack Obama’s chief economist, described him as a “credible Treasury secretary who has a real understanding of the global economy”. But Bessent has now transformed himself into the Baghdad Bob of bonds. Three weeks ago, after intervening (for reasons that remain somewhat unclear) to support the Japanese yen, Bessent boasted about his ability to move markets and dared investors to bet against his, declaring “I am the house now.” He then tried to push long-term interest rates down, buying 30-year U.S. Treasuries in a move some have compared to paying down part of your mortgage by running up your credit card balance. Here’s how that’s going so far: To get some perspective on how high interest rates have gone, here’s a longer-term perspective: We haven’t seen interest rates this high since the fading days of the dotcom bubble. Why are interest rates hitting new records? The backdrop, as I argued in last Sunday’s primer, is the huge AI-driven investment boom; more on that next week. But the immediate cause of the latest interest rate spike was Trump’s rejection of an Iranian proposal to end the war. This rejection sent crude oil prices, which for a while had fallen considerably, shooting back up: It’s notable, by the way, that oil prices remain high even though a significant amount of oil is now being shuttled through the Strait of Hormuz by night, on smaller vessels. That’s an interesting story, which has a lot to do with the fact that oil from the Hormuz shuttle runs must be transferred to larger vessels before being shipped to markets in Europe and Asia; around 15 percent of the world’s large crude carriers are now parked off the coast of Oman, waiting to be tanked up. This is creating a shipping crunch: But that’s a topic for another day. For now, the point is that with oil still high and refined products, especially diesel, still close to record levels, inflation will remain elevated. And this in turn means that the Federal Reserve will keep short-term interest rates high, an expectation that is feeding into longer-term rates. Hence Bessent’s bond-market humiliation. The truth is that Bessent might not have been able to get interest rates down even in the best of circumstances. But he certainly won’t get anywhere as long as Trump keeps believing that he can somehow convert his Iran debacle into a triumphant victory. And Trump will keep believing that as long as he is surrounded by sycophants who tell him what he wants to hear. Sycophants like, for example, Scott Bessent, who is predicting the imminent collapse of the Iranian economy, possibly within two weeks. Bessent is right to say that the embargo on Iranian oil exports is placing the country under great economic strain. But his implicit prediction that this will quickly produce a deal that Trump can call victory looks no more plausible than his boasts about the bond market. The big question now is, why would anyone with a reputation to lose work for Donald Trump? As the beclowning of Bessent shows, joining the Trump team won’t just damage your reputation; it will utterly destroy it.
Lesbian Bar Project Co-Founder: Purity Politics Could Destroy Our Remaining Spaces
Subscribe As a professional lesbian and Massachusetts native, I’ve recently been asked by a lot of folks what I think about the saga unfolding at Last Ditch. The now-viral story, first reported by The Boston Globe, centers on a Western Massachusetts lesbian bar that lifted its mask requirement for one night a week to help drum up business. The decision ignited an intra-queer controversy that has been feasted on by media outlets across the political spectrum—from the New York Post to LGBTQ Nation—and is even reportedly being eyed for a Hollywood adaptation. Apparently nothing is more entertaining than a bunch of lesbians and queers fighting with each other over KN-95s. What has been lost in all of the chatter and media coverage is the very real possibility that Last Ditch, which just opened in April 2025, will have to close its doors. The venue’s one remaining founder, Jackie Matellian, revealed in a community Zoom meeting that she’s working four jobs, is now solely responsible for the bar’s $50,000 business loan and is struggling to keep up with the bills. So as we laugh about the controversy’s similarity to a “Portlandia” skit and how one of the bar’s founders left to enroll in clown school, we forget that yet another lesbian bar is facing an existential crisis—and this time the call is coming from inside the house. In 2020, my friend Elina Street and I created The Lesbian Bar Project, an Emmy-, Webby- and GLAAD Media Award-winning docuseries and initiative that tells the stories of lesbian queer bars around the world. We were moved to act because at the time there were only an estimated 16 lesbian bars in the United States, and the pandemic threatened to bring that number down even further. There are now more sapphic bars than there were just before the pandemic—about 36 of them in total—but this is down from approximately 200 in 1980. Maybe that doesn’t mean much to you, but for the millions of sapphics living in the U.S., this number is calamitous. As the world laughs at lesbians and sapphics, I want to take a second and tell you what I feel when I walk into one of these bars, which are all unique and irreplaceable in their own way: I feel seen. Sometimes I think Cubbyhole in New York City’s West Village neighborhood knew I was gay before I did. When I walked in there for the first time, before I was even out, I was transfixed by the colorful array of tchotchkes hanging from the ceiling and how the women standing next to me were completely unafraid to express their desire for one another. I knew the minute I was ready to come out, I had a home. I also felt the joy of a new couple falling in love at Seattle’s Wildrose, the quiet confidence of a short king lining up her shot at the pool table at Ginger’s in Brooklyn and the kick of cayenne pepper in Julie Mabry’s crawfish at Houston’s Pearl Bar. Subscribe Lesbian bars don’t just serve lesbians; they serve queer folks across the spectrum, including bisexual, pansexual and trans people. As Elina and I traveled across the U.S. and Europe and to parts of Latin America to document the bar owners, staff and patrons that make up the ecosystems of these spaces, we also became uniquely acquainted with the factors that threaten their existence: gentrification, wage gaps, sexism, environmental disasters, gun violence, rising insurance premiums and political administrations working to annihilate queer people and their families. Lesbian bar owners, like all leaders and entrepreneurs, are imperfect. There have been significant issues over the years at lesbian bars: employee harassment, racism, lack of accessibility, sexual assault and transphobia. All bar owners should be held accountable and should listen to their communities to evolve into safer and more equitable spaces. I also acknowledge my privilege: I am able-bodied, white, cis and from a family system that loves me for who I am. Not everyone has that. Queer people, especially trans and bisexual people, are suffering from disproportionately high levels of depression, and our mental health system isn’t equipped to support them. Immunocompromised people and long COVID are real, and many of my friends are suffering to this day. The people with the least safety net are often the ones for whom a bar closing costs the most. And yet, as we’re seeing with Last Ditch, the queer community often lashes out at each other. It’s also the mainstream media taking the internal conflict and making a mockery out of it, distracting from the real possibility that this bar could close due to financial pressures. A bar that many people loved and needed is facing extinction. Perhaps it’s safer to dissent with one another than with the larger forces trying to eradicate us, but in doing so, we risk destroying the few spaces we have left. Due to the constraints of purity politics—some in good faith, some not so much—lesbian bar owners, almost all of whom are queer women themselves, are forced to be everything for everyone, similarly to how women are forced to be everything for everyone. By asking these bars to uphold impossible standards—standards very few other third spaces are asked to consider—we all end up losing. I want to move as a community toward dialogue, compassionate dissent and collaboration to make our spaces better with the goal of keeping them OPEN and thriving, rather than destroying them from the inside with expectations that are arguably unattainable. Subscribe While I have your attention—for this fleeting second of the news cycle—may I urge us to spearhead a way to keep these small businesses afloat without attacking our own community along the way? Bar owners are left with an impasse: They want to be community-centered, but they also have to make money to keep their doors open. Sometimes they might make business decisions that don’t work for everyone—and that’s partly because different patrons have different priorities and want different things—but these owners deserve the opportunity for productive dialogue**.** We have to work with them and with each other to keep our spaces open, to keep them growing. Lesbian bars raised me into the queer woman I am today. One thing I think about as I reflect on the six years of work we’ve done to document these spaces is that shared, unspoken language I have with a stranger the moment we both walk into one of these bars: the nod, the ease, the not having to explain ourselves. I don’t want to lose that, and neither should you. If objective, nonpartisan, rigorous, LGBTQ-focused journalism is important to you, please consider making a tax-deductible donation through our 501(c)(3) fiscal sponsor, Resource Impact, by clicking this button: Donate
From a martini bar to a spot from a consulting chef on ‘The Bear,’ here are 6 new Chicago restaurants
Also in the mix: A Queens-born soup dumpling spot and a market with a sprawling, European-like square for sipping spritzes.
Sony to skip CES 2027 for first time since expo's inaugural event in 1967
Decision made as Sony shifts focus to "entertainment, intellectual property, and technology geared to support creators"
Putin's 'HIGH-PRECISION' Weapon Destroys European Missile; Kyiv Science Hub Bombed, Zelensky Fumes
Euro's dollar resilience faces energy price, political risk tests
The fortunes of the euro, trading not far off its lowest levels of the year against the dollar, are in the grip of a global energy shock and growing political risk in Europe.
Analysis-Euro’s dollar resilience faces energy price, political risk tests
By Sophie Kiderlin and Dhara Ranasinghe LONDON, Sept 29 (Reuters) - The fortunes of the euro, trading not far off its lowest levels of the year against the dollar, are in the grip of a global energy shock and growing political risk in Europe. The euro...
Trump drops plan to detain immigrants at New Jersey military baseNJ Spotlight News
Investigative arm of Congress finds millions of dollars wasted on abandoned effort to turn other properties into holding areas
Europe Condemns Russian Strikes on Kyiv Science Academy and Medical Center
European leaders condemned Russian attacks on Kyiv that hit the National Academy of Sciences, a medical center and other civilian sites.
Henderson homeowner calls overgrown rental yard a health hazard, says rats spreading to his property
Resident reports years of frustration with HOA, city and health department over neighboring property
As Republicans break with Trump, one gets a brushback: From the Politics Desk
Plus, how Europe’s right-wing parties are dealing with Russia.
ANV acquires Car Care Plan from AmTrust
The deal brings ANV into vehicle warranty across the US, Europe, Turkey and China
Canadian Law Firms Anticipate More European Business as Ottawa, Brussels Explore EU 'Associate Membership'
Beneficiaries could include Stikeman Elliott, Osler, Fasken, McCarthy Tétrault, Blakes, Davies and Torys, along with global firms.
Something Took Wing in Paleocene Sunsets
More than 56 million years ago, something took wing. Now, combining ancient fossils with genomes from living species, researchers are rewriting the bat family tree, and tracing these creatures toward their mysterious beginnings in Paleocene Europe.
Buckingham buys Blossom Road property in $8M deal
Buckingham Properties and Child Care Council are equal partners in the $8 million purchase of the Blossom Road Business Center.
Dayton Mall owner launches multi-phase makeover
The owners of the Dayton Mall in Miami Twp. are renovating the property in an effort to strengthen the property through a series of interior and exterior upgrades.
Apple Releases iOS 27.0.1 With Face ID Bug Fix
Apple today released iOS 27.0.1, the first update for the iOS 27 update that came out two weeks ago. iOS 27.0.1 can be downloaded over the air by going to Settings > General > Software Update. According to Apple's release notes, iOS 27.0.1 addresses an issue that could cause Face ID not to work properly on the iPhone 18 Pro. Some iPhone 18 Pro users have complained that authentication can fail to work for things like unlocking a locked app.
America’s scientists are looking abroad. Can European business cash in?
As U.S. research funding comes under pressure, European companies and institutions are seeking to court America’s top STEM talent.
America’s scientists are looking abroad. Can European business cash in?
As U.S. research funding comes under pressure, European companies and institutions are seeking to court America’s top STEM talent.
COTTON IN BEAUTY: A Sustainable, Sensorial & Science Backed Solution
This eBook examines how brands can leverage cotton's hypoallergenic, biodegradable and sensorial properties to create differentiated products, from facial wipes and reusable rounds to period care and adult incontinence.
Survey: Floridians sour on prospects for the property insurance market
Most aren’t buying claims lawsuit restrictions are helping matters.
OMNIBUS X, a toxic proposal for health and biodiversity. MEPs should not vote for it: ECVC
Omnibus X is a legislative package which, under the usual pretext of simplification to streamline the pesticide approval system, weakens the precautionary principle at the heart of European pesticide regulation.
Explainer-The political chess behind the ECB’s next leadership shake-up
FRANKFURT, Sept 28 (Reuters) - The euro zone will choose a new European Central Bank president next year and replace up to two-thirds of the bank's six-member executive board in an intricate game of political chess among the bloc's 21 countries. The fo...
Explainer-The political chess behind the ECB’s next leadership shake-up
FRANKFURT, Sept 28 (Reuters) - The euro zone will choose a new European Central Bank president next year and replace up to two-thirds of the bank's six-member executive board in an intricate game of political chess among the bloc's 21 countries. The fo...
Explainer: The political chess behind the ECB's next leadership shake-up
The euro zone will choose a new European Central Bank president next year and replace up to two-thirds of the bank's six-member executive board in an intricate game of political chess among the bloc's 21 countries.
One geology step closer to the Moon
As we prepare to return to the Moon, Europe’s leading geology training for astronauts PANGAEA celebrates its 10th anniversary turning extraordinary places on Earth into classrooms for space exploration.
High-level Lithuanian delegation visits Miami to strengthen links in tech and business
In the European Union, Lithuania stands out as the country that issues the most licenses for fintech companies and as a growing hub for diverse tech ventures.
Uptown Somerset growing new business opportunities in familiar places
SOMERSET ― Five historic properties are presenting a promising future for a new generation of small business development in the borough's Uptown business district.
‘All INdiana Politics’: Property tax reform and childcare costs dominate debate in key State Senate race
INDIANAPOLIS — The race for Indiana’s 29th State Senate district has emerged as a focal point for the upcoming elections as candidates compete for an open seat in a key swing district. The vacancy follows State Senator J.D. Ford’s decision to challenge U.S. Representative Victoria Spartz for her seat in Congress. The 29th District stretches […]
Millions more people with overweight could benefit from GLP-1 drugs to protect heart health, study suggests
New research being presented at the annual meeting of the European Association for the Study of Diabetes (EASD) in Milan, Italy, Sept. 28–Oct. 2, makes a case for extending the indication for GLP-1 receptor ...
Hawaiʻi Green Business Awards Program honors local businesses and events for sustainability practices
The Hawai‘i Green Business Program (HGBP) recognized 51 Hawai‘i businesses and events Wednesday night for their commitment to energy and water efficiency, waste reduction, pollution prevention and community involvement, as well as cultural and natural resource preservation.
Zverev comeback leads Europe to Laver Cup victory
Alexander Zverev recovers from his day two defeat by Alex de Minaur to beat Learner Tien and clinch the Laver Cup title for Team Europe on the final day.
🚨 Official: Europe’s youngest coach sacked!
Difficult start to the season.Parma officially announced this Sunday afternoon the departure of its coach, Carlos Cuesta.At 31 years old, the Spaniard was the youngest coach in Europe’s five major l...
‘All INdiana Politics’: Property tax reform and childcare costs dominate debate in key State Senate race
INDIANAPOLIS — The race for Indiana’s 29th State Senate district has emerged as a focal point for the upcoming elections as candidates compete for an open seat in a key swing district. The vacancy follows State Senator J.D. Ford’s decision to challenge U.S. Representative Victoria Spartz for her seat in Congress. The 29th District stretches […]
Chelsea Join Race For RB Leipzig Centre-Back Lukeba
Europe’s elite are circling the versatile Frenchman as a high-stakes bidding war looms for the left-footed prodigy, whose tactical composure makes him the market's most coveted defender.
As soaring energy prices crush businesses, France rolls out a new $500 million aid package, including help with commuting and heating costs
Fuel prices that have spiked since the start of the Iran war on Feb. 28 are dealing a hard blow to small businesses across Europe.
Iran Condemns Rutte’s Remarks on European Support for US Aggression
TEHRAN (Tasnim) – Iran condemned NATO chief’s remarks about the extensive use of European military bases in support of US war of aggression against Iran, warning that such assistance could raise questions of international responsibility for the countries involved.
Have minimum wages kept up with food prices in Europe?
Euronews Business compares five years of food price rises and minimum wage changes in 26 European countries to see where workers on the lowest pay can afford more food than they could in 2021.
Ireland's Controversial Nations League Fixtures: The Inescapable Connection Between Sport And Politics
On Sunday, the national men’s European football teams of Israel and the Republic of Ireland will face each other at a stadium in Hungary. A week later, they will meet once more, this time in Serbia. The very existence of these two games has created a lot of controversy, especially among Irish fans. Politics related […] The post Ireland’s Controversial Nations League Fixtures: The Inescapable Connection Between Sport And Politics appeared first on Stadium Rant.
Guardant Health (GH) Stock Could Be Undervalued Despite Its 5x Run
Guardant Health has turned into one of the stronger movers in U.S. healthcare, with the share price now reflecting very optimistic expectations in the eyes of many investors. With that backdrop, the central question is whether the current valuation is properly supported by the cash flows the business can generate over time. The stock has delivered a very large 3 year return of about 5x, which puts real pressure on the cash flow story to support such a move. Recent coverage gains for Guardant...
Sinema’s ex-bodyguard says stress, mental health crisis led to home damage
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Intel Panther Lake Teardown, 18A, BSPD, GAAFET, SemiAnalysis STEEL
Panther Lake debuts the first commercial implementation of backside power delivery (BSPDN), introduces Intel’s first iteration of gate-all-around (GAA) transistors, and showcases their advanced packaging capabilities with its Foveros-S assembly. With Panther Lake, Intel’s manufacturing arc has shifted from nebulous roadmaps to shipped silicon, a significant milestone on their long road back to competitive semiconductor manufacturing. To evaluate the extent of Intel’s comeback, we tore down Panther Lake. The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. Our teardown traces 18A from its four-sheet RibbonFETs (Intel’s marketing name for GAAFETs) and gate stacks through contacts, frontside and backside wiring, and the bonded carrier. We explain how these material and integration choices improve gate control and reduce resistance, while adding capacitance, thermal resistance, and process complexity. Our measurements put Panther Lake’s 18A compute logic and TSMC N3E GPU logic at similar logic density. However, 18A does not lead TSMC N3P, N2 or Samsung SF2 in peak density. Panther Lake’s CPU cores are incremental updates, and the high-end GPU still uses TSMC N3E. Panther Lake assembles one compute tile, one GPU tile, and one I/O tile atop a passive base tile using Intel’s Foveros-S advanced packaging. Both compute tile variants use Intel 18A. The Xe3 GPU options are a 4-core GT1 tile on Intel 3 and a larger 12-core GT2 tile on TSMC N3E. Both I/O tile variants use TSMC N6. [1], [2] Our analysis centers on the PTL-U compute tile, both the 4-core and 12-core GPU tiles, as well as the 12-lane I/O tile. In conventional chips, power and signal are routed through the same frontside metal stack towards the device frontend. Power rails consume scarce routing resources near the transistors, while tall via stacks carry VDD and VSS from the coarse upper wires to local rails. Backside power delivery (BSPD) moves the main power network behind the transistor layer, to the backside, separating it from frontside signal routing. We covered BSPD and its impacts in 2024. [3], [4], [5] Intel’s BSPD implementation, branded as “PowerVia”, routes power through dedicated backside metals to nano-TSVs, which connect those rails to local source/drain (S/D) contacts. Implementing that separation requires Intel to build the interconnect stacks from both sides of the wafer. The frontside comprises the M0-M14 signal stack, while the backside comprises the BM0-BM5 power stack. M0 and BM0 are closest to the transistors. The nano-TSVs connect the two sides, but Intel patterns and etches each via from the front after forming the contacts. A narrow via runs from the side of the contact deep into the silicon substrate. Intel then completes the frontside signal metal stack, bonds the wafer to a carrier, flips it and removes the original substrate until the buried via tips are exposed. The backside metal stack is then deposited directly on the revealed vias. The nano-TSV and backside-via profiles taper in opposite directions because Intel forms them from opposite sides of the wafer. The transistor structures form the FEOL. Local contacts and nano-TSVs connect them to the wiring. M0 begins the frontside interconnect stack. The silicon carrier remains attached above the frontside interconnects. It supports the device wafer during substrate removal and backside processing and remains part of the finished chip’s thermal path. PowerVia removes the main power distribution from the congested frontside metals, routing supply through shorter and wider backside wires. Its lateral landing still occupies area in the standard cell, so it recovers less cell area than a direct backside contact. [3] Nano-TSVs beside the logic devices carry VDD or VSS from the backside power network, while signal connections continue upward through the frontside metals. Backside Interconnects Samsung SF2 data is included for comparison to Panther Lake’s within this article. SF2 is the incumbent GAA foundry node but lacks BSPD, serving as a useful reference to evaluate 18A. A full teardown of Samsung’s S26 products, processed on SF2, will be shared soon.Nanosheet-cut EDS comparison. The PowerVia supply path runs from the backside Cu rails through Mo-lined W nano-TSVs to the local transistor contacts. In this cross section, the tapered connection spans roughly 150 nm from the contact level to BM0. The Ta liner confines Cu and promotes adhesion to the surrounding stack; the AlOₓ etch stop controls the next dielectric etch above the rail. Dielectric beneath the ribbons electrically separates the devices from the backside wiring and removes the conducting silicon body below the channel. [6] AlOₓ serves as an etchstop (ES), enabling endpointing and protecting the underlying layers. Low-volatility aluminum fluoride reaction products resist the fluorinated plasma, allowing a thin AlOₓ film to protect the metal while the surrounding low-k dielectric is removed. [6], [7]. While the BM0 and layers above the M1 lines show double AlOx layers, Our SMIC N+3 teardown showed single AlOₓ layers. SMIC uses a simpler local AlOₓ substack, while the remaining cap and etch sequence provide the required landing protection. So why double layers? The closely spaced AlOₓ doublets provide two protected endpoints in the etch sequence. Intel documents an AlOₓ/SiN/AlOₓ stack that explains the benefit. The main dielectric plasma etch stops on the first AlOₓ film; a selective wet clear opens that film; a second plasma etch removes the intermediate SiN and stops on the second AlOₓ film. The final wet clear exposes the metal landing surface. SiN is the intermediate dielectric in Intel’s published example. [8] The second stop protects the metal through a cap breakthrough. Wide openings can etch faster than narrow ones, and etch depth varies across the wafer. Metal under an early-clearing opening would otherwise be exposed while other openings still need more etching. Staged protection widens the process window and reduces metal erosion, corrosion and void formation. [8] TSMC documents AlN/AlOₓ/SiOC/AlOₓ above Cu, with AlN blocking Cu diffusion, and a simpler AlN/SiOC/AlOₓ variant that omits one AlOx film. [9] Levels with different opening sizes, aspect ratios, pattern densities and cap materials need different etch margins. A double AlOx stop is useful where another protected endpoint justifies the added processing. The extra film adds formation, selective opening and cleaning steps, plus another set of interfaces to control adhesion, moisture, and stress. These blanket films are opened through the existing via pattern, so each film does not require another lithography mask. AlOₓ adds parasitic capacitance when it replaces lower-k dielectric; two thin AlOₓ films can nevertheless contain less AlOₓ than one thick film. Total thickness, placement, and theintermediate dielectric determine the electrical cost. Deposition chemistry also changes AlOx permittivity and residual hydroxyl content, which can oxidize the underlying metal. [7], [8], [10], [11] The backside stack separates into relatively fine BM0-BM2 wiring near the devices and coarser BM3-BM5 power distribution. The largest pitch increase occurs between BM2 and BM3. BM0’s pitch closely matches the logic-row height, fitting local power delivery to the cell rows. Higher levels aggregate current through larger conductors: routing density becomes less important than low resistance and current capacity as the network approaches the package. This hierarchy provides wide power wiring for the power delivery network without consuming scarce frontside signal-routing resources. [3] The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. Frontside Interconnects Intel 18A combines Mo-lined W contacts and nano-TSVs with a separate backside Cu power network. Samsung SF2 keeps power on the frontside, using Ti-based contact interfaces and Ta-based barriers and Co liners around Cu wiring. In 18A standard-cell rows, backside power rails supply the devices through nano-TSVs within the cells, freeing frontside routing resources. Samsung’s M0 accommodates both power and signal connections. From the device toward M0, the connection runs through a Ti-based S/D interface, W contact fill, a Mo-lined W via, and the Cu M0 wire. Mo supplies a conductive nucleation and adhesion layer for W, replacing the resistive TiN liner used in conventional W integration. This increases the effective conduction volume within the feature while retaining W fill and its established polishing, cleaning and etching processes. Intel’s Mo/W patent describes this integration tradeoff. The nano-TSV uses the same Mo-lined W construction in the backside supply path. [12] The move from TiN to Mo is an incremental change. While a full Co or Mo fill can also reduce the volume lost to liners in very small features, it requires new integration schemes that increase complexity and risk. Cu remains attractive for wider wires due to its low resistance. As wires and vias shrink, the diffusion barrier consumes an increasing fraction of their cross-section. [12], [12], [14] Intel uses Co/Ru liners at M0-M1, Co at M2-M4, and Nb at M5-M9. The lower-level liners help Cu adhere and reduce void formation during trench fills. Applied Materials’ Endura has new thermal control that facilitate wetting process, so the thin film continuity is good enough that good capillary pressure will drive Cu atoms to the via bottom without voiding. Intel’s choice to use Nb is particularly interesting. Intel’s Nb patent describes a conductive diffusion barrier intended to reduce the barrier’s contribution to resistance relative to conventional Ta-based barriers, particularly at via bottoms where all current crosses the barrier. The patent pairs Nb in coarser levels with the option of lower-cost PVD processing. [15], [16] The upper metal layers support thicker barriers formed through physical vapor deposition (PVD) despite its worse coverage and uniformity. Meanwhile, the lower metal layers require thinner barriers deposited through conformal atomic layer deposition (ALD). Co/Ru adds another material interface and requires controlled deposition and Cu fill. Changing liners and barriers by metal layer allows Intel to optimize interconnect resistance, process complexity, and reliability. [15, 16] RibbonFET, Intel’s name for its gate-all-around FETs (GAAFETs), replaces the FinFET’s vertical fins with four stacked horizontal silicon nanosheets, allowing the gate to surround the channel on every side. The path to GAAFET begins with the planar transistor. A planar MOSFET places the gate above the channel between its source and drain. Pairing an NMOS with a PMOS transistor creates a CMOS inverter, in which the NMOS pulls the output low for a high input, and the PMOS pulls it high for a low input. The gate must retain electrostatic control of the channel to ensure clean switching. As gate lengths shrank, the drain began to compete with the gate for that control, increasing off-state leakage. Electrostatic control was restored through an architectural evolution that raised the channel into a vertical fin and wrapping the gate around three sides. Called “FinFET”, this new architecture packed more effective channel width into a smaller footprint. Further scaling made it harder to maintain both drive current and leakage within smaller cells, and reintroduced the same problems planar MOSFETs faced. Nanosheet GAAFETs close the fourth side by replacing the vertical fin with a stack of horizontal nanosheets, each surrounded by the gate. The tighter electrostatic control suppresses leakage at shorter gate lengths while stacking adds effective channel width within the cell footprint. In a FinFET process, channel width changes in discrete steps as designers must add or remove whole fins. Nanosheet width can instead be adjusted continuously within the process’s design rules. Wider sheets increase drive current, while narrower sheets reduce capacitance at the cost of drive current. Intel 18A uses stacks of four nanosheets each and varies their widths across logic and SRAM. At the process level, adding more sheets to each stack increases effective channel width and drive current, but complicates fabrication. RibbonFET vs MBCFET Samsung began GAAFET production in 2022 with SF3E, following with SF3 and now SF2. Its ‘MBCFET’ provides a useful structural comparison with Intel’s first RibbonFET implementation. [17] STEEL is digging deeper into SF2, used in the Exynos 2600, and TSMC’s GAAFET N2, used in Apple’s A20 Pro, in upcoming newsletter articles. We’re throwing some teasers on X. Let’s compare Samsung SF2’s MBCFET with Intel 18A’s RibbonFET. Subscribe Even to the untrained eye, Intel’s extra nanosheet is obvious. Intel stacks four ribbons to Samsung’s three. Samsung’s sheets are much wider in these fields, so both sheet count and width matter to the available channel perimeter. Sheet width also changes which silicon surfaces carry current. On conventional (001) silicon, wide nanosheets emphasize the broad top and bottom surfaces, favoring electron transport; the larger sidewall contribution in a narrow sheet favors hole transport. Thinner sheets improve gate control but increase confinement and scattering. This makes width and thickness part of the NMOS/PMOS balance, alongside strain and threshold voltage. [18], [19] GAAFET designs like 18A use different work-function-metal (WFM) stacks for NMOS and PMOS. Around each ribbon, a thin SiOx interfacial layer separates the silicon channel from the HfOx high-k dielectric, with La providing dipole tuning and the WFM wrapping the dielectric. NMOS uses a TiAl-based stack, while PMOS uses TiN WFM. W fills the remaining gate trench, providing a lower-resistivity path where the work-function layers are no longer needed. In this field, the PMOS stacks leave room for W between ribbons, while the NMOS stacks occupy more of those gaps. A silicon-based dielectric marks the P/N boundary, allowing the PMOS and NMOS gates, sharing the same gate trench, to be processed sequentially. Fast logic paths, retention circuits, and SRAM need a family of threshold options. Changing threshold without substantially changing device dimensions, capacitance or fabrication complexity is valuable. FinFET processes typically use different work-function-metal stacks. In a four-ribbon GAA stack, the narrow sheet-to-sheet gap limits how much WFM can fit around each channel. La in the gate dielectric creates interfacial dipoles at the SiOx/HfOx boundary, shifting effective work function and tuning threshold voltage. This gives Intel another control alongside its NMOS and PMOS WFM stacks. Low-threshold devices improve critical-path drive; higher thresholds reduce leakage elsewhere. Dipole tuning is especially useful in GAA because it changes threshold without consuming the narrow intersheet gap with thicker WFM. Precise control of La incorporation, diffusion and interface quality has long been a challenge, limiting viability in high volume production but is now seen from every leading-edge foundry. Intel’s patent describes depositing a dipole-forming oxide above HfOx and annealing it toward the interfacial oxide before completing the work-function and fill metals. This separates threshold tuning from the space available for metal. Newer research addresses the thermal cost: imec’s 2026 dipole-middle research inserts the shifter between two HfOx depositions, shortening the diffusion path while protecting SiOx during patterning. [20], [21]Matched-cut EDS, Intel 18A (left) vs. Samsung SF2 (right). Intel retains raised source/drain epi beneath its contacts, while Samsung recesses W deep into the epi to form a V-shaped Ti-lined interface. The deeper contact increases metal-to-semiconductor area and shortens the current path from the lower sheets, reducing contact and spreading resistance. It also removes epi volume and brings the contact etch closer to the channel ends. Retaining more epi preserves the material available for strain transfer, especially from SiGe into PMOS. These geometries balance contact access against stress engineering and etch margin. [22], [23] Samsung stacks three sheets to Intel’s four ribbons, and both processes use sheet width to tune drive strength. In our Samsung cross-sections, widths range roughly from 19 to 30 nm in the NPU rows and 37 to 50 nm in the CU cell. The Samsung nanosheets taper, with the widest sheet at the bottom and the narrowest at the top. Both processes use HfOx gate dielectric and Ti-based work-function stacks, with Al in the NMOS stack. In the Samsung devices shown here, the dielectric and WFM occupy the intersheet gaps, leaving W above the top sheet. Intel’s PMOS stack leaves more room between ribbons, and W fills those gaps while the thicker NMOS stack leaves W mainly in the upper trench. Gate-stack EDS maps. The W between Intel’s PMOS ribbons provides a conductive path close to the lower gates. Where WFM fills the entire gap, the gate still surrounds the channel, but voltage reaches it through the more resistive work-function films. Thinner WFM and dipole tuning preserve room for low-resistivity fill; Mo and Ru are alternative fill metals being developed for further scaling. [24] A masked, sequential WFM flow explains the different gate heights and inter-nanosheet fill. The proposed sequence below shows how separate NMOS and PMOS work-function steps produce that geometry. Enabled by the BSPDN process, Intel replaces the dense-logic silicon subfin with dielectric, removing the parasitic conduction path below the ribbons and reducing substrate-related capacitance. A retained silicon body as in classical, non-SOI, planar and FinFET designs needs junction and punchthrough-stop engineering to suppress leakage. Dielectric isolation makes that leakage less sensitive to the subfin doping profile but adds removal and fill steps. It also weakens the direct thermal path through silicon, making the contacts, metal stacks and package more important for heat extraction. [24], [26] Fluorine is concentrated around selected Intel device structures in the maps. WF6 is a standard precursor for W nucleation and fill, while barrier films protect adjacent dielectrics from fluorine attack. Low-fluorine W processes reduce the residual-F burden. Chloride-based precursors avoid introducing F during W deposition, but require control of chlorine attack, nucleation and fill quality. The integration target is a continuous, low-resistance W path with a thin protective liner and minimal chemical damage to the surrounding stack. [20], [27], [28] The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. We measured cell height, gate pitch, metal geometry, and ribbon dimensions at the XTEM sites shown below. The tables group these dimensions by site and device polarity. Our “sheet cuts” cross the silicon channel and show the ribbons end-on. “gate cuts” run along the channel through successive gates. The 18A logic cell dimensions point to a five-track logic library while the N3E and Intel 3 cell dimensions evidence a seven-track logic library. The DDR-PHY uses wider M0 wires and much larger spacing than core logic. That trades routing density for lower wire resistance and weaker coupling between neighboring nets. The geometry suits the current delivery and coupling requirements of analog, clock, and I/O circuitry. PowerVia lets 18A combine a compact cell height with wider M0 geometry by moving the main power rails off the signal-routing tracks. That relaxes local wire scaling while preserving a small cell footprint. Cell height and gate pitch set the geometric density; pin access and routability determine how much of it a real block can use. [29] The biggest takeaway from our gate-pitch measurements is that Intel 18A compute logic and TSMC N3E GPU logic have similar density in the Bohr representative-cell model. The 18A example is 18.6% denser than the Intel 3 GPU example. Gate pitches are nearly identical across the three sites, so cell height drives most of the difference. The Bohr model combines a four-transistor NAND2 spanning three gate pitches and a 32-transistor scan flip-flop (SFF) spanning nineteen pitches, weighting their densities 60:40. The sensitivity column shows how independently changing cell height and gate pitch by ±1 nm changes the result. This compares representative cell geometries; whole-die density also depends on cell mix and placement. The 18A P-core gives M0 substantially more metal cross section than the N3E vector engine. Treating each profile as a trapezoid gives 2.63 times the area per line and 1.84 times the area after normalization by routing pitch. The larger section reduces the geometric contribution to line resistance and lowers current density for a given current. Taller and wider wires also add capacitance, so circuit delay depends on the balance of resistance and capacitance. The DDR-PHY has less metal area per routing width than the 18A core fields, while remaining above N3E. [30] Area = height × (top CD + bottom CD) / 2, including liners. Area/pitch normalizes by routing width. Taper is the symmetric sidewall angle from vertical, with the largest angle belonging to the DDR-PHY. Compute tile The measurements show how ribbon dimensions and gate-stack geometry vary across the compute tile and between NMOS and PMOS to balance channel drive, gate load and the space needed for the dielectric/WFM stack across logic, SRAM and the DDR-PHY. Width mainly changes available channel perimeter; thickness also changes electrostatic control and carrier confinement. Gate-stack thickness then determines the space left for low-resistivity fill P-core and LP E-core logic Both the P-core and LP E-core use multiple nanosheet widths. Widths are measured on high-magnification XTEMs while wider-field images demonstrate additional width choices within the LP E-core. Multiple widths are expected even within an LP E-core. Timing-critical paths, buffers and cells with different fanout need different drive strengths. The lower-magnification fields show this width diversity beyond the sites quantified in the table. L2 and L3 SRAM GAA gives SRAM designers another way to balance the pull-up (PU), pass-gate (PG), and pull-down (PD) transistors. FinFET bitcells set device strength through fin count while GAA adds nanosheet width as a sizing knob. In a 6T SRAM cell, a strong pull-down relative to the pass-gate limits read disturbance, while a strong pass-gate relative to the pull-up improves writability. During a write, the pass-gate and write driver pull the node storing “1” below the inverter trip point. During a read, the pull-down holds the node storing “0” low. Bias, threshold voltage, mismatch and assist circuitry set the remaining margin. FinFET high-current cells commonly use a PU:PG:PD fin-count pattern of 1:2:2, a device-sizing ratio rather than a current ratio. Ribbon width lets Intel balance SRAM strengths without adding whole fins. The L2 cell uses its narrowest ribbons for PU and widest for PD, improving writability and read stability respectively. Intel’s disclosed HCC operates without assist; its denser HDC uses negative-bitline write assist. Pulling the selected bitline briefly below ground increases pass-gate overdrive so it can overpower the pull-up at lower supply voltage. That buys density and low voltage writability at the cost of boosting circuitry, switching energy, and additional voltage stress that must be controlled. [31], [32] Four rectangular ribbons give the perimeter = 8 × (width + thickness), before corner rounding. PG/PU is 1.49 and PD/PG is 1.16. The L3 structures closely resemble L2 in layout and cell height. Fewer L3 nanosheet widths are tabulated because fewer high-magnification images were available. DDR PHY The DDR-PHY trades density for controlled analog behavior and reliable off-chip signaling. It contains drivers, receivers, delay circuits, and calibration logic that set drive strength, sampling time, and voltage margin. Repeated four-sheet devices with similar widths fit the use of regular transistor units for matching and programmable drive. Its wider local wiring provides room for current delivery and separation of sensitive signals, while consuming more area than a dense core-logic grid. The layout serves the memory channel’s electrical requirements as well as digital logic density. [33] The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. Intel 3 GPU devices Vector engine logic Intel 3’s XVE logic uses two-fin PMOS and NMOS devices with power rails in M0. Its cell height and M0 pitch give a seven-track geometry, two tracks more than the 18A logic. One-fin groups also appear among the two-fin devices. Intel 3 L2 SRAM The Intel 3 L2 SRAM uses the familiar HCC sizing pattern: one PU fin, two PG fins, and two PD fins. N3E GPU devices Vector engine logic The N3E XVE field contains repeated two-fin devices with seven-track cell geometry. N3E remains a FinFET process, giving Panther Lake a direct FinFET-to-RibbonFET comparison. N3E L2 SRAM The N3E L2 SRAM uses the same PU:PG:PD fin-count pattern of 1:2:2. Panther Lake-U follows Lunar Lake’s floorplan quite closely. Both pair 4 P-cores with 4 LP E-cores and NPU, media and display engines in similar locations. Lunar Lake also uses Xe2, the direct predecessor to Panther Lake’s Xe3 GPU. This makes Lunar Lake the most direct basis for our comparisons. Arrow Lake differs in core count and uses the older Xe-LPG GPU architecture, so we only use it where it offers a more direct component-level comparison. Compute tile Panther Lake compute-tile floorplans remain sparse even months after launch. Intel 18A’s backside metal and dielectric stack must be removed without damaging the underlying structures before a clean transistor-level floorplan can be imaged. Most published die shots hide or heavily process the background, but we are quite proud of the die shot we achieved and are excited to show the work we have done. We measured the areas of the key components on the compute tile and compared them with their Lunar Lake predecessors on TSMC N3B. These help us to capture changes in block area and compare the two chips across process nodes and designs. Our total tile areas exclude the scribe-line area. The compute-plus-GPU subtotal below uses the PTL-U compute tile and GT1 GPU; it excludes the I/O tile and passive base. Individual block areas use the boundaries marked on the floorplans The compute-plus-GPU row is recomputed from the displayed PTL-U and GT1 areas. Component rows use their stated per-region counts and are not an additive partition of the whole tile. The P-core area remains almost unchanged between Lunar Lake and Panther Lake, despite L2 capacity increasing from 2.5 MiB to 3 MiB. Arrow Lake uses the same Lion Cove core as Lunar Lake but also has a 3 MiB L2. Cougar Cove fits 20% more L2 into the same P-core area. The larger private cache keeps more of each core’s working set close to its execution units, reducing access to shared L3 and DRAM. Extra capacity adds storage leakage and lookup energy, so designers balance it against avoided lower-level accesses. The shared P-core L3 cache also shrank by 14.8%. [2] Cougar Cove combines a similar footprint with Intel’s reported power-efficiency improvements. RibbonFET’s tighter channel control reduces leakage, while PowerVia reduces supply droop and allows tighter voltage guardbands. [1] Darkmont’s four-core LP E-core cluster is 5.0% smaller than Skymont’s on Lunar Lake, with most of the reduction in its L2 regions. The 1 MiB region shrank by 8.4% and the 1.5 MiB region by 14.9%. The tag arrays also use one fewer visible row. Tags identify which memory addresses the data array holds, so rearranging them changes the cache’s layout and wiring without requiring less data capacity. [2] The LP E-cores share one L2. This pools capacity and avoids duplicating all the cache machinery, but the four cores contend for its banks and bandwidth. Their separate cluster also keeps light work away from the performance cluster and its L3, allowing that larger domain to sleep. [1], [2] Cache area includes more than the storage cells. Tags identify each line, decoders select rows, sense amplifiers read the small bitline signal, and wires connect to the banks. Splitting an array into smaller sections shortens wordlines and bitlines, improving access speed, but duplicates peripheral circuits. Panther Lake’s smaller cache regions therefore reflect the complete memory implementation, including how much of each region is devoted to storage. [34] Unlike Meteor Lake and Arrow Lake, Panther Lake has no separate SoC tile. The NPU, LP E-cores, memory controllers, PHYs, media and display engines now share the compute tile. This removes an active die and keeps CPU memory traffic on one die. The cost is moving PHY and I/O-related circuitry onto 18A: drivers, receivers and analog circuits must still meet external voltage, loading and signal-integrity requirements, so their area does not shrink like dense digital logic. [1], [2] The biggest shrink comes from the NPU, which occupies 36.9% less area. NPU 5 consolidates the same total INT8 MAC count into half as many neural compute engines. Each of the three NCEs has a larger MAC array to make the complete NCE envelope 22.6% larger than an NPU 4 engine. Consolidation also halves the number of scratchpads and SHAVE DSPs, from 12 to 6. The MAC array handles matrix multiplication and convolution, while SHAVE executes vector and custom operations that fit the array poorly. [1], [2], [35] The paired floorplans identify each NCE envelope and its scratchpad, MAC, and SHAVE regions. Each measured MAC polygon is counted once per NCE in the area accounting below. The scratchpads store weights, activations, and intermediate results near the MAC arrays, allowing repeated use without fetching them again from DRAM. Halving their number delivers the largest measured area saving but leaves less local storage for the same total MAC count. Layers that no longer fit locally require smaller working tiles or more transfers of intermediate data. The benefit depends on keeping the enlarged arrays busy while managing that tighter storage budget. [36] NPU 5 also adds native FP8. Using half the operand width of FP16 reduces storage and transfer demand, helping workloads fit the smaller local memory budget. Lower precision and format-dependent range make scaling and model validation part of deployment. Hardware activation functions further reduce work that would otherwise occupy the programmable DSPs. [1], [2] Microsoft requires an NPU to deliver at least 40 TOPS for Copilot+ PCs. Both Lunar Lake and Panther Lake meet this threshold, but Panther Lake uses significantly less silicon. GPU tiles Panther Lake is Intel’s first product with Xe3, its latest GPU architecture. It offers two different GPU tiles: a smaller GT1 tile with 4 Xe3 cores on Intel 3 and a larger GT2 tile with 12 Xe3 cores on TSMC N3E. Panther Lake allows us to compare the same GPU architecture across both Intel 3 and TSMC N3E. Wildcat Lake adds a third Xe3 implementation on Intel 18A. A future newsletter will detail Xe3 and its implementation differences across all three process nodes. GT2 scales Xe3 to a different physical layout, with render slices arranged vertically instead of GT1’s horizontal arrangement. Slice placement sets the distances to shared cache banks and the D2D interface. Those wires consume area and add delay, so scaling the number of Xe cores also requires a new balance of cache placement, routing and timing. [1] What’s immediately obvious is that the GT2 tile on TSMC N3E has much smaller Xe cores than GT1. These block areas include logic, caches, and routing. An Xe core on the GT1 tile is ~69% larger than one on Lunar Lake, and ~55% larger than one on GT2. Intel 3 therefore uses substantially more area per Xe core. The block-area gap exceeds the measured logic and SRAM density gaps, bringing routing, timing targets, cell mix, and floorplan allocation into the comparison. The measured vector/matrix engine region is almost unchanged between Lunar Lake and Panther Lake’s GT2 tile. Xe3 retains eight 512-bit vector engines and eight 2048-bit XMX engines per core. Its gains also come from feeding those engines more effectively: more resident threads hide stalls, and variable register allocation lets shaders trade registers per thread against the number of threads kept active. [1] The shared L1/SLM capacity increased by 33% from 192 KiB to 256 KiB, while its area increased only 5%, raising effective density by 27%. L1 retains reused cache lines, while software-managed SLM lets a thread group share data locally. Both reduce traffic to more distant memory. Allocating more SLM per group can also limit how many groups reside on a core at once. [1], [37] The GT1 tile carries 4 MiB of L2 against 16 MiB on the GT2 tile. GT1 divides its L2 cache into four 1 MiB banks, while GT2 uses eight 2 MiB banks. Each bank contains 128 macros, but each N3E macro stores 16 KiB, twice the Intel 3 macro’s 8 KiB capacity. The N3E macro is only 54% larger while holding twice as many bits, giving it 30% higher density: ~23.7 Mbit/mm² versus 18.3 Mbit/mm². Including bank-level circuitry, the gap widens to ~16.9 Mbit/mm² on GT2 versus ~10.4 Mbit/mm² on GT1. GT2 gains density with its macros storing more bits per unit area, and those macros occupy more of each cache bank. Larger macros spread decoder and sense-amplifier overhead across more storage, while a more compact bank layout reduces the share spent on control and routing. The compromise is longer wordlines and bitlines that carry more capacitance. [34] I/O tile Panther Lake uses two I/O tile variants, both fabricated on TSMC N6. The smaller one provides 4 PCIe 5.0 and 8 PCIe 4.0 lanes and serves lower-tier systems as well as those without a discrete GPU, while the larger one adds 8 PCIe 5.0 lanes, bringing the total to 20 lanes, for discrete-GPU connectivity. Panther Lake SKUs with the larger 10- or 12-Xe GPUs use the smaller I/O tile. [38] The smaller I/O tile adds a PCIe 4.0 block and a Thunderbolt block to Lunar Lake’s I/O layout, providing four additional PCIe 4.0 lanes and another Thunderbolt 4 port. Its repeated N6 blocks retain nearly identical areas and layouts. Reusing these proven PHYs and controllers avoids porting and requalifying external interfaces on 18A, where faster digital logic offers less benefit to circuits constrained by the off-chip link. [38] SemiAnalysis’s teardown lab (STEEL) dives deep into the world’s advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. We’re hiring technical experts from system to transistor and everywhere in between. Check out our Careers page. Panther Lake offers scalability and modularity through its disaggregated packaging that partition compute, GPU, and I/O silicon into separate tiles allowing for a suite of tile configurations. This partitioning makes the package part of Intel’s node economics as it determines how much leading-edge wafer area each product consumes, which functions can remain on other processes, and how much configuration freedom Intel can offer from a shared set of tiles. Furthermore, fabricating the compute and GPU tiles separately confines the new 18A process to the compute tile and allows graphics and I/O to use other, more established, and more cost-effective processes. For Panther Lake, the GPU and I/O tiles are assembled alongside the compute tile on a passive silicon base using Foveros-S. Intel’s current technology brief lists a nominal 36 µm pitch for Foveros-S. Through-silicon vias (TSVs) in the base connect the fine wiring above to the larger package connections below. The functional tiles sit side by side on that passive base in a 2.5D configuration. [39] Our cross-section through the compute and GPU tiles shows the package’s wiring hierarchy. Microbumps connect each active tile to the passive silicon base; its fine redistribution layer (RDL) carries the short, dense tile-to-tile links. TSVs carry connections through the base to the package substrate, which fans them out to the much coarser motherboard solder joints. The base supplies interconnect, while computation remains in the active tiles above it. [39] At the compute-tile edge, the higher-magnification inset shows a local microbump spacing of approximately 25.24 µm and a feature width of 12.33 µm. These local spacings are finer than Intel’s nominal Foveros-S value. The X-ray fields further confirm tighter neighboring bumps, consistent across every die-to-die area found on each tile. Additional X-ray analysis is offered after the paywall. Putting the memory controller beside the CPU removes the D2D transfer that CPU memory requests required in Meteor Lake and Arrow Lake. This avoids the extra transmitter, receiver, and link traversal, saving interface energy and latency. Panther Lake’s separate GPU still crosses a D2D link to reach DRAM, so its larger local caches also help contain package traffic. [1], [40] Smaller dies are less likely to contain a random fatal defect, and screening them before assembly prevents one bad tile from consuming a complete package of good silicon. Reuse also spreads design and qualification work across more products. Against those gains, Intel pays for the passive base, D2D circuits, extra bonding and test steps, and losses during assembly. Cost per working product across the portfolio captures the combined effect of wafer yield, reuse, test, and assembly. [29] Wildcat Lake packaging Intel launched Core Series 3, formerly Wildcat Lake, on 16 April 2026 for value mobile and edge systems. Wildcat Lake keeps 18A but removes the passive base and combines more functions on one die to simplify the package. The two products therefore reveal two distinct ways to commercialize the same leading-edge process. [41] Wildcat Lake’s 18A die combines up to two Cougar Cove P-cores, four Darkmont LP E-cores, two Xe3 cores and a smaller NPU. A separate platform-controller die supplies I/O, connected through UCIe, Intel’s first processor implementation of the standard. Consolidating graphics remove a tile boundary and the passive base, reducing assembly complexity for a modest-bandwidth value product. It also ties CPU and graphics scaling to the same die, giving up Panther Lake’s ability to swap in a much larger GPU. [42], [43] In July 2021, Intel CEO Pat Gelsinger set out an ambitious process roadmap aimed at regaining performance leadership by 2025, later described as five nodes in four years. Five years and one CEO later, Intel’s comeback story is not as unambiguously positive as Pat may have hoped. [44], [45] Intel once set the pace for process technology, bringing high-k metal gate technology and FinFETs into volume production years ahead of the rest of the industry. Its 22 nm FinFET process reached consumers with Ivy Bridge in 2012. [46] Intel’s integrated device manufacturing (IDM) model allowed its architects and process engineers to co-optimize products and processes. Starting with Sandy Bridge, Intel dominated x86, while AMD struggled with Bulldozer. That lead faltered at 14 nm and broke at 10 nm. Intel targeted a massive 2.7× density increase, but the node arrived years late and required several revisions before it could support Intel’s full lineup. This delay forced Intel to stretch 14 nm across six generations, while TSMC moved ahead in process technology and AMD recovered in x86. By 2019, Intel was still shipping 14 nm across most of its product stack, with its 10 nm client ramp focused on Ice Lake mobile processors. Meanwhile, TSMC was shipping N7 and N7+, and AMD’s Zen 2 compute chiplets used N7 to raise core counts and improve efficiency. Intel’s process failures were central to its decline, but unsound business decisions furthered their downward slide. Product delays compounded product mistakes, pushing client, server, and FPGA roadmaps off schedule. Several attempts to enter AI (Nervana and Gaudi) and networking (Tofino) also failed to establish lasting businesses. Intel’s recovery has focused on consumer CPUs and advanced packaging. Tiger Lake, Alder Lake, Lunar Lake and now Panther Lake have restored Intel’s consumer roadmap. On the process side, Intel 4 shipped with Meteor Lake, Intel 3 with Granite Rapids and Sierra Forest, and Intel 18A with Panther Lake. Intel has also made advanced packaging part of its foundry offering. However, Intel is still playing catch-up in servers. Several Xeon generations arrived years late and trailed contemporary AMD and Arm server CPUs in performance, efficiency, and core count. The process roadmap is back, but Intel does not hold the same process-technology leadership position it held prior to 10 nm. The introduction of gate-all-around nanosheets and backside power delivery are two of the biggest changes to transistor integration in a decade. Intel took on both changes at once: 18A paired its first RibbonFET with PowerVia in Panther Lake. Panther Lake is a substantial manufacturing milestone. Our cross-sections show how RibbonFET and PowerVia reshape local contacts and wiring, while the floorplans show where architectural consolidation and process choices save area. A sustained competitive lead depends on product performance, cost, yield, and the next implementation. The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page.. 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A legal feud unfolding in New York is putting a spotlight on the work of a business development veteran who is credited for pioneering one of biopharma’s hottest dealmaking mechanism: the China “NewCo” model. In a lawsuit originally filed in New York state court and recently moved to federal court, China’s Lepu Medical Technology has alleged that biopharma business development consultant Su Zhang, who was hired to help shop its GLP-1 weight-loss candidates to Western partners, engaged in corporate double-dealing and trade secret leaks. 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The ill-fated partnership officially kicked off in December 2024, when Lepu tapped CoDevCo as its “exclusive business development mechanism” to identify collaborators for the company’s drug candidates. According to Lepu’s complaint, Zhang personally negotiated and signed the agreement as managing director for CoDevCo, which used her home address. Before the Lepu deal, Zhang made a name following a short stint as the global head of business development for Hengrui Pharmaceuticals. It was during her tenure that Hengrui signed a landmark deal granting exclusive rights for a portfolio of GLP-1 assets to Hercules, which was at that time newly established by a group of private equity and venture capital firms. In addition to the regular upfront and milestone payments, Hengrui also gained an equity stake in Hercules, which later became Kailera Therapeutics. The Hengrui-Hercules deal opened a new paradigm, where a Chinese biopharma company spins off certain early-stage assets to investors for further development through the creation of a new company abroad. The “NewCo” model quickly came into vogue as it allows Western investors to access high-potential assets originating from China at an early stage while giving the Chinese licensors an opportunity to reap long-term benefits through equity stakes in the new firms. The NewCo model proved its value when Kailera staged a record-breaking $625 million IPO on Nasdaq this April, merely two years into the Hengrui deal. Related Kailera CEO 'knew we were in a good spot' before obesity biotech's record-breaking $625M IPO On her LinkedIn page, Zhang described her work at Hengrui as “[b]uilding team and capability from the ground up,” forming NewCo and major pharma partnerships worth billions of dollars. Lepu clearly wanted that kind of track record to help boost its own cardiometabolic portfolio, which includes a range of assets for obesity, Type 2 diabetes, fatty liver disease and muscle preservation during weight loss treatment. “Lepu’s pipeline is very valuable, but only if Lepu could secure the right international partner to expand into the overseas market during the available commercial window,” the company argued in its complaint. The Chinese biotech said it had little knowledge of U.S. laws, customs or business practices in the business development field, and therefore “needed to rely entirely” on the expertise of Zhang and her team as the firm’s first engagement of a U.S.-based BD consultant. “Zhang’s dominating influence on the business development strategy is further evidenced by the fact that she personally controlled the business-development communications on behalf of Lepu with potential partners,” Lepu said in its complaint. After entering the deal, Zhang introduced Lepu to her four associates. According to Lepu’s version of events, all of them were allegedly employed at different time points to perform similar jobs at other Chinese companies that Lepu described as its competitors, while having access to Lepu’s confidential information. As such, Lepu described Zhang’s team as “a roster of individuals whose primary professional loyalty, by virtue of their concurrent full-time employment, ran to Lepu’s competitors.” As well as the specific examples set out in the case, a look at Lepu’s deals over the period suggests Zhang may have been involved in at least one transaction. During their partnership, Lepu, through its subsidiary Shanghai Minwei Biotechnology, also out-licensed its GLP-1/GIP/FGF21 agonist MWN105 to a NewCo called Sidera Bio in the fall of 2025. The deal included an upfront and near-term payment of $35 million, up to $1.01 billion in milestones, and a 9.99% stake in the Danish startup. It seems likely that Zhang facilitated the Minwei deal given that Lepu is on record as having used CoDevCo as its “exclusive business development mechanism.” The big shock for Lepu came in the form of a news article on June 25, 2025. The article, reporting on phase 2 data for BrightGene’s GLP-1/GIP receptor agonist BGM0504, identified Zhang as acting chief business officer of the Lepu rival. Blindsided by her association with BrightGene, Lepu confronted Zhang in July 2025. “Lepu was given assurances that there was nothing to be concerned about and told that Zhang would explain the matter to Lepu,” Lepu alleged in its complaint. “Zhang never did.” Lepu claimed that Zhang had the motive and opportunity to steer potential prospective partners toward BrightGene or other competitors. Later, in February 2026, one of Zhang’s associates joined BrightGene as the vice president for global business development, according to the complaint. Around the same time, Lepu sent written demand letters asking Zhang to account for her BrightGene role, identify what confidential data were shared with the rival firm, and provide any conflict-of-interest or firewall policies during the engagement. According to Lepu, neither CoDevCo nor Zhang answered the questions in their responses. Related Novo vs. KBP: How a $1.3B deal turned into a fraud accusation and an international legal fight In a motion to dismiss filed with the U.S. District Court in the Eastern District of New York on Sept. 4, Zhang’s legal team argued that Lepu’s agreement was signed with CoDevCo, and that an employee of the contractor does not owe fiduciary duties to the client. In its complaint, Lepu said: “That CoDevCo was the contracting entity does not insulate Zhang from personal liability for duties she personally undertook and personally breached.” Taking the argument one step further, the defending party argued that the consulting agreement “does not create a fiduciary relationship even between CoDevCo and Lepu; instead, it identifies CoDevCo as an independent contractor retained to market Lepu’s business to potential western partners.” Although CoDevCo was Lepu’s exclusive business-development contractor, there were no terms stipulating that the consulting firm should serve only Lepu, Zhang’s lawyer noted. As to Lepu’s claims that Zhang misappropriated trade secrets, the defendant argued that Lepu authorized the use of the information so Zhang’s team could perform their service per the agreement. In a rebuttal filed on Sept. 11, Lepu’s lawyer set out why they believe the Chinese biotech satisfied New York law’s misappropriation definition by alleging that the defendant used a trade secret “in breach of a duty or through improper means.” As an alternative to dismissing the suit, the defendant suggested the action should be stayed pending outcomes from the arbitration of a separate case in Singapore. While NewCo pioneer Zhang is defending her business arrangements, momentum behind the NewCo trend has continued unabated into 2026. Through August, Chinese biotech assets have spurred 15 NewCo deals this year, according to local trade publication PharmaDJ.
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