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This Week In Politics: United Nations General Assembly
In a week packed with diplomacy, the United Nations General Assembly High-Level Week began on Tuesday, Sept. 22, at the U.N. headquarters in New York City. In the annual diplomatic forum, all 193 member states are invited to address the General Assembly through the General Debate, while a range of meetings bring world leaders together...
GOP cracks widen over Iran war as vulnerable candidates break with Trump, demand its end
Vulnerable Republicans Ashley Hinson, Mike Rogers and Jon Husted break with Trump on the Iran war as gas prices reshape toss-up Senate races.
Mamdani to host Trump at Gracie Mansion in New York
President Donald Trump is expected to meet today with New York City Mayor Zohran Mamdani at the Gracie Mansion in Manhattan on the eve of the United Nations General Assembly. Follow for live updates.
Greg Hinz: Can the brave new world of AI be tamed?
Pritzker’s team says they’re pondering AI legislation when the General Assembly returns in November. But real solutions will require not state but federal, even international action.
With Only Three 'No' Votes, UN Adopts Political Declaration On Pandemic Preparedness
The United Nations General Assembly adopted the Political Declaration on Pandemic Prevention, Preparedness, and Response (PPPR) by a substantial majority at a
Oxford scientists discover how viruses build themselves without a blueprint
Scientists have captured virus-like particles assembling themselves step by step, revealing how a surprisingly simple process of trial and error produces complex structures with remarkable precision. The discovery uncovers a crucial molecular turning point that speeds up assembly and could lead to new ways to disrupt viruses and develop vaccines.
RISE brings 'Dracula' to the Assembly Theatre
WOONSOCKET – Rose Linnell recalls a production of “Dracula” 20 years or so ago when she was a student at New Mexico State University. “It was different,” said the Bellingham,
Coastal forces shape building sciences practice
When Built Environments relocated to Wilmington, the firm’s partners weren’t looking for the lazy tranquility one hopes for when on vacation. Instead, they sought sultry heat. They wanted to understand whipping coastal winds and punishing precipitation – the kind that tropical storms produce. That’s because how materials degrade can reveal a lot about how they can be improved. “We specifically chose the Wilmington market because it does fall within Climate Zone 3A, which is a coastal warm-humid climate,” said Jarrett Davis, who joined Built Environments in 2023 to lead the company’s building science practice. “There’s not a lot of product research in that climate zone, but there are a lot of structures here that get weatherized pretty severely.” Built Environments has provided building science, material testing and code compliance consulting for 25 years, ever since principal materials scientist Steve Doggett founded the company in Minnesota. “There are very few manufacturers that understand fully how their own materials and products work, whereas we know their shortfalls and their benefits out in the real world on jobsites,” Doggett said. “That’s why the original Built Environments was formed, to make buildings better.” He said the 15-employee company is just as comfortable on a jobsite, retrofitting a high-end beachside property, for example, as it is recreating some of the coast’s most intense weather conditions in the great indoors. The company operates an A2LA-accredited ISO/IEC 17025 mechanical testing laboratory on Wright Street. The year-old facility has expanded Built Environments’ in-house capabilities, Doggett said. “We’re able to simulate that hurricane wind (and) rain and perform structural and impact testing on wall assemblies, roof assemblies and glazing assemblies,” he said. “There are certain requirements that those windows and doors need to meet as far as wind ratings and pressure ratings and things of that nature.” Standard Glass Co.-Glass Depots, of Wilmington, is currently testing a new glazing system using Built Environments’ stress testing, the partners said. One method involves what’s called a “large missile cannon.” “We take 8-foot two-by-fours, and we shoot them at assemblies, so they have to withstand that impact,” Davis said. “It’s pretty cool to see, I’m not going to lie.” In many cases, the lab can run a full, wall-scale test of a product in a matter of weeks or months, whereas “it might take midrange manufacturers years,” Doggett said. “We’re nimble. We can cut that time in half.” The lab also develops intellectual property. Doggett, for example, shares a patent with Sustant LLC, of Minnesota, on a fastener patch to increase the air and water tightness within building envelopes. “We have too many ideas and not enough time,” he said. But the partners noted that they or their fellow principals – of which the company has four total, including a principal engineer and a principal codes and standards expert – could be anywhere on a given day, including in the courtroom providing expert testimony in contentious insurance cases. “Let’s say there is a fire on a structure,” Davis said. “We can analyze all the specific materials within that assembly – an exterior wall or something like that – because there are loads that require certain heat release. And so, we can measure each one of those materials, if need be, to say if this was likely or not a code-approved assembly.” Despite what can be inferred in a lab, the partners said nothing beats learning from how materials change over time under real-world strain. Take, for instance, the curious case of the creaking condo. “We recently had a customer that came to us trying to assess a sound issue of a roof. It was making noises that no one could explain or account for. How do you tackle something like that?” Doggett asked rhetorically. “There’s really no generally agreed-upon methodologies.” The problem turned out to be a faulty installation of a commercial roof system. “The building in this particular case was not local,” he said. “In the initial installation, the commercial roofing contractor installed the wrong fasteners in the wrong locations into the deck, and essentially the solar radiation was causing the building to move quite substantially early in the morning when the sun initially hit that assembly after a quite cool evening, causing the threads on the fasteners to kind of jump within the material, within the metal.” Built Environments designed an effective repair methodology that was within budget, the partners said. “We get the bizarre,” Doggett said. “I will say that’s something that has stayed the same over 25 years.” The partners said they are hiring, and that Cape Fear Community College is one of their main recruiting grounds. Davis and Doggett look for talented people who can understand traditional methodologies yet are open to on-the-job training and new understandings, they said. After all, it’s not just weather that can ruin a building. “My favorite saying is,” Davis said, “‘What are the eight most expensive words in construction? That’s how my daddy used to do it.’”
Oil rises slightly ahead of potential US-Iran talks
Oil prices gained on Tuesday as the market steadied after several days of declines, with investors awaiting developments on potential US-Iran talks at the United Nations General Assembly this week.
Politics Unusual: Governor's race, NY consent laws
In this episode of Politics Unusual, FOX 5 NY's political reporter Morgan McKay speaks with Nassau County Executive Bruce Blakeman about his campaign for the governor's office. Also, a conversation with NYS Assemblymember Catalina Cruz about New York's consent laws.
New Jersey Politics (Episode 531)
This week on New Jersey Politics with Laura Jones, Assemblywoman Marisa Sweeney on her bill requiring AI companion apps to clearly and repeatedly tell users
In New York, a growing Latino population seeks greater political clout
Outside of lieutenant governor, no Latino or Latina has otherwise held statewide office, nor been elected mayor of New York City.
Issue 3: What’s on the table?
In an earlier column, we reviewed the economic-development tools currently available in Arkansas and how Issue 3 can expand that toolbox by authorizing the General Assembly to provide for economic...
Netanyahu, Mamdani reignite feud ahead of U.N. General Assembly
Mamdani has called Netanyahu “an architect of a horrific genocide.”
Mamdani's new socialist outrage means more woe for NYC small businesses
If the City Council passes the Mamdani-endorsed POWER Act, Gotham’s fastest-growing hustle could be suing the small businesses that keep it running.
NI Politics: Complaints to Stormont watchdog increase for second year
A total of 161 complaints were made to the Assembly Commissioner for Standards in 2025-26, compared to 149 in the previous year.
NC lawmakers call for special session of General Assembly to tackle high gas prices
Republican leaders in NC House and Senate announced Saturday that they plan to convene a special session to focus on gas prices.
This year, with shifting political winds, Canada gets more of the spotlight on the UN's stage
Canada has a new posture on the planet’s biggest diplomatic stage as world leaders convene at the U.N. General Assembly this week | WWL
🤝 Deco: Raphinha, Bernal and Espart extensions agreed
As a warm-up to tonight’s match against Sevilla, FC Barcelona held its ordinary assembly of delegate members, featuring noteworthy remarks from president Laporta and also from Deco. The latter took ...
iPhone Duo Reportedly Facing Production Problems Ahead of Launch
The iPhone Duo is reportedly facing production difficulties ahead of its October launch, with early output expected to be limited. A person said to be close to Foxconn's supply chain told China's Jiemian News that final assembly yields for Apple's first foldable iPhone were only slightly above 60% as of September 17. The source said that, under Apple's current quality standards, it could take another six months to a year for the assembly line to reach a mature yield.
Assembly pathway reveals how bacteria build protein coils that extend in acid
The assembly pathway behind refractile-body proteins may have finally been resolved, researchers from Science Tokyo report. Using genetic engineering and several techniques for analyzing protein structure, ...
China Nominates Health Official to Lead WHO
TAIPEI, Taiwan (AP) — China has nominated health official Song Li to lead the World Health Organization, a Foreign Ministry spokesperson said Thursday, as Beijing seeks to expand its presence in international governing bodies. The World Health Assembly is set to elect the next WHO head in May. That ...
Police arrest actors, politicians protesting against Netanyahu outside UN
Police arrested at least 30 people including actors and politicians as they protested outside United Nations headquarters on Thursday against Israeli Prime Minister Benjamin Netanyahu ahead of his speech at the General Assembly.
As resistance mounts, Trump reaches for a familiar shield: national security
Legal experts said the president is applying it more broadly and frequently than his predecessors
Bichotte Hermelyn opens a new chapter: Choosing service over survival politics
Assemblymember Rodneyse Bichotte Hermelyn, one of Brooklyn’s most influential Democratic figures, announced she will not seek re‑election.
Nursing Dean Carole Kenner participates in United Nations General Assembly health event
Carole Kenner, dean of the School of Nursing and Health Sciences at The College of New Jersey, participated in a United Nations General Assembly High-Level Week side event focused on strengthening collaboration across health professions to improve maternal, newborn, and child health. The event was held on September 21, 2026, in New York City. Titled […]
Full interview: Assembly Republican Leader Alexandra Macedo on High-Speed Rail, future of the party
Assembly Republican Minority Leader Alexandra Macedo, who recently stepped into her leadership role, shared her perspective on the challenges and priorities facing her caucus during an interview on California Politics 360, along with her call for accountability in the high-speed rail project.
UN General Assembly meeting kicks off Tuesday: What to know
President Donald Trump is scheduled to speak Tuesday
Rice to bring brain health conversation to United Nations
Three experts from Rice will attend Brain Week at the United Nations General Assembly Sept. 21-25 to join an international conversation that reaches well beyond neuroscience and medicine.
Trump to address U.N. General Assembly and meet with world leaders as he navigates Iran, Gaza, Ukraine conflicts
From Promises to Pulse: Parliamentary Power for Women's, Children's and Adolescents' Health
At the 153rd Inter-Parliamentary Union Assembly, PMNCH is calling on parliamentarians to turn commitments into measurable results for women, children and adolescents through stronger laws, protected financing, effective accountability and meaningful participation. The goal is clear: institutions that listen, respond and deliver better health and rights for all.
Rubio orders visiting Iranian UN delegation to leave NYC ahead of schedule
WASHINGTON (AP) — Secretary of State Marco Rubio ordered Iran’s foreign minister and his delegation to the U.N. General Assembly to leave New York earlier than
Top Races to Watch in 2026
We broke down the 10 North Carolina races that are expected to be competitive, consequential, or interesting—or all three.
This year, with shifting political winds, Canada gets more of the spotlight on the UN's stage
Canada has a new posture on the planet’s biggest diplomatic stage as world leaders convene at the U.N. General Assembly this week.
Former Homeland Security Secretary Kristi Noem files for divorce from her husband of 34 years
Former Department of Homeland Security Secretary Kristi Noem has filed for divorce from her husband of 34 years.
Greg Hinz: Can the brave new world of AI be tamed?
Pritzker’s team says they’re pondering AI legislation when the General Assembly returns in November. But real solutions will require not state but federal, even international action.
This year, with shifting political winds, Canada gets more of the spotlight on the UN's stage
Canada has a new posture on the planet’s biggest diplomatic stage as world leaders convene at the U.N. General Assembly this week | WWJ Newsradio 950
UK not ‘on the slide’, Burnham to tell UN as he gears up for first meeting with Trump
Burnham is heading to New York for the United Nations general assembly
Appellate court rejects new rules sought by Brooklyn Democrats
The outgoing chair, Assembly Member Rodneyse Bichotte Hermelyn, unexpectedly bowed out of the race on Monday night.
WATCH: Trump dismisses concerns about AI risks at UN, says he won't rein it in
President Donald Trump said Tuesday at the United Nations that he is changing the term "artificial intelligence" to "super intelligence" because it's "more accurate," as he dismissed global concerns about the technology and its effects on humanity.
💥 Laporta: Some rivals get rezoned when in trouble...
Joan Laporta spoke at Barça’s assembly this morning and wanted to take a major swipe at his opponents. This is how Joan began his speech: “A club of Barça’s stature always faces major challeng...
Andy Burnham expects to find 'common ground' with Trump in first meeting
In New York, the prime minister will also deliver a speech to the UN General Assembly expected to be focused on AI.
Trump and Mamdani plan to meet in New York during the president's upcoming UN visit
President Donald Trump plans to meet with New York City Mayor Zohran Mamdani when Trump travels to the city for the upcoming U.N. General Assembly | WWJ Newsradio 950
UN Declaration On Pandemic Readiness Appears Headed For Approval In December
A High Level Declaration on Pandemic Prevention, Preparedness and Response appeared likely to win approval by the United Nations General Assembly - but only
McDowell Mountain Elementary students to attend Wacky Science assembly
McDowell Mountain Elementary School students will get a hands-on science lesson Friday morning, Oct. 2, when educational performer Graham Rogers brings his “Wacky Science” assembly to the school, …
Rubio rings opening bell at New York Stock Exchange to begin UN General Assembly
Secretary of State Marco Rubio began the United Nations General Assembly, a major week in diplomacy, by ringing the opening bell at the New York Stock Exchange on Monday. The ceremony serves as a time marker, signaling the start and closing of an official session. The bells were first used at the exchange in the […]
OPINION: Pay for performance, not for politics
The North Carolina General Assembly approved substantial pay increases for public schoolteachers earlier this year. If a bipartisan commission has its way, teacher compensation will soar over …
Politics Unusual: NYS Comptroller DiNapoli, Assemblymember Carroll
In this episode of Politics Unusual, FOX 5 NY's political reporter Morgan McKay speaks to New York State Comptroller Thomas DiNapoli about his campaign to reclaim his current office, as well as his political history. Also, a conversation with Assemblymember Robert Carroll about his push to bring the Olympic Games back to New York.
Sega pulls Total War: Shogun 2 - Complete Edition from sale amid AI accusations, admitting it has "fallen short"
Sega and Creative Assembly are working with platform holders to remove Total War: Shogun 2 - Complete Edition from sale and bring back the original game.
Fact check: Trump’s false claims to the United Nations
President Donald Trump made multiple false claims in his address to the United Nations General Assembly on Tuesday, though he largely stuck to a prepared text.
OpenAI agent hacked into Australia’s national healthcare system
An OpenAI agent hacked into a database of Australia’s national healthcare system, Australian Prime Minister Anthony Albanese told reporters on the sidelines of the UN General Assembly in New York.
Apple Finally Made AirPods Repairable… Sort Of
It’s been true for a while now that Apple’s AirPods have been effectively disposable, with [iFixit] slapping each successive generation with an abysmal 0/10 repairability score. The mom…
Race for 17th Senate District could determine State Senate control
Republican incumbent Howard Marklein is being challenged by Democratic State Assembly Rep. Jenna Jacobson.
Araqchi Flies to New York for UNGA
TEHRAN (Tasnim) – Iranian Foreign Minister Abbas Araqchi left Tehran for New York on Sunday afternoon to attend the United Nations General Assembly session.
Netanyahu says attacking Iran was ‘one of the easiest decisions’ he’s ever made
He denounced as “moral cowards” a mass of delegates who walked out of the U.N. General Assembly when he took the podium to speak
Australia Says Rogue OpenAI Agent Hacked Health Service Website
Australia said an OpenAI agent hacked a data portal for its public health insurance system, in what’s thought to be the first known instance of an AI agent infiltrating a government website. Australian prime minister Anthony Albanese said the agent had accessed public and non-public information relating to health care spending, but personal information is not believed to have been part of the breach. Albanese, speaking on Wednesday at a media briefing in New York where he is attending the United Nations General Assembly, said that the incident took place in June. OpenAI learned of the hack in August, but only emailed a general inbox of an Australian government agency on September 10, and it wasn’t until this week that OpenAI and the Australian government spoke directly about the issue. “It took the company way too long to inform the government what had occurred,” Albanese said, “and the nature of the way that that notification occurred as well was unacceptable.”
At least 30 arrested, including actors, politicians during anti-Netanyahu protest outside UN
Police arrested at least 30 people, including actors and politicians, during a protest outside the United Nations headquarters on Thursday against Israeli Prime Minister Benjamin Netanyahu, hours before he addressed the UN General Assembly.
Nobel medicine prize goes to 3 scientists for research into brain activity
The Nobel Assembly praised their method, noting its global use in revealing brain mysteries.
Baltimore archbishop urges women religious to model renewal of American political culture
"The world needs women who have been seized by Christ. It needs women whose lives bear unmistakable witness to the truth that God is real."
Intel Panther Lake Teardown, 18A, BSPD, GAAFET, SemiAnalysis STEEL
Panther Lake debuts the first commercial implementation of backside power delivery (BSPDN), introduces Intel’s first iteration of gate-all-around (GAA) transistors, and showcases their advanced packaging capabilities with its Foveros-S assembly. With Panther Lake, Intel’s manufacturing arc has shifted from nebulous roadmaps to shipped silicon, a significant milestone on their long road back to competitive semiconductor manufacturing. To evaluate the extent of Intel’s comeback, we tore down Panther Lake. The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. Our teardown traces 18A from its four-sheet RibbonFETs (Intel’s marketing name for GAAFETs) and gate stacks through contacts, frontside and backside wiring, and the bonded carrier. We explain how these material and integration choices improve gate control and reduce resistance, while adding capacitance, thermal resistance, and process complexity. Our measurements put Panther Lake’s 18A compute logic and TSMC N3E GPU logic at similar logic density. However, 18A does not lead TSMC N3P, N2 or Samsung SF2 in peak density. Panther Lake’s CPU cores are incremental updates, and the high-end GPU still uses TSMC N3E. Panther Lake assembles one compute tile, one GPU tile, and one I/O tile atop a passive base tile using Intel’s Foveros-S advanced packaging. Both compute tile variants use Intel 18A. The Xe3 GPU options are a 4-core GT1 tile on Intel 3 and a larger 12-core GT2 tile on TSMC N3E. Both I/O tile variants use TSMC N6. [1], [2] Our analysis centers on the PTL-U compute tile, both the 4-core and 12-core GPU tiles, as well as the 12-lane I/O tile. In conventional chips, power and signal are routed through the same frontside metal stack towards the device frontend. Power rails consume scarce routing resources near the transistors, while tall via stacks carry VDD and VSS from the coarse upper wires to local rails. Backside power delivery (BSPD) moves the main power network behind the transistor layer, to the backside, separating it from frontside signal routing. We covered BSPD and its impacts in 2024. [3], [4], [5] Intel’s BSPD implementation, branded as “PowerVia”, routes power through dedicated backside metals to nano-TSVs, which connect those rails to local source/drain (S/D) contacts. Implementing that separation requires Intel to build the interconnect stacks from both sides of the wafer. The frontside comprises the M0-M14 signal stack, while the backside comprises the BM0-BM5 power stack. M0 and BM0 are closest to the transistors. The nano-TSVs connect the two sides, but Intel patterns and etches each via from the front after forming the contacts. A narrow via runs from the side of the contact deep into the silicon substrate. Intel then completes the frontside signal metal stack, bonds the wafer to a carrier, flips it and removes the original substrate until the buried via tips are exposed. The backside metal stack is then deposited directly on the revealed vias. The nano-TSV and backside-via profiles taper in opposite directions because Intel forms them from opposite sides of the wafer. The transistor structures form the FEOL. Local contacts and nano-TSVs connect them to the wiring. M0 begins the frontside interconnect stack. The silicon carrier remains attached above the frontside interconnects. It supports the device wafer during substrate removal and backside processing and remains part of the finished chip’s thermal path. PowerVia removes the main power distribution from the congested frontside metals, routing supply through shorter and wider backside wires. Its lateral landing still occupies area in the standard cell, so it recovers less cell area than a direct backside contact. [3] Nano-TSVs beside the logic devices carry VDD or VSS from the backside power network, while signal connections continue upward through the frontside metals. Backside Interconnects Samsung SF2 data is included for comparison to Panther Lake’s within this article. SF2 is the incumbent GAA foundry node but lacks BSPD, serving as a useful reference to evaluate 18A. A full teardown of Samsung’s S26 products, processed on SF2, will be shared soon.Nanosheet-cut EDS comparison. The PowerVia supply path runs from the backside Cu rails through Mo-lined W nano-TSVs to the local transistor contacts. In this cross section, the tapered connection spans roughly 150 nm from the contact level to BM0. The Ta liner confines Cu and promotes adhesion to the surrounding stack; the AlOₓ etch stop controls the next dielectric etch above the rail. Dielectric beneath the ribbons electrically separates the devices from the backside wiring and removes the conducting silicon body below the channel. [6] AlOₓ serves as an etchstop (ES), enabling endpointing and protecting the underlying layers. Low-volatility aluminum fluoride reaction products resist the fluorinated plasma, allowing a thin AlOₓ film to protect the metal while the surrounding low-k dielectric is removed. [6], [7]. While the BM0 and layers above the M1 lines show double AlOx layers, Our SMIC N+3 teardown showed single AlOₓ layers. SMIC uses a simpler local AlOₓ substack, while the remaining cap and etch sequence provide the required landing protection. So why double layers? The closely spaced AlOₓ doublets provide two protected endpoints in the etch sequence. Intel documents an AlOₓ/SiN/AlOₓ stack that explains the benefit. The main dielectric plasma etch stops on the first AlOₓ film; a selective wet clear opens that film; a second plasma etch removes the intermediate SiN and stops on the second AlOₓ film. The final wet clear exposes the metal landing surface. SiN is the intermediate dielectric in Intel’s published example. [8] The second stop protects the metal through a cap breakthrough. Wide openings can etch faster than narrow ones, and etch depth varies across the wafer. Metal under an early-clearing opening would otherwise be exposed while other openings still need more etching. Staged protection widens the process window and reduces metal erosion, corrosion and void formation. [8] TSMC documents AlN/AlOₓ/SiOC/AlOₓ above Cu, with AlN blocking Cu diffusion, and a simpler AlN/SiOC/AlOₓ variant that omits one AlOx film. [9] Levels with different opening sizes, aspect ratios, pattern densities and cap materials need different etch margins. A double AlOx stop is useful where another protected endpoint justifies the added processing. The extra film adds formation, selective opening and cleaning steps, plus another set of interfaces to control adhesion, moisture, and stress. These blanket films are opened through the existing via pattern, so each film does not require another lithography mask. AlOₓ adds parasitic capacitance when it replaces lower-k dielectric; two thin AlOₓ films can nevertheless contain less AlOₓ than one thick film. Total thickness, placement, and theintermediate dielectric determine the electrical cost. Deposition chemistry also changes AlOx permittivity and residual hydroxyl content, which can oxidize the underlying metal. [7], [8], [10], [11] The backside stack separates into relatively fine BM0-BM2 wiring near the devices and coarser BM3-BM5 power distribution. The largest pitch increase occurs between BM2 and BM3. BM0’s pitch closely matches the logic-row height, fitting local power delivery to the cell rows. Higher levels aggregate current through larger conductors: routing density becomes less important than low resistance and current capacity as the network approaches the package. This hierarchy provides wide power wiring for the power delivery network without consuming scarce frontside signal-routing resources. [3] The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. Frontside Interconnects Intel 18A combines Mo-lined W contacts and nano-TSVs with a separate backside Cu power network. Samsung SF2 keeps power on the frontside, using Ti-based contact interfaces and Ta-based barriers and Co liners around Cu wiring. In 18A standard-cell rows, backside power rails supply the devices through nano-TSVs within the cells, freeing frontside routing resources. Samsung’s M0 accommodates both power and signal connections. From the device toward M0, the connection runs through a Ti-based S/D interface, W contact fill, a Mo-lined W via, and the Cu M0 wire. Mo supplies a conductive nucleation and adhesion layer for W, replacing the resistive TiN liner used in conventional W integration. This increases the effective conduction volume within the feature while retaining W fill and its established polishing, cleaning and etching processes. Intel’s Mo/W patent describes this integration tradeoff. The nano-TSV uses the same Mo-lined W construction in the backside supply path. [12] The move from TiN to Mo is an incremental change. While a full Co or Mo fill can also reduce the volume lost to liners in very small features, it requires new integration schemes that increase complexity and risk. Cu remains attractive for wider wires due to its low resistance. As wires and vias shrink, the diffusion barrier consumes an increasing fraction of their cross-section. [12], [12], [14] Intel uses Co/Ru liners at M0-M1, Co at M2-M4, and Nb at M5-M9. The lower-level liners help Cu adhere and reduce void formation during trench fills. Applied Materials’ Endura has new thermal control that facilitate wetting process, so the thin film continuity is good enough that good capillary pressure will drive Cu atoms to the via bottom without voiding. Intel’s choice to use Nb is particularly interesting. Intel’s Nb patent describes a conductive diffusion barrier intended to reduce the barrier’s contribution to resistance relative to conventional Ta-based barriers, particularly at via bottoms where all current crosses the barrier. The patent pairs Nb in coarser levels with the option of lower-cost PVD processing. [15], [16] The upper metal layers support thicker barriers formed through physical vapor deposition (PVD) despite its worse coverage and uniformity. Meanwhile, the lower metal layers require thinner barriers deposited through conformal atomic layer deposition (ALD). Co/Ru adds another material interface and requires controlled deposition and Cu fill. Changing liners and barriers by metal layer allows Intel to optimize interconnect resistance, process complexity, and reliability. [15, 16] RibbonFET, Intel’s name for its gate-all-around FETs (GAAFETs), replaces the FinFET’s vertical fins with four stacked horizontal silicon nanosheets, allowing the gate to surround the channel on every side. The path to GAAFET begins with the planar transistor. A planar MOSFET places the gate above the channel between its source and drain. Pairing an NMOS with a PMOS transistor creates a CMOS inverter, in which the NMOS pulls the output low for a high input, and the PMOS pulls it high for a low input. The gate must retain electrostatic control of the channel to ensure clean switching. As gate lengths shrank, the drain began to compete with the gate for that control, increasing off-state leakage. Electrostatic control was restored through an architectural evolution that raised the channel into a vertical fin and wrapping the gate around three sides. Called “FinFET”, this new architecture packed more effective channel width into a smaller footprint. Further scaling made it harder to maintain both drive current and leakage within smaller cells, and reintroduced the same problems planar MOSFETs faced. Nanosheet GAAFETs close the fourth side by replacing the vertical fin with a stack of horizontal nanosheets, each surrounded by the gate. The tighter electrostatic control suppresses leakage at shorter gate lengths while stacking adds effective channel width within the cell footprint. In a FinFET process, channel width changes in discrete steps as designers must add or remove whole fins. Nanosheet width can instead be adjusted continuously within the process’s design rules. Wider sheets increase drive current, while narrower sheets reduce capacitance at the cost of drive current. Intel 18A uses stacks of four nanosheets each and varies their widths across logic and SRAM. At the process level, adding more sheets to each stack increases effective channel width and drive current, but complicates fabrication. RibbonFET vs MBCFET Samsung began GAAFET production in 2022 with SF3E, following with SF3 and now SF2. Its ‘MBCFET’ provides a useful structural comparison with Intel’s first RibbonFET implementation. [17] STEEL is digging deeper into SF2, used in the Exynos 2600, and TSMC’s GAAFET N2, used in Apple’s A20 Pro, in upcoming newsletter articles. We’re throwing some teasers on X. Let’s compare Samsung SF2’s MBCFET with Intel 18A’s RibbonFET. Subscribe Even to the untrained eye, Intel’s extra nanosheet is obvious. Intel stacks four ribbons to Samsung’s three. Samsung’s sheets are much wider in these fields, so both sheet count and width matter to the available channel perimeter. Sheet width also changes which silicon surfaces carry current. On conventional (001) silicon, wide nanosheets emphasize the broad top and bottom surfaces, favoring electron transport; the larger sidewall contribution in a narrow sheet favors hole transport. Thinner sheets improve gate control but increase confinement and scattering. This makes width and thickness part of the NMOS/PMOS balance, alongside strain and threshold voltage. [18], [19] GAAFET designs like 18A use different work-function-metal (WFM) stacks for NMOS and PMOS. Around each ribbon, a thin SiOx interfacial layer separates the silicon channel from the HfOx high-k dielectric, with La providing dipole tuning and the WFM wrapping the dielectric. NMOS uses a TiAl-based stack, while PMOS uses TiN WFM. W fills the remaining gate trench, providing a lower-resistivity path where the work-function layers are no longer needed. In this field, the PMOS stacks leave room for W between ribbons, while the NMOS stacks occupy more of those gaps. A silicon-based dielectric marks the P/N boundary, allowing the PMOS and NMOS gates, sharing the same gate trench, to be processed sequentially. Fast logic paths, retention circuits, and SRAM need a family of threshold options. Changing threshold without substantially changing device dimensions, capacitance or fabrication complexity is valuable. FinFET processes typically use different work-function-metal stacks. In a four-ribbon GAA stack, the narrow sheet-to-sheet gap limits how much WFM can fit around each channel. La in the gate dielectric creates interfacial dipoles at the SiOx/HfOx boundary, shifting effective work function and tuning threshold voltage. This gives Intel another control alongside its NMOS and PMOS WFM stacks. Low-threshold devices improve critical-path drive; higher thresholds reduce leakage elsewhere. Dipole tuning is especially useful in GAA because it changes threshold without consuming the narrow intersheet gap with thicker WFM. Precise control of La incorporation, diffusion and interface quality has long been a challenge, limiting viability in high volume production but is now seen from every leading-edge foundry. Intel’s patent describes depositing a dipole-forming oxide above HfOx and annealing it toward the interfacial oxide before completing the work-function and fill metals. This separates threshold tuning from the space available for metal. Newer research addresses the thermal cost: imec’s 2026 dipole-middle research inserts the shifter between two HfOx depositions, shortening the diffusion path while protecting SiOx during patterning. [20], [21]Matched-cut EDS, Intel 18A (left) vs. Samsung SF2 (right). Intel retains raised source/drain epi beneath its contacts, while Samsung recesses W deep into the epi to form a V-shaped Ti-lined interface. The deeper contact increases metal-to-semiconductor area and shortens the current path from the lower sheets, reducing contact and spreading resistance. It also removes epi volume and brings the contact etch closer to the channel ends. Retaining more epi preserves the material available for strain transfer, especially from SiGe into PMOS. These geometries balance contact access against stress engineering and etch margin. [22], [23] Samsung stacks three sheets to Intel’s four ribbons, and both processes use sheet width to tune drive strength. In our Samsung cross-sections, widths range roughly from 19 to 30 nm in the NPU rows and 37 to 50 nm in the CU cell. The Samsung nanosheets taper, with the widest sheet at the bottom and the narrowest at the top. Both processes use HfOx gate dielectric and Ti-based work-function stacks, with Al in the NMOS stack. In the Samsung devices shown here, the dielectric and WFM occupy the intersheet gaps, leaving W above the top sheet. Intel’s PMOS stack leaves more room between ribbons, and W fills those gaps while the thicker NMOS stack leaves W mainly in the upper trench. Gate-stack EDS maps. The W between Intel’s PMOS ribbons provides a conductive path close to the lower gates. Where WFM fills the entire gap, the gate still surrounds the channel, but voltage reaches it through the more resistive work-function films. Thinner WFM and dipole tuning preserve room for low-resistivity fill; Mo and Ru are alternative fill metals being developed for further scaling. [24] A masked, sequential WFM flow explains the different gate heights and inter-nanosheet fill. The proposed sequence below shows how separate NMOS and PMOS work-function steps produce that geometry. Enabled by the BSPDN process, Intel replaces the dense-logic silicon subfin with dielectric, removing the parasitic conduction path below the ribbons and reducing substrate-related capacitance. A retained silicon body as in classical, non-SOI, planar and FinFET designs needs junction and punchthrough-stop engineering to suppress leakage. Dielectric isolation makes that leakage less sensitive to the subfin doping profile but adds removal and fill steps. It also weakens the direct thermal path through silicon, making the contacts, metal stacks and package more important for heat extraction. [24], [26] Fluorine is concentrated around selected Intel device structures in the maps. WF6 is a standard precursor for W nucleation and fill, while barrier films protect adjacent dielectrics from fluorine attack. Low-fluorine W processes reduce the residual-F burden. Chloride-based precursors avoid introducing F during W deposition, but require control of chlorine attack, nucleation and fill quality. The integration target is a continuous, low-resistance W path with a thin protective liner and minimal chemical damage to the surrounding stack. [20], [27], [28] The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. We measured cell height, gate pitch, metal geometry, and ribbon dimensions at the XTEM sites shown below. The tables group these dimensions by site and device polarity. Our “sheet cuts” cross the silicon channel and show the ribbons end-on. “gate cuts” run along the channel through successive gates. The 18A logic cell dimensions point to a five-track logic library while the N3E and Intel 3 cell dimensions evidence a seven-track logic library. The DDR-PHY uses wider M0 wires and much larger spacing than core logic. That trades routing density for lower wire resistance and weaker coupling between neighboring nets. The geometry suits the current delivery and coupling requirements of analog, clock, and I/O circuitry. PowerVia lets 18A combine a compact cell height with wider M0 geometry by moving the main power rails off the signal-routing tracks. That relaxes local wire scaling while preserving a small cell footprint. Cell height and gate pitch set the geometric density; pin access and routability determine how much of it a real block can use. [29] The biggest takeaway from our gate-pitch measurements is that Intel 18A compute logic and TSMC N3E GPU logic have similar density in the Bohr representative-cell model. The 18A example is 18.6% denser than the Intel 3 GPU example. Gate pitches are nearly identical across the three sites, so cell height drives most of the difference. The Bohr model combines a four-transistor NAND2 spanning three gate pitches and a 32-transistor scan flip-flop (SFF) spanning nineteen pitches, weighting their densities 60:40. The sensitivity column shows how independently changing cell height and gate pitch by ±1 nm changes the result. This compares representative cell geometries; whole-die density also depends on cell mix and placement. The 18A P-core gives M0 substantially more metal cross section than the N3E vector engine. Treating each profile as a trapezoid gives 2.63 times the area per line and 1.84 times the area after normalization by routing pitch. The larger section reduces the geometric contribution to line resistance and lowers current density for a given current. Taller and wider wires also add capacitance, so circuit delay depends on the balance of resistance and capacitance. The DDR-PHY has less metal area per routing width than the 18A core fields, while remaining above N3E. [30] Area = height × (top CD + bottom CD) / 2, including liners. Area/pitch normalizes by routing width. Taper is the symmetric sidewall angle from vertical, with the largest angle belonging to the DDR-PHY. Compute tile The measurements show how ribbon dimensions and gate-stack geometry vary across the compute tile and between NMOS and PMOS to balance channel drive, gate load and the space needed for the dielectric/WFM stack across logic, SRAM and the DDR-PHY. Width mainly changes available channel perimeter; thickness also changes electrostatic control and carrier confinement. Gate-stack thickness then determines the space left for low-resistivity fill P-core and LP E-core logic Both the P-core and LP E-core use multiple nanosheet widths. Widths are measured on high-magnification XTEMs while wider-field images demonstrate additional width choices within the LP E-core. Multiple widths are expected even within an LP E-core. Timing-critical paths, buffers and cells with different fanout need different drive strengths. The lower-magnification fields show this width diversity beyond the sites quantified in the table. L2 and L3 SRAM GAA gives SRAM designers another way to balance the pull-up (PU), pass-gate (PG), and pull-down (PD) transistors. FinFET bitcells set device strength through fin count while GAA adds nanosheet width as a sizing knob. In a 6T SRAM cell, a strong pull-down relative to the pass-gate limits read disturbance, while a strong pass-gate relative to the pull-up improves writability. During a write, the pass-gate and write driver pull the node storing “1” below the inverter trip point. During a read, the pull-down holds the node storing “0” low. Bias, threshold voltage, mismatch and assist circuitry set the remaining margin. FinFET high-current cells commonly use a PU:PG:PD fin-count pattern of 1:2:2, a device-sizing ratio rather than a current ratio. Ribbon width lets Intel balance SRAM strengths without adding whole fins. The L2 cell uses its narrowest ribbons for PU and widest for PD, improving writability and read stability respectively. Intel’s disclosed HCC operates without assist; its denser HDC uses negative-bitline write assist. Pulling the selected bitline briefly below ground increases pass-gate overdrive so it can overpower the pull-up at lower supply voltage. That buys density and low voltage writability at the cost of boosting circuitry, switching energy, and additional voltage stress that must be controlled. [31], [32] Four rectangular ribbons give the perimeter = 8 × (width + thickness), before corner rounding. PG/PU is 1.49 and PD/PG is 1.16. The L3 structures closely resemble L2 in layout and cell height. Fewer L3 nanosheet widths are tabulated because fewer high-magnification images were available. DDR PHY The DDR-PHY trades density for controlled analog behavior and reliable off-chip signaling. It contains drivers, receivers, delay circuits, and calibration logic that set drive strength, sampling time, and voltage margin. Repeated four-sheet devices with similar widths fit the use of regular transistor units for matching and programmable drive. Its wider local wiring provides room for current delivery and separation of sensitive signals, while consuming more area than a dense core-logic grid. The layout serves the memory channel’s electrical requirements as well as digital logic density. [33] The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. Intel 3 GPU devices Vector engine logic Intel 3’s XVE logic uses two-fin PMOS and NMOS devices with power rails in M0. Its cell height and M0 pitch give a seven-track geometry, two tracks more than the 18A logic. One-fin groups also appear among the two-fin devices. Intel 3 L2 SRAM The Intel 3 L2 SRAM uses the familiar HCC sizing pattern: one PU fin, two PG fins, and two PD fins. N3E GPU devices Vector engine logic The N3E XVE field contains repeated two-fin devices with seven-track cell geometry. N3E remains a FinFET process, giving Panther Lake a direct FinFET-to-RibbonFET comparison. N3E L2 SRAM The N3E L2 SRAM uses the same PU:PG:PD fin-count pattern of 1:2:2. Panther Lake-U follows Lunar Lake’s floorplan quite closely. Both pair 4 P-cores with 4 LP E-cores and NPU, media and display engines in similar locations. Lunar Lake also uses Xe2, the direct predecessor to Panther Lake’s Xe3 GPU. This makes Lunar Lake the most direct basis for our comparisons. Arrow Lake differs in core count and uses the older Xe-LPG GPU architecture, so we only use it where it offers a more direct component-level comparison. Compute tile Panther Lake compute-tile floorplans remain sparse even months after launch. Intel 18A’s backside metal and dielectric stack must be removed without damaging the underlying structures before a clean transistor-level floorplan can be imaged. Most published die shots hide or heavily process the background, but we are quite proud of the die shot we achieved and are excited to show the work we have done. We measured the areas of the key components on the compute tile and compared them with their Lunar Lake predecessors on TSMC N3B. These help us to capture changes in block area and compare the two chips across process nodes and designs. Our total tile areas exclude the scribe-line area. The compute-plus-GPU subtotal below uses the PTL-U compute tile and GT1 GPU; it excludes the I/O tile and passive base. Individual block areas use the boundaries marked on the floorplans The compute-plus-GPU row is recomputed from the displayed PTL-U and GT1 areas. Component rows use their stated per-region counts and are not an additive partition of the whole tile. The P-core area remains almost unchanged between Lunar Lake and Panther Lake, despite L2 capacity increasing from 2.5 MiB to 3 MiB. Arrow Lake uses the same Lion Cove core as Lunar Lake but also has a 3 MiB L2. Cougar Cove fits 20% more L2 into the same P-core area. The larger private cache keeps more of each core’s working set close to its execution units, reducing access to shared L3 and DRAM. Extra capacity adds storage leakage and lookup energy, so designers balance it against avoided lower-level accesses. The shared P-core L3 cache also shrank by 14.8%. [2] Cougar Cove combines a similar footprint with Intel’s reported power-efficiency improvements. RibbonFET’s tighter channel control reduces leakage, while PowerVia reduces supply droop and allows tighter voltage guardbands. [1] Darkmont’s four-core LP E-core cluster is 5.0% smaller than Skymont’s on Lunar Lake, with most of the reduction in its L2 regions. The 1 MiB region shrank by 8.4% and the 1.5 MiB region by 14.9%. The tag arrays also use one fewer visible row. Tags identify which memory addresses the data array holds, so rearranging them changes the cache’s layout and wiring without requiring less data capacity. [2] The LP E-cores share one L2. This pools capacity and avoids duplicating all the cache machinery, but the four cores contend for its banks and bandwidth. Their separate cluster also keeps light work away from the performance cluster and its L3, allowing that larger domain to sleep. [1], [2] Cache area includes more than the storage cells. Tags identify each line, decoders select rows, sense amplifiers read the small bitline signal, and wires connect to the banks. Splitting an array into smaller sections shortens wordlines and bitlines, improving access speed, but duplicates peripheral circuits. Panther Lake’s smaller cache regions therefore reflect the complete memory implementation, including how much of each region is devoted to storage. [34] Unlike Meteor Lake and Arrow Lake, Panther Lake has no separate SoC tile. The NPU, LP E-cores, memory controllers, PHYs, media and display engines now share the compute tile. This removes an active die and keeps CPU memory traffic on one die. The cost is moving PHY and I/O-related circuitry onto 18A: drivers, receivers and analog circuits must still meet external voltage, loading and signal-integrity requirements, so their area does not shrink like dense digital logic. [1], [2] The biggest shrink comes from the NPU, which occupies 36.9% less area. NPU 5 consolidates the same total INT8 MAC count into half as many neural compute engines. Each of the three NCEs has a larger MAC array to make the complete NCE envelope 22.6% larger than an NPU 4 engine. Consolidation also halves the number of scratchpads and SHAVE DSPs, from 12 to 6. The MAC array handles matrix multiplication and convolution, while SHAVE executes vector and custom operations that fit the array poorly. [1], [2], [35] The paired floorplans identify each NCE envelope and its scratchpad, MAC, and SHAVE regions. Each measured MAC polygon is counted once per NCE in the area accounting below. The scratchpads store weights, activations, and intermediate results near the MAC arrays, allowing repeated use without fetching them again from DRAM. Halving their number delivers the largest measured area saving but leaves less local storage for the same total MAC count. Layers that no longer fit locally require smaller working tiles or more transfers of intermediate data. The benefit depends on keeping the enlarged arrays busy while managing that tighter storage budget. [36] NPU 5 also adds native FP8. Using half the operand width of FP16 reduces storage and transfer demand, helping workloads fit the smaller local memory budget. Lower precision and format-dependent range make scaling and model validation part of deployment. Hardware activation functions further reduce work that would otherwise occupy the programmable DSPs. [1], [2] Microsoft requires an NPU to deliver at least 40 TOPS for Copilot+ PCs. Both Lunar Lake and Panther Lake meet this threshold, but Panther Lake uses significantly less silicon. GPU tiles Panther Lake is Intel’s first product with Xe3, its latest GPU architecture. It offers two different GPU tiles: a smaller GT1 tile with 4 Xe3 cores on Intel 3 and a larger GT2 tile with 12 Xe3 cores on TSMC N3E. Panther Lake allows us to compare the same GPU architecture across both Intel 3 and TSMC N3E. Wildcat Lake adds a third Xe3 implementation on Intel 18A. A future newsletter will detail Xe3 and its implementation differences across all three process nodes. GT2 scales Xe3 to a different physical layout, with render slices arranged vertically instead of GT1’s horizontal arrangement. Slice placement sets the distances to shared cache banks and the D2D interface. Those wires consume area and add delay, so scaling the number of Xe cores also requires a new balance of cache placement, routing and timing. [1] What’s immediately obvious is that the GT2 tile on TSMC N3E has much smaller Xe cores than GT1. These block areas include logic, caches, and routing. An Xe core on the GT1 tile is ~69% larger than one on Lunar Lake, and ~55% larger than one on GT2. Intel 3 therefore uses substantially more area per Xe core. The block-area gap exceeds the measured logic and SRAM density gaps, bringing routing, timing targets, cell mix, and floorplan allocation into the comparison. The measured vector/matrix engine region is almost unchanged between Lunar Lake and Panther Lake’s GT2 tile. Xe3 retains eight 512-bit vector engines and eight 2048-bit XMX engines per core. Its gains also come from feeding those engines more effectively: more resident threads hide stalls, and variable register allocation lets shaders trade registers per thread against the number of threads kept active. [1] The shared L1/SLM capacity increased by 33% from 192 KiB to 256 KiB, while its area increased only 5%, raising effective density by 27%. L1 retains reused cache lines, while software-managed SLM lets a thread group share data locally. Both reduce traffic to more distant memory. Allocating more SLM per group can also limit how many groups reside on a core at once. [1], [37] The GT1 tile carries 4 MiB of L2 against 16 MiB on the GT2 tile. GT1 divides its L2 cache into four 1 MiB banks, while GT2 uses eight 2 MiB banks. Each bank contains 128 macros, but each N3E macro stores 16 KiB, twice the Intel 3 macro’s 8 KiB capacity. The N3E macro is only 54% larger while holding twice as many bits, giving it 30% higher density: ~23.7 Mbit/mm² versus 18.3 Mbit/mm². Including bank-level circuitry, the gap widens to ~16.9 Mbit/mm² on GT2 versus ~10.4 Mbit/mm² on GT1. GT2 gains density with its macros storing more bits per unit area, and those macros occupy more of each cache bank. Larger macros spread decoder and sense-amplifier overhead across more storage, while a more compact bank layout reduces the share spent on control and routing. The compromise is longer wordlines and bitlines that carry more capacitance. [34] I/O tile Panther Lake uses two I/O tile variants, both fabricated on TSMC N6. The smaller one provides 4 PCIe 5.0 and 8 PCIe 4.0 lanes and serves lower-tier systems as well as those without a discrete GPU, while the larger one adds 8 PCIe 5.0 lanes, bringing the total to 20 lanes, for discrete-GPU connectivity. Panther Lake SKUs with the larger 10- or 12-Xe GPUs use the smaller I/O tile. [38] The smaller I/O tile adds a PCIe 4.0 block and a Thunderbolt block to Lunar Lake’s I/O layout, providing four additional PCIe 4.0 lanes and another Thunderbolt 4 port. Its repeated N6 blocks retain nearly identical areas and layouts. Reusing these proven PHYs and controllers avoids porting and requalifying external interfaces on 18A, where faster digital logic offers less benefit to circuits constrained by the off-chip link. [38] SemiAnalysis’s teardown lab (STEEL) dives deep into the world’s advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. We’re hiring technical experts from system to transistor and everywhere in between. Check out our Careers page. Panther Lake offers scalability and modularity through its disaggregated packaging that partition compute, GPU, and I/O silicon into separate tiles allowing for a suite of tile configurations. This partitioning makes the package part of Intel’s node economics as it determines how much leading-edge wafer area each product consumes, which functions can remain on other processes, and how much configuration freedom Intel can offer from a shared set of tiles. Furthermore, fabricating the compute and GPU tiles separately confines the new 18A process to the compute tile and allows graphics and I/O to use other, more established, and more cost-effective processes. For Panther Lake, the GPU and I/O tiles are assembled alongside the compute tile on a passive silicon base using Foveros-S. Intel’s current technology brief lists a nominal 36 µm pitch for Foveros-S. Through-silicon vias (TSVs) in the base connect the fine wiring above to the larger package connections below. The functional tiles sit side by side on that passive base in a 2.5D configuration. [39] Our cross-section through the compute and GPU tiles shows the package’s wiring hierarchy. Microbumps connect each active tile to the passive silicon base; its fine redistribution layer (RDL) carries the short, dense tile-to-tile links. TSVs carry connections through the base to the package substrate, which fans them out to the much coarser motherboard solder joints. The base supplies interconnect, while computation remains in the active tiles above it. [39] At the compute-tile edge, the higher-magnification inset shows a local microbump spacing of approximately 25.24 µm and a feature width of 12.33 µm. These local spacings are finer than Intel’s nominal Foveros-S value. The X-ray fields further confirm tighter neighboring bumps, consistent across every die-to-die area found on each tile. Additional X-ray analysis is offered after the paywall. Putting the memory controller beside the CPU removes the D2D transfer that CPU memory requests required in Meteor Lake and Arrow Lake. This avoids the extra transmitter, receiver, and link traversal, saving interface energy and latency. Panther Lake’s separate GPU still crosses a D2D link to reach DRAM, so its larger local caches also help contain package traffic. [1], [40] Smaller dies are less likely to contain a random fatal defect, and screening them before assembly prevents one bad tile from consuming a complete package of good silicon. Reuse also spreads design and qualification work across more products. Against those gains, Intel pays for the passive base, D2D circuits, extra bonding and test steps, and losses during assembly. Cost per working product across the portfolio captures the combined effect of wafer yield, reuse, test, and assembly. [29] Wildcat Lake packaging Intel launched Core Series 3, formerly Wildcat Lake, on 16 April 2026 for value mobile and edge systems. Wildcat Lake keeps 18A but removes the passive base and combines more functions on one die to simplify the package. The two products therefore reveal two distinct ways to commercialize the same leading-edge process. [41] Wildcat Lake’s 18A die combines up to two Cougar Cove P-cores, four Darkmont LP E-cores, two Xe3 cores and a smaller NPU. A separate platform-controller die supplies I/O, connected through UCIe, Intel’s first processor implementation of the standard. Consolidating graphics remove a tile boundary and the passive base, reducing assembly complexity for a modest-bandwidth value product. It also ties CPU and graphics scaling to the same die, giving up Panther Lake’s ability to swap in a much larger GPU. [42], [43] In July 2021, Intel CEO Pat Gelsinger set out an ambitious process roadmap aimed at regaining performance leadership by 2025, later described as five nodes in four years. Five years and one CEO later, Intel’s comeback story is not as unambiguously positive as Pat may have hoped. [44], [45] Intel once set the pace for process technology, bringing high-k metal gate technology and FinFETs into volume production years ahead of the rest of the industry. Its 22 nm FinFET process reached consumers with Ivy Bridge in 2012. [46] Intel’s integrated device manufacturing (IDM) model allowed its architects and process engineers to co-optimize products and processes. Starting with Sandy Bridge, Intel dominated x86, while AMD struggled with Bulldozer. That lead faltered at 14 nm and broke at 10 nm. Intel targeted a massive 2.7× density increase, but the node arrived years late and required several revisions before it could support Intel’s full lineup. This delay forced Intel to stretch 14 nm across six generations, while TSMC moved ahead in process technology and AMD recovered in x86. By 2019, Intel was still shipping 14 nm across most of its product stack, with its 10 nm client ramp focused on Ice Lake mobile processors. Meanwhile, TSMC was shipping N7 and N7+, and AMD’s Zen 2 compute chiplets used N7 to raise core counts and improve efficiency. Intel’s process failures were central to its decline, but unsound business decisions furthered their downward slide. Product delays compounded product mistakes, pushing client, server, and FPGA roadmaps off schedule. Several attempts to enter AI (Nervana and Gaudi) and networking (Tofino) also failed to establish lasting businesses. Intel’s recovery has focused on consumer CPUs and advanced packaging. Tiger Lake, Alder Lake, Lunar Lake and now Panther Lake have restored Intel’s consumer roadmap. On the process side, Intel 4 shipped with Meteor Lake, Intel 3 with Granite Rapids and Sierra Forest, and Intel 18A with Panther Lake. Intel has also made advanced packaging part of its foundry offering. However, Intel is still playing catch-up in servers. Several Xeon generations arrived years late and trailed contemporary AMD and Arm server CPUs in performance, efficiency, and core count. The process roadmap is back, but Intel does not hold the same process-technology leadership position it held prior to 10 nm. The introduction of gate-all-around nanosheets and backside power delivery are two of the biggest changes to transistor integration in a decade. Intel took on both changes at once: 18A paired its first RibbonFET with PowerVia in Panther Lake. Panther Lake is a substantial manufacturing milestone. Our cross-sections show how RibbonFET and PowerVia reshape local contacts and wiring, while the floorplans show where architectural consolidation and process choices save area. A sustained competitive lead depends on product performance, cost, yield, and the next implementation. The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page.. [1] Intel, “Intel Tech Tour 2025 Panther Lake recap,” Doc. 866361, 2025. Accessed: Sep. 14, 2026. [Online]. Available: https://cdrdv2-public.intel.com/866361/ITT_2025_Panther_Lake_Recap1.pdf [2] Intel, “Core Ultra processors Series 3 datasheet, volume 1,” Doc. 872188-001, Jan. 2026. Accessed: Sep. 14, 2026. [Online]. Available: https://cdrdv2-public.intel.com/872188/872188-001.pdf [3] N. Horiguchi and E. Beyne, “Backside power delivery: How to power chips from the backside,” imec Reading Room, Nov. 25, 2022. Accessed: Sep. 14, 2026. [Online]. Available: https://www.imec-int.com/en/articles/how-power-chips-backside [4] W. Hafez et al., “Intel PowerVia technology: Backside power delivery for high density and high-performance computing,” in Proc. IEEE Symp. VLSI Technol. Circuits, Kyoto, Japan, Jun. 2023, pp. 1–2, doi: 10.23919/vlsitechnologyandcir57934.2023.10185208. [5] K. Fischer et al., “Intel 18A platform technology featuring RibbonFET (GAA) and PowerVia for advanced high-performance computing,” in Proc. Symp. VLSI Technol. Circuits, Kyoto, Japan, Jun. 2025, pp. 1–3, doi: 10.23919/vlsitechnologyandcir65189.2025.11075006. [6] K.-F. Cheng, C.-L. Teng, H.-Y. Huang, and H.-C. Chen, “Metal oxide composite as etch stop layer,” U.S. Patent 12 176 247 B2, Dec. 24, 2024. Accessed: Sep. 14, 2026. [Online]. Available: https://patents.google.com/patent/US12176247B2/en [7] S. W. King, “Dielectric barrier, etch stop, and metal capping materials for state of the art and beyond metal interconnects,” ECS J. Solid State Sci. Technol., vol. 4, no. 1, pp. N3029–N3047, 2015, doi: 10.1149/2.0051501jss. [8] A. V. Mule’, D. J. Towner, D. Seghete, C. R. Ryder, and A. A. Gonzalez, “Multi-layer etch stop layers for advanced integrated circuit structure fabrication,” U.S. Patent Appl. 20220102343 A1, Mar. 31, 2022. Accessed: Sep. 14, 2026. [Online]. Available: https://patents.google.com/patent/US20220102343A1/en [9] C.-C. Wang and J. H. Wang, “Interconnect structure with dielectric cap layer and etch stop layer stack,” U.S. Patent Appl. 20230253247 A1, Aug. 10, 2023. Accessed: Sep. 14, 2026. [Online]. Available: https://patents.google.com/patent/US20230253247A1/en [10] Y. J. Wu, K.-F. Cheng, C.-C. Lee, H.-K. Chang, and H.-Y. Huang, “Etch stop layer for interconnect structures,” U.S. Patent Appl. 20240332070 A1, Oct. 3, 2024. Accessed: Sep. 14, 2026. [Online]. Available: https://patents.google.com/patent/US20240332070A1/en [11] M. G. Rainville, N. Shankar, K. S. Reddy, and D. M. Hausmann, “Deposition of aluminum oxide etch stop layers,” U.S. Patent Appl. 20180197770 A1, Jul. 12, 2018. Accessed: Sep. 14, 2026. [Online]. Available: https://patents.justia.com/patent/20180197770 [12] J. S. Leib et al., “Conductive lines having molybdenum liner and tungsten fill for advanced integrated circuit structure fabrication,” U.S. Patent Appl. 20240429126 A1, Dec. 26, 2024. Accessed: Sep. 14, 2026. [Online]. Available: https://patents.justia.com/patent/20240429126 [13] M. Naik, “Cobalt enables power and performance scaling at single-digit logic nodes,” Applied Materials, Dec. 17, 2018. Accessed: Sep. 14, 2026. [Online]. Available: https://www.appliedmaterials.com/us/en/blog/blog-posts/cobalt-enables-power-and-performance-scaling-at-single-digit-logic-nodes.html [14] Lam Research, “Breaking through AI’s invisible barrier with molybdenum,” Lam Research Newsroom, May 6, 2025. Accessed: Sep. 14, 2026. [Online]. Available: https://newsroom.lamresearch.com/molybdenum-metallization-ai-revolution [15] P. Yashar, G. Malyavanatham, and H. Vijwani, “Integrated circuit interconnect structures with niobium barrier materials,” U.S. Patent Appl. 20240112951 A1, Apr. 4, 2024. Accessed: Sep. 14, 2026. [Online]. Available: https://patents.google.com/patent/US20240112951A1/en [16] Applied Materials, “Applied Materials unveils chip wiring innovations for more energy-efficient computing,” Applied Materials Investor Relations, Jul. 8, 2024. Accessed: Sep. 14, 2026. [Online]. Available: https://ir.appliedmaterials.com/news-releases/news-release-details/applied-materials-unveils-chip-wiring-innovations-more-energy [17] Samsung, “Samsung showcases AI-era vision and latest foundry technologies at SFF 2024,” Samsung Semiconductor, Jun. 13, 2024. Accessed: Sep. 14, 2026. [Online]. Available: https://semiconductor.samsung.com/news-events/news/samsung-showcases-ai-era-vision-and-latest-foundry-technologies-at-sff-2024/ [18] C. W. Yeung et al., “Channel geometry impact and narrow sheet effect of stacked nanosheet,” in Proc. IEEE Int. Electron Devices Meeting (IEDM), Dec. 2018, pp. 28.6.1–28.6.4, doi: 10.1109/iedm.2018.8614608. [19] S. Mochizuki et al., “Evaluation of (110) versus (001) channel orientation for improved nFET/pFET device performance trade-off in gate-all-around nanosheet technology,” in Proc. Int. Electron Devices Meeting (IEDM), Dec. 2023, pp. 1–4, doi: 10.1109/iedm45741.2023.10413854. [20] D. G. Ouellette et al., “Fabrication of gate-all-around integrated circuit structures having molybdenum nitride metal gates and gate dielectrics with a dipole layer,” U.S. Patent 12 051 698 B2, Jul. 30, 2024. Accessed: Sep. 14, 2026. [Online]. Available: https://patents.google.com/patent/US12051698B2/en [21] imec, “Advancing the CFET-based device roadmap with novel integration modules and standard-cell architectures,” imec, 2026. Accessed: Sep. 14, 2026. [Online]. Available: https://www.imec-int.com/en/articles/advancing-cfet-based-device-roadmap-novel-integration-modules-and-standard-cell [22] A. Reznicek, X. Miao, C. Lee, and J. Zhang, “Wrap around contact for nanosheet source drain epitaxy,” U.S. Patent 11 302 813 B2, Apr. 12, 2022. Accessed: Sep. 14, 2026. [Online]. Available: https://patents.google.com/patent/US11302813B2/en [23] J. A. Kittl, J. G. Hong, D. R. Palle, and M. S. Rodder, “Methods for varied strain on nano-scale field effect transistor devices,” U.S. Patent 9 978 833 B2, May 22, 2018. Accessed: Sep. 14, 2026. [Online]. Available: https://patents.google.com/patent/US9978833B2/en [24] S. Gandikota et al., “Method of reducing metal gate resistance for next generation NMOS device application,” Int. Patent Appl. WO 2024/137272 A1, Jun. 27, 2024. Accessed: Sep. 14, 2026. [Online]. Available: https://patents.google.com/patent/WO2024137272A1/en [25] J. Zhang et al., “Full bottom dielectric isolation to enable stacked nanosheet transistor for low power and high performance applications,” in Proc. IEEE Int. Electron Devices Meeting (IEDM), Dec. 2019, pp. 11.6.1–11.6.4, doi: 10.1109/iedm19573.2019.8993490. [26] C. Yoo, J. Chang, Y. Seon, H. Kim, and J. Jeon, “Analysis of self-heating effects in multi-nanosheet FET considering bottom isolation and package options,” IEEE Trans. Electron Devices, vol. 69, no. 3, pp. 1524–1531, Mar. 2022, doi: 10.1109/ted.2022.3141327. [27] S. S. Pradhan, D. B. Bergstrom, J.-S. Chun, and J. Chiu, “Tungsten gates for non-planar transistors,” European Patent Appl. EP 3 506 367 A1, Jul. 3, 2019. Accessed: Sep. 14, 2026. [Online]. Available: https://patents.google.com/patent/EP3506367A1/en [28] L. Schloss and X. Ba, “Tungsten films having low fluorine content,” U.S. Patent 9 754 824 B2, Sep. 5, 2017. Accessed: Sep. 14, 2026. [Online]. Available: https://patents.google.com/patent/US9754824B2/en [29] Intel Foundry, “Accelerating AI and HPC with advanced process and packaging technologies,” Doc. 367370-001US, Jun. 2026. Accessed: Sep. 14, 2026. [Online]. Available: https://www.intel.com/content/dam/www/central-libraries/us/en/documents/2025-11/intel-foundry-hpc-ai-brief.pdf [30] M. Lofrano, X. Chang, H. Oprins, and Z. Tokei, “Mitigating the thermal bottleneck in advanced interconnects,” imec, Sep. 28, 2023. Accessed: Sep. 14, 2026. [Online]. Available: https://www.imec-int.com/en/articles/mitigating-thermal-bottleneck-advanced-interconnects [31] S. Bair, “Intel at ISSCC 2025: Navid Shahriari invited talk, eight papers, forums, panelist & product details,” Intel Community, Feb. 19, 2025. Accessed: Sep. 14, 2026. [Online]. Available: https://community.intel.com/t5/Blogs/Tech-Innovation/Edge-5G/Intel-at-ISSCC-2025-Navid-Shahriari-Invited-Talk-Eight-Papers/post/1667592 [32] D. Chandra, E. Potladhurthi, D. R. S. Reddy, and K. S. Rengarajan, “Tunable negative bitline write assist and boost attenuation circuit,” U.S. Patent Appl. 20160203857 A1, Jul. 14, 2016. Accessed: Sep. 14, 2026. [Online]. Available: https://patents.google.com/patent/US20160203857A1/en [33] Synopsys, “Advantages of firmware-based training in high-speed DDR IP,” Synopsys IP Technical Bulletin. Accessed: Sep. 14, 2026. [Online]. Available: https://www.synopsys.com/articles/firmware-based-training-ddr-ip.html [34] N. Muralimanohar, R. Balasubramonian, and N. P. Jouppi, “CACTI 6.0: A tool to understand large caches,” Hewlett-Packard Laboratories, 2009. Accessed: Sep. 14, 2026. [Online]. Available: https://users.cs.utah.edu/~rajeev/cacti6/cacti6-tr.pdf [35] Intel, “Intel Tech Tour 2024 Lunar Lake AI hardware accelerators,” Doc. 824436, 2024. Accessed: Sep. 14, 2026. [Online]. Available: https://cdrdv2-public.intel.com/824436/2024_Intel_Tech%20Tour%20TW_Lunar%20Lake%20AI%20Hardware%20Accelerators.pdf [36] Y.-H. Chen, J. Emer, and V. Sze, “Eyeriss: A spatial architecture for energy-efficient dataflow for convolutional neural networks,” in Proc. 43rd ACM/IEEE Annu. Int. Symp. Comput. Archit. (ISCA), Jun. 2016, pp. 367–379, doi: 10.1109/isca.2016.40. [37] Intel, “Introduction to the Xe-HPG architecture,” Doc. 758306, Nov. 4, 2022. Accessed: Sep. 14, 2026. [Online]. Available: https://www.intel.com/content/www/us/en/developer/articles/technical/introduction-to-the-xe-hpg-architecture.html [38] Intel, “Core Ultra processors Series 3 for the edge,” Doc. 855291. Accessed: Sep. 14, 2026. [Online]. Available: https://cdrdv2-public.intel.com/855291/Intel%C2%AE%20Core%E2%84%A2%20Ultra%20Processors%20Series%203%20for%20Edge%20Overview_2.pdf [39] Intel Foundry, “Foveros technology brief,” Doc. 366411-001US, Feb. 2026. Accessed: Sep. 14, 2026. [Online]. Available: https://www.intel.com/content/dam/www/central-libraries/us/en/documents/2025-07/foveros-25d-product-brief.pdf [40] D. Das Sharma, “UCIe: Building an open chiplet ecosystem,” UCIe Consortium, 2022. Accessed: Sep. 14, 2026. [Online]. Available: https://www.uciexpress.org/_files/ugd/0c1418_c5970a68ab214ffc97fab16d11581449.pdf [41] Intel, “Intel launches Intel Core Series 3 processors,” Intel Newsroom, Apr. 16, 2026. Accessed: Sep. 14, 2026. [Online]. Available: https://www.intel.com/content/www/us/en/newsroom/news/client-computing/intel-launches-intel-core-series-3-processors-changing-the-game-for-everyday-computing.html [42] Intel, “Core Series 3 launch press deck,” Apr. 2026. Accessed: Sep. 14, 2026. [Online]. Available: https://download.intel.com/newsroom/2026/Intel-Core-Series-3/Intel-Core-Series-3-Launch-Press-Deck.pdf [43] Intel, “Intel outlines architectures for agentic AI at Hot Chips 2026,” Intel Newsroom, Aug. 24, 2026. Accessed: Sep. 14, 2026. [Online]. Available: https://www.intel.com/content/www/us/en/newsroom/news/client-computing/intel-outlines-architectures-for-agentic-ai-at-hot-chips-2026.html [44] Intel, “Intel accelerates process and packaging innovations,” Intel Investor Relations, Jul. 26, 2021. Accessed: Sep. 14, 2026. [Online]. Available: https://www.intc.com/filings-reports/all-sec-filings/content/0001193125-21-224438/d199788dex991.htm [45] Intel, “Intel reports third-quarter 2021 financial results,” Intel Investor Relations, Oct. 21, 2021. Accessed: Sep. 14, 2026. [Online]. Available: https://www.intc.com/news-events/press-releases/detail/1505/intel-reports-third-quarter-2021-financial-results [46] Intel, “3rd generation Intel Core processors bring exciting new experiences and fun to the PC,” Intel Investor Relations, Apr. 23, 2012. Accessed: Sep. 14, 2026. [Online]. Available: https://www.intc.com/news-events/press-releases/detail/577/3rd-generation-intel-core-processors-bring-exciting
Netanyahu says attacking Iran was ‘one of the easiest decisions’ he’s ever made
He denounced as “moral cowards” a mass of delegates who walked out of the U.N. General Assembly when he took the podium to speak
Campaign 2026: Chloe Pierce (D) vs Scott Bendett (R) in NYS 107th Assembly District
Democratic nominee Chloe Pierce is challenging Republican incumbent Scott Bendett.
Deco outlines Barcelona’s three-player renewal plan
Barcelona sporting director Deco told the club’s General Assembly that agreements are close to being finalised on new contracts for Raphinha, Marc Bernal and Xavi Espart. Raphinha’s proposed exten...
Britain’s Burnham is set to meet Trump for the first time at the UN in New York
Britain's Prime Minister Andy Burnham is set to meet U.S. President Donald Trump for the first time. The meeting will take place on the sidelines of the United Nations General Assembly in New York. Burnham plans to discuss ways to bolster Ukraine's defenses and ease fuel prices that have soared since the US-Israeli war with Iran blocked ships from moving freely through the Strait of Hormuz. Burnham, once critical of Trump, now says he wants to seek common ground. Trump has called Burnham “a nice guy,” but has also concerned U.K. officials by expressing support for Irish unification and musing about the future of the Falkland Islands.
New Jersey Politics (Episode 530)
This week on New Jersey Politics with Laura Jones, Assemblywoman Marisa Sweeney discusses her bill requiring AI companion apps to repeatedly disclose they are
OpenAI agent hacked into Australia’s national healthcare system
An OpenAI agent hacked into a database of Australia’s national healthcare system, Australian Prime Minister Anthony Albanese told reporters on the sidelines of the UN General Assembly in New York.
Sega Pulls Disastrous Total War: Shogun 2 Remaster From Sale Following Backlash
Creative Assembly and Sega have pulled Total War: Shogun 2 — Complete Edition from Steam after a raft of complaints about the quality of the remaster.
Trump threatens to send Iran 'into hell' if war carries on
The president's remarks at the United Nations come more than six months into a war that has grown increasingly unpopular at home.
Netanyahu says attacking Iran was ‘one of the easiest decisions’ he’s ever made
He denounced as “moral cowards” a mass of delegates who walked out of the U.N. General Assembly when he took the podium to speak
BUSINESS UPDATE: A 138-year-old New York Manufacturer Gets Another Life in Fulton
E.J. Willis Co. was founded in New York City in 1888 and for generations it has made ship’s bells and other equipment for the U.S. Navy and American shipbuilders. This summer, the new owner moved the company’s equipment to Fulton By Stefan Yablonski E. J. Willis Co. cast brass ship’s bells — handcrafted in the United States since 1888. Ship bells, “built to last a lifetime at sea,” are now manufactured in Fulton. E.J. Willis Co. has moved its operation and manufacturing business to Fulton. They are currently operating out of N.E.T & Die. The company is now under the ownership of Jonathan Hyatt. He recently acquired the company after seeing a for sale note on Craigslist. [caption id=attachment_11110 align=alignright width=400] Entrepreneur Jonathan Hyatt is the new owner of E.J. Willis Co. He bought the business this summer after finding a listing on Craigslist by chance.[/caption] “I had been looking for something to do. I had been 20 years in corporate America and I was just tired of building someone else’s empire, you know what I mean? I was in consulting, pretty much a jack of all trades. I wanted to do something that I could call my own,” he explained. “I’d been on this path of trying to find a business to buy for about a year. One night I am on Craigslist about 11:30 in mid-April searching for something completely unrelated. At the bottom of Craigslist was a ‘things you might be interested in from outside of your area.’ There was an ad that said 138-year-old bell manufacturing company for sale. So, I clicked; why not, right? I wasn’t looking to buy a manufacturing company, but I went down the rabbit hole, absolutely fell in love with the history and ended up buying it.” He read the ad and responded. “I called and I am talking to the owner of the business for about two hours. We ended with, let’s have another chat and then come on out here and have a look. I figured, well I might wind up getting kidnapped and getting murdered or there is a real business here. But I gotta see it through,” he quipped. “And sure enough, there is a big machine shop operation there. The gentleman who owned it was retiring and in the corner of this shop is a little room where they make bells and they have been doing this ever since the company had started.” That’s the one constant thing that has survived the changes of the business. [caption id=attachment_11061 align=alignright width=300] Sales 1929 general catalog published by E. J. Willis Co, listing all the merchandise it sold. It’s like the Sears Roebuck and Co. catalog for marine parts.[/caption] “I drove home and told my wife, ‘This is what I am doing for the rest of whatever we are calling this — mid-life crisis.’ And she said, ‘absolutely you got to do it.’ I took out a loan and off we go.” He put in an offer on the business and they closed on July 1. He didn’t disclose what he paid for the company. “In terms of price, the seller and I have agreed to keep those terms private.” “I am finding that I am a business owner, an archeologist, opening files and cabinets that haven’t been opened in 100 years. It’s just amazing, just cool things that I am finding,” he said. “I want to build the business back. I want to be able to sell the bells to outsiders. I think they are beautiful. “It’s really a wild story about a company that started in lower Manhattan, exploded in the automotive space, sold parts to the Wright Brothers, moved into the aeronautical world and then landed in marine. The cool thing, I have been digging around and the gentleman who owned the company prior to me was not a digital guy. There is nothing out there. “Now I am sitting here with all the art from like the 1930s, the E.J. Willis boat catalog it’s like 250 pages of things this company used to make. It’s like the Sears-Roebuck and Co. catalog for marine parts. We are modernizing, we are staying true to the heritage of the business. It’s exciting to be the next steward of the whole business.” Initially he thought he’d move everything from the company’s plant in Middleville, Herkimer County, to Boston, out of convenience. “Then I thought let’s keep the foundry where it is. Let’s not move anything right away,” he said. “I want to get a good sense of what we’ve got, what works and what doesn’t. “I went to the foundry and met with the people there, lovely people, and said here is my position — I am buying a company where everyone is retiring. There is machining and polishing to be done, who would you work with around here? Without hesitation they said, ‘you need to go to NET Tool & Die and talk to Michelle [Shatrau]. She is a third-generation machinist and she runs the company now.’” So, he drove to Fulton. “I knocked on the door, they let me in. And she said, ‘how’d you get in here?’” he said with a laugh. “We became fast friends. I told her what I am doing. It must have struck a nerve. She has a very entrepreneurial background. I must have said something right because she came out and she said, ‘I’d love to help you. Why don’t we move the equipment that you have into my large building and I will give you a space to work at and use my team?’” [caption id=attachment_11058 align=alignleft width=300] Bell in progress awaiting assembly[/caption] It’s a great relationship so far. “We are bringing the business into the modern world. It’s been a lot of stuff all at once. But it has been very exciting,” he said. “We moved in a month ago [in July]. We closed on the business July 1. We moved a couple weeks later. We had all our equipment set up, electrical being run, everything. [caption id=attachment_11059 align=alignright width=300] Bell attached to a lathe going through the machining process[/caption] “We’re working with NET Tool & Die to rebuild production and preserve manufacturing processes that, in some cases, existed mostly in the heads and hands of the people who had been doing them for decades. We’re currently working on several 200-pound ship’s bells and bringing an old two-way manual bilge pump back into production.” He said he will be working with NET employees for the time being, adding, “I’d love to get to a point where I have so much growth that I need to hire people.” No one wakes up and says, ‘I am buying a bell today,’ Hyatt admitted. [caption id=attachment_11060 align=alignleft width=225] Bell after receiving a custom etching toward the bell mouth[/caption] “Everyone does wake up and has things that deserve acknowledgment and remembering — a promotion, a marriage, the birth of a child,” he said. “These are the things I feel like if there was something that could capture a particular moment in time and will literally outlast the person that bought it, a bell is that. We can engrave a bell if you get married or the birth of a child. We can put anything on a bell. “I have orders, yes. I am working on several orders right now. We have a little bit of busyness. But there are still some things to work out. I want to make things consistently and continue to move forward.”
Anchorage Assembly members float new campaign requirements for local political offices
The proposed change could require would-be candidates to submit a minimum number of signatures gathered from qualified voters in order to appear on municipal ballots.
Reclaiming 'Health Sovereignty': EU Gastein Forum Confronts A Fragmenting Global Order
Health, long treated as a sanctuary of diplomatic consensus, has entered an era of high politics and ideological division. Leading the closing panel of the EU Health Forum Gastein (EHFG) on Friday (2 October), session chair Ilona Kickbusch, founder of the Global Health Centre at the Graduate Institute in Geneva, highlighted how recent votes at the UN General Assembly demonstrate that nation-states increasingly split and vote instead of searching for consensus.
Here’s how many iPhone Duo units Apple is reportedly making
A recent report offers an update on iPhone Duo production, including how many units are being made, assembly troubles, and more.
Issue 3: What’s on the table?
In an earlier column, we reviewed the economic-development tools currently available in Arkansas and how Issue 3 can expand that toolbox by authorizing the General Assembly to provide for economic...
UN Decade of Healthy Ageing midpoint report finds progress, calls for greater investment
New evidence in the Secretary-General's report to the 81st UN General Assembly, prepared by the World Health Organization (WHO) in coordination with the UN system, finds more countries acting on healthy ageing than ever before – but longer lives will not become healthy, dignified ones without faster, more sustained investment at country level.(NEW YORK, 28 September 2026) The Secretary-General transmitted to the 81st session of the UN General Assembly the mid-term progress report on the UN Decade of Healthy Ageing (2021–2030), marking the midpoint of the ten-year global effort to improve the lives of older people. The report was prepared by the World Health Organization (WHO) in coordination with the UN Inter-Agency Group on Ageing and with inputs from thirteen UN entities, the World Bank Group and civil society partners. It finds real progress in countries – and persistent gaps that must close before 2030.The number of people aged 60 and over passed 1 billion in 2020 and is projected to reach 2.1 billion by 2050, with the fastest growth in low- and middle-income countries. Longer lives are not automatically healthy ones: globally, the gap between life expectancy and healthy life expectancy at age 60 widened between 2000 and 2023, and an estimated 71% of excess deaths from COVID-19 between 2020 and 2023 were among people aged 60 and over. “Longer lives are one of humanity’s great achievements, but we cannot congratulate ourselves while leaving millions without health and support,” said Dr Pascale Allotey, Director, Department of Sexual, Reproductive, Maternal, Child and Adolescent Health and Ageing, WHO. “The first half of the Decade has shown what is possible. The second half must be about scaling and financing the progress to meet the needs and rights of older persons.”Real progress, unevenly sharedThe report finds that more countries than ever now have legislation against age-based discrimination – up from 44.5% in 2018 to 57.7% today – and over half now have national long-term care policies, up from 49% in 2023 to 56.7%, dedicated programmes to build age-friendly environments (54.6%), and comprehensive health and social assessments of older people (54.6%). New WHO guidance on services for long-term care and for Integrated Care for Older People (ICOPE) delivered in communities is enabling systemic change as an increasing number of countries incorporate these services within national universal health care benefit packages. A host of UN agencies and other partners support training, increasing health workforce competencies and use of digital health tools.“This report shows the Decade of Healthy Ageing is working,” said Dr Ritu Sadana, Head of the WHO Secretariat for the UN Decade of Healthy Ageing. “More countries are legislating against ageism, providing integrated care, strengthening long-term care systems, and creating age-friendly environments than ever before, in all regions and income levels. But progress is uneven and in one area, regressive: fewer countries report active multi-stakeholder forums on ageing, down from 53.1% in 2020 to 43.3% today. The second half of this Decade must turn commitments into results, in every country.”The financing gap: this Decade's binding constraintFinancing remains the binding constraint: more than a third of reporting countries (33.8%) have very little or no dedicated resources to develop long-term care, with similar shortfalls across the Decade’s other priority areas. Less than half of countries (45.4%) have legislation providing access to assistive devices (including hearing aids, spectacles or rollators), which are key to enabling older people to maintain productive, independent and dignified lives. Only 22.7% of countries can track older people’s health over time – the largest gap across the Decade’s core progress indicators. Nationally representative information is needed in each country, as policies and interventions cannot be designed as if all older adults of a given age share similar needs and capacities. The report calls for sustained investment through national budgets, country-owned plans, development cooperation and innovative financing mechanisms to fully close these gaps by 2030.“The Decade was designed as a whole-of-UN effort, and this report shows it in action,” said Amal Abou Rafeh, Chief of the Programme on Ageing Section at the UN Department of Economic and Social Affairs (UN DESA), and Permanent Co-Chair of the UN Inter-Agency Group on Ageing. “Thirteen UN entities, the World Bank group and civil society organizations contributed to this report, with WHO as the lead technical and implementing agency. That is the model of coordination the second half of the Decade will need to scale, with countries leading legislation, funding and implementation, engaging older people.”“Investing in healthy ageing is not simply a cost; it is one of the highest-return investments a government can make,” said Fiona Stewart, Global Lead for Ageing and Pensions at the World Bank Group. “Countries that invest early in integrated and long-term care see savings that outweigh the upfront cost many times over. The evidence in this report makes the economic case; what is now needed is predictable financing at country level to act on it, along with efforts to support older entrepreneurs and the silver economy.”Older people's own voicesThe report also draws on the direct experience of older people themselves, including a multilingual global survey conducted by the International Federation on Ageing that reached more than 1000 older people across 58 countries. WHO and UN partners called on Member States to use the second half of the Decade to accelerate implementation, strengthen data systems, and secure the financing needed so that the gains of longer lives reach older people everywhere. About the UN Decade of Healthy Ageing (2021–2030)Proclaimed by the UN General Assembly in December 2020, the Decade is a global collaboration bringing together governments, UN agencies, civil society, the private sector, academia and older people themselves to improve the lives of older people, their families and communities. It is coordinated by the World Health Organization together with the UN Inter-Agency Group on Ageing. The Decade's mid-term progress report was transmitted to the General Assembly by the Secretary-General, prepared by WHO, and is available in 6 languages.Full Report available: A/81/366 Implementation of the United Nations Decade of Healthy Ageing (2021–2030): Note by Secretary-General [ العربية | 中文 | English | Français | Pусский | Español
Fact-checking Trump's speech to the 2026 United Nations General Assembly
In his address to the United Nations General Assembly, President Donald Trump defended the United States’ robust use of military force in Iran, Venezuela and elsewhere, saying the international community is incapable of handling threats from those countries. Here are fact-checks of some of Trump’s statements.
Coastal forces shape building sciences practice
When Built Environments relocated to Wilmington, the firm’s partners weren’t looking for the lazy tranquility one hopes for when on vacation. Instead, they sought sultry heat. They wanted to understand whipping coastal winds and punishing precipitation – the kind that tropical storms produce. That’s because how materials degrade can reveal a lot about how they can be improved. “We specifically chose the Wilmington market because it does fall within Climate Zone 3A, which is a coastal warm-humid climate,” said Jarrett Davis, who joined Built Environments in 2023 to lead the company’s building science practice. “There’s not a lot of product research in that climate zone, but there are a lot of structures here that get weatherized pretty severely.” Built Environments has provided building science, material testing and code compliance consulting for 25 years, ever since principal materials scientist Steve Doggett founded the company in Minnesota. “There are very few manufacturers that understand fully how their own materials and products work, whereas we know their shortfalls and their benefits out in the real world on jobsites,” Doggett said. “That’s why the original Built Environments was formed, to make buildings better.” He said the 15-employee company is just as comfortable on a jobsite, retrofitting a high-end beachside property, for example, as it is recreating some of the coast’s most intense weather conditions in the great indoors. The company operates an A2LA-accredited ISO/IEC 17025 mechanical testing laboratory on Wright Street. The year-old facility has expanded Built Environments’ in-house capabilities, Doggett said. “We’re able to simulate that hurricane wind (and) rain and perform structural and impact testing on wall assemblies, roof assemblies and glazing assemblies,” he said. “There are certain requirements that those windows and doors need to meet as far as wind ratings and pressure ratings and things of that nature.” Standard Glass Co.-Glass Depots, of Wilmington, is currently testing a new glazing system using Built Environments’ stress testing, the partners said. One method involves what’s called a “large missile cannon.” “We take 8-foot two-by-fours, and we shoot them at assemblies, so they have to withstand that impact,” Davis said. “It’s pretty cool to see, I’m not going to lie.” In many cases, the lab can run a full, wall-scale test of a product in a matter of weeks or months, whereas “it might take midrange manufacturers years,” Doggett said. “We’re nimble. We can cut that time in half.” The lab also develops intellectual property. Doggett, for example, shares a patent with Sustant LLC, of Minnesota, on a fastener patch to increase the air and water tightness within building envelopes. “We have too many ideas and not enough time,” he said. But the partners noted that they or their fellow principals – of which the company has four total, including a principal engineer and a principal codes and standards expert – could be anywhere on a given day, including in the courtroom providing expert testimony in contentious insurance cases. “Let’s say there is a fire on a structure,” Davis said. “We can analyze all the specific materials within that assembly – an exterior wall or something like that – because there are loads that require certain heat release. And so, we can measure each one of those materials, if need be, to say if this was likely or not a code-approved assembly.” Despite what can be inferred in a lab, the partners said nothing beats learning from how materials change over time under real-world strain. Take, for instance, the curious case of the creaking condo. “We recently had a customer that came to us trying to assess a sound issue of a roof. It was making noises that no one could explain or account for. How do you tackle something like that?” Doggett asked rhetorically. “There’s really no generally agreed-upon methodologies.” The problem turned out to be a faulty installation of a commercial roof system. “The building in this particular case was not local,” he said. “In the initial installation, the commercial roofing contractor installed the wrong fasteners in the wrong locations into the deck, and essentially the solar radiation was causing the building to move quite substantially early in the morning when the sun initially hit that assembly after a quite cool evening, causing the threads on the fasteners to kind of jump within the material, within the metal.” Built Environments designed an effective repair methodology that was within budget, the partners said. “We get the bizarre,” Doggett said. “I will say that’s something that has stayed the same over 25 years.” The partners said they are hiring, and that Cape Fear Community College is one of their main recruiting grounds. Davis and Doggett look for talented people who can understand traditional methodologies yet are open to on-the-job training and new understandings, they said. After all, it’s not just weather that can ruin a building. “My favorite saying is,” Davis said, “‘What are the eight most expensive words in construction? That’s how my daddy used to do it.’”
Trump defends US interventions abroad ahead of 'big decision' on Iran: 'Settling years of unfinished business'
At the UN General Assembly in New York City on Tuesday morning, President Donald Trump delivered a speech on America's role in global leadership.
Live updates: Trump to speak at the U.N. General Assembly
Live updates and the latest news as Trump gives a speech at the U.N. General Assembly and meets with world leaders from Denmark, Japan and Ukraine.
Reform and the UAE – a threat to British politics
By Alex Carlen The United Arab Emirates likes to present itself as part of the solution to the climate crisis. The oil-rich Gulf state has committed to Net Zero by 2050, hosted COP 28, and even declared “championing climate action” as one of three strategic objectives for this week’s session of the United Nations General Assembly. But behind the scenes the UAE has quietly built one of its closest political relationships in Europe with the party most hostile to climate action in Britain: Nigel Farage’s Reform UK. There is no evidence that the UAE is funding Reform. But a new FairSquare report, Petro-populism: the UAE–Reform threat, published today, documents a growing political relationship that should concern anyone interested in the integrity of British democracy. Reform’s leaders have embraced the UAE’s political model and promoted positions that align closely with the Emirati government’s priorities, while the UAE has given Farage and his party unusually warm access and public backing. What is emerging is not simply a relationship between British politicians and a wealthy Gulf state, but a channel through which an authoritarian government can cultivate political influence here, and abroad. Democracy for Sale relies on its readers. If you already support us, thanks so much. If you don’t, sign up to support fearless independent investigative journalism. Subscribe Back in January, Nigel Farage appeared at a GB News event in Dubai. On the 50th floor of a tower overlooking the luxury resorts and upscale residences of Palm Jumeirah, the Reform leader declared: “I want Clacton to look like this.” At the event – which Farage never declared on his official register of interests – senior Emirati officials mixed with British expats. Farage was keen to flatter. “We recognise you are our friends”, he said, assuring them that “a Brexit London, a Reform London, will remember you.” Controversy surrounding Reform’s finances and its susceptibility to foreign influence have centred around high-profile donations from billionaire crypto donors, and the jailing of Nathan Gill, Reform’s former leader in Wales, for accepting bribes to give pro-Russia speeches. Far less attention has been paid to Reform’s blossoming new alliance with the UAE, an oil-rich authoritarian state with a track record of ruinous anti-democratic interventions. Farage wasn’t always so fond of the UAE. Back in 2023 he called it an “absolute monarchy with an abysmal human rights record.” Now Reform’s hierarchy calls the UAE home. Deputy leader Richard Tice splits his time between his constituency and Dubai and has called on the UK to learn from the UAE. The party’s treasurer Nick Candy runs a firm which has been in partnership with a UAE-state linked firm since 2024. Nadhim Zahawi sits on the board of an Abu Dhabi think tank alongside an array of the most senior UAE officials and is reportedly close to three brothers of the country’s despotic ruler Mohammed Bin Zayed. Reform’s leading lights have effusively praised the UAE’s governance model, defended it from criticism, and advanced its political agenda in the UK. GB News, whose two major shareholders – the Legatum Foundation and Paul Marshall – have strong links to the UAE, has been more than happy to broadcast UAE propaganda and was forced to pay damages in 2025 after airing a false claim about a UK charity by the UAE “disinfluencer” Amjad Taha. The UAE has responded in kind. When the UAE Minister for Foreign Affairs conducted an official visit to the UK in May, Farage was the only non-government figure granted an audience. UAE state media publicised the meeting, and said that they discussed “the strategic relations between the two countries and ways to enhance them in a manner that serves mutual interests.” For the UAE these ‘mutual interests’ largely concern its paranoia over political Islam, and in this regard the UAE-Reform alliance is part of a broad and troubling pattern. Following a crackdown on dissent at home in the aftermath of the Arab Spring, the UAE has offered material and political support to a range of violent and authoritarian actors willing to oppose the Muslim Brotherhood with no regard for the consequences. Its meddling in Egypt, Tunisia, Yemen, and most notably Sudan, have been devastating. The UAE’s strategy of seeking out partners on the political fringes who it believes will advance its interests is not unique to Britain – it extends beyond the Middle East to Europe and the US. In France, it has offered clandestine support to Marine Le Pen through secret meetings, as well allegedly funding trips to the region after which Le Pen returned with a renewed focus on the UAE’s perceived enemies – Qatar and the Muslim Brotherhood. Left-wing opposition leader Jean-Luc Mélenchon has accused the UAE of smearing him and of “encouraging discrimination, hatred or violence”. In the US, the UAE actively supported the rise of Donald Trump, establishing itself as a key ally during both his first and second terms. Around these relationships sits a wider ecosystem of figures willing to amplify UAE narratives, that even extends to Andrew Tate and Tommy Robinson. Subscribe In Britain, the UAE has used a combination of aggressive diplomacy and illicit, disruptive tactics to achieve its policy goal of eliminating any perceived threat from political Islam. In 2012, for instance, it threatened to block billion-pound arms deals with the UK and stop inward investment if David Cameron did not act against the Muslim Brotherhood and rein in the BBC’s coverage of the group – going so far as to suggest, with no supporting evidence, that the group had infiltrated the BBC. It has financed smear campaigns against a high-profile UK charity and funded a mercenary to secretly surveil, and possibly assassinate, a British national on British soil. In Reform UK, the UAE has finally found an ally willing to not only ban the Muslim Brotherhood, but to publicly vilify the group and repeat the UAE’s claims that dangerous Muslims are a fifth column in British society, a narrative that aligns with the Islamophobia and anti-immigration sentiments that underpin Reform’s populist politics. The Rycroft review into foreign interference concluded that “hostile states and non-state actors have a clear incentive to attempt to undermine UK democracy.” The UAE’s network and alliance with Reform must be understood within that framework. It is a powerful, disruptive and deeply authoritarian actor with the resources and networks to intervene in our politics, and a track-record of doing so in a multitude of other countries. The evidence of the threat the UAE poses is overwhelming. The question is whether parliamentarians are willing to call the UAE out and demand action using the tools that the government has to respond. Placing the UAE on the “Enhanced Tier” of the Foreign Registration scheme alongside Russia and Iran would send a powerful signal to the UAE that its meddling will no longer be tolerated, and would place Farage’s next trips to the UAE under the scrutiny they deserve. Alex Carlen is research and advocacy manager at London based human rights organisation FairSquare and author of its new report Petro-populism: the UAE–Reform threat. Subscribe
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Assemblymember Carl DeMaio, a conservative from San Diego County, has become a prominent voice for state Republicans. His vehicle this election is Proposition 39, the voter ID measure.
Hood: Pay for performance, not for politics
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Parliamentary government and political competition are the oldest traditions in Russian politics. Where did they come from, and why did they disappear? Writer Mikhail Zygar explains in a new film.
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