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Yankees Birthday of the Day: Sandy Alomar
The patriarch of one of baseball’s most famous families would have turned 83 today.
Mom-and-Pop Business Owners Grapple with Harsh Times
Report shows small business owners in NYS less optimistic about the economy. Taxes, inflation, labor costs and competition from larger businesses are major concerns right now, they say By Aaron Gifford [caption id=attachment_11067 align=alignright width=300] Ashley Ranslow is director for New York state at The National Federation of Independent Business (NFIB).[/caption] Owners of mom-and-pop businesses in New York state have been less optimistic lately than their peers in other parts of the country, a recent report indicates. The National Federation of Independent Business (NFIB), based on a survey of 11,000 of its members in the Empire State, reported that taxes, inflation, labor costs and competition from larger businesses are major concerns right now. “Indeed, while taxes are a major problem in New York and the United States overall, New York small businesses notably are struggling more with the state’s onerous, multi-level tax burden,” Ashley Ranslow, NFIB’s director for New York state, said in the July report. Compared with surveys of business owners in other states, far fewer New York respondents rated their businesses as in excellent or good health. The report also said labor costs here are about 25% higher than the national average and are the “single most important problem” facing businesses. One respondent to the New York-specific survey complained that too much red tape, taxes and laws that restrict high-yielding companies have stifled their operation’s growth. Others said high disability and workers’ compensation insurance costs, alarming increases in utility rates and excessive building regulations are discouraging. Statewide, New York has a gross domestic product of $2.53 trillion (third in the nation, followed by Texas, $2.90 trillion; and California, $4.25 trillion), a per capita income of $90,500 (sixth) and an unemployment rate of 4.6% (34th). There are 2.4 million small businesses that employ 3.9 million people. [caption id=attachment_11112 align=alignright width=451] Member of the Greater Liverpool Chamber of Commerce gather at one of the several functions the chamber organizes monthly. “Everyone in this business community encourages each other to shop local. Everyone just wants to see each other succeed,” says Megan Wilmot, the chamber director[/caption] “New York state boasts one of the largest, wealthiest and most diverse cities in the world — and that’s still only about half the state’s population,” the report said. “In other words, the state is both its iconic city and so much more — geographically, demographically, economically. But New York is not without its challenges, challenges that include notably high taxes and other weaknesses that impact the small business environment,” it said. The report includes an optimism index that compares responses from New York (NFIB) members with those of their peers in other states across several categories. This ranges from plans to increase employment to expectations for higher sales, to plans to increase inventory or expand. The scores for Empire State business owners were lower in most categories, but they did score higher than the national average in noting that they have current employment openings, and that they are hopeful that the economy will improve. “The metrics so far paint a picture of a state with a series of challenges for small businesses, from a slightly below national average Optimism Index to a more seriously below national business health to very substantially below national Employment Index. What is going on with businesses that are creating these differences?” the report stated. In Central New York, the regional labor force comprises nearly 398,000 workers. The median household income here is $71,463, and the gross domestic product for the region last year totaled $61.3 billion, according to the CenterState CEO economic development and research organization. About half of the region’s labor force works for small and mid-sized businesses, although the number of people employed in that sector has decreased by 7% since 2010, according to CenterState’s 2026 economic forecast report. “While record-high employment in large-scale enterprises provides a strong foundation for Central New York,” the report says, “the long-term health of communities depends on a thriving small business sector to serve as a stabilizer.” Area employers identify several barriers to Central New York’s anticipated growth, including lack of specialized or skilled workers, government regulations, unaffordable housing options and long-term construction disruptions. In the city of Syracuse, the number of jobs in retail trade decreased by 1,500 or 4.7% between July 2025 and this past July. By contrast, the number of jobs in the leisure and hospitality sector increased by 2.5% or 700 jobs, in the same annual period, according to the New York State Department of Labor. Still, there’s plenty of interest for new businesses across Central New York. U.S. Census figures show that the number of applications for new businesses in all four counties increased significantly in the past 20 years. In Cayuga County, there were 324 applications in 2005 compared to 470 last year. In Madison County, the number increased from 385 to 480; Onondaga County, from 2411 to 4132; and Oswego County, from 553 to 836. Downtown Cazenovia is exemplary of Madison County’s trend: In the past year, the village welcomed a bait shop, a thrift store, a vitamin infusion center, a pizzeria, a Pilates studio and an Italian restaurant. A candy store is scheduled to open on the main drag in the months ahead. Oswego’s list of interesting new businesses in the past year includes a bubble tea shop, a hot dog eatery in Fulton, a specialty grocery store that features New York state products in Mexico, a beauty and esthetics studio in Hannibal and a hardware and farm supply store in Sandy Creek. In Onondaga County, the Liverpool area has also enjoyed a steady stream of new shops and eateries in recent years. That suburban community is unique in that, unlike neighboring communities, most of the restaurants are family-owned and not part of a national chain. [caption id=attachment_11116 align=alignright width=300] Megan Wilmot is the executive director of the Greater Liverpool’s Chamber of Commerce.[/caption] Megan Wilmot, executive director of the Greater Liverpool Chamber of Commerce, said independent business owners in her community maintain a strong sense of pride in holding their own against national companies. The chamber helps boost morale with red carpet events, ribbon cuttings, coffee hours and five-year anniversary celebrations for participating businesses. “We have built such a strong community,” Wilmot said. “Everyone in this business community encourages each other to shop local. Everyone just wants to see each other succeed.” In Syracuse, the downtown retail occupancy rate last year was about 82%, a slight improvement from 2024, according to the Downtown Syracuse Committee’s most recent annual report. Buildings with the largest amount of vacant space included The Galleries, One Park Place, and Equitable Towers, though not all of those spaces are designated for retail use. New businesses that opened in downtown Syracuse last year: Better with Time Clothing, Dakshin Curry & Biriyani, Havana Tattoo Society, Milano Bean Café, Miss Daisy, Pausa Coffee, Sweets for Babe, The Society CNY and Yafah Beauty Studio. The Destiny USA mall’s occupancy rate decreased from 80% in 2023 to 72% by the end of 2024, according to Integra Realty Resources. That leaves more than a quarter of the mall’s retail space vacant. “Looking ahead, the retail market is expected to see minimal rent growth, with vacancy rates likely remaining stable in community and neighborhood centers but continuing to rise in enclosed malls,” Integra’s report said. “New construction activity is low and redevelopment plans for former malls like Shoppingtown and Great Northern are still in the planning stages. The proposed Micron chip plant may spur development, but challenges remain in finding co-developers for large-scale projects.” Nationally, the U.S. Chamber of Commerce expects that small businesses will remain resilient and see their sales and revenues eventually improve. That organization, in a recent national survey, found that 25% of small business owners expect the economy to improve in 2027, while 45% indicated that they plan to increase employment in the next 12 months. And 69% said they believe their small business is in good shape and 70% said they are comfortable with their current cash flow. Thirty-one percent of small businesses reported raising their prices in July and 28% are planning to raise their prices within the next three to four months, the report said. Twelve percent indicated that this is a good time to expand their business. “Small business owners voice optimism for future revenues and hiring,” the report said. “High costs continue to be a wet blanket on reinvestment.” The NFIB reported in July that Main Street, despite gas price hikes, “is OK … for now.” Its small business economics trend report said sales across the country have been strong compared to last year, but continued inflation and higher prices from mom-and-pop establishments are causing some “cracks” to show. “If costs stay this high for much longer, reduced investment will have a tangible economic impact,” the report said. “The status quo is OK, but the outlook? The outlook is uncertain.”
How pod protectors promote safe interactions with dolphins
Southwest Florida’s ocean life is full of beauty. From the sea turtles that hatch their young on our sandy shores to the manatees that can be seen floating throughout the
TeraWulf to double data center size near Ashland; Ky. Power to add unit at Big Sandy
TeraWulf Inc. plans to double the capacity of its AI data center at the EastPark industrial park near Ashland a year ahead of schedule, which the two companies say would lead to lower residential electric bills for residential customers. Also, the data center could double in capacity again, TeraWulf says. Kentucky Power says it plans to add a new generating unit at the Big Sandy Power Plant near Louisa, Kentucky, as part of the expansion.
Beloved Belleville gardening business to close after 21 years
After more than two decades helping customers make their yards more beautiful, Sandy’s Back Porch Gardens in Belleville is set to close its doors early next month. “I keep telling people that there are mountains to climb, hills to roam and rivers to raft, and I want to do all those things,” owner Sandy Richter said.
2026 Saw Breakout Stars and Return of Vintage Sandy
Sandy Alcantara reclaimed his ace status and shattered franchise records, leading a resurgent Miami pitching staff fueled by Max Meyer’s All-Star emergence and Eury Pérez’s dominant growth.
Sandy's Fine Food Emporium's new owners keep it a family business
WESTERLY — A new chapter in the story of Sandy's Fine Food Emporium — the local, family-owned market at 15 Post Road — began this week as Sandy’s approaches its
Brewers' Misiorowski Makes 76-Year-Old MLB History
The 24-year-old Milwaukee Brewers ace joins Sandy Koufax in an exclusive statistical club.
Intel Panther Lake Teardown, 18A, BSPD, GAAFET, SemiAnalysis STEEL
Panther Lake debuts the first commercial implementation of backside power delivery (BSPDN), introduces Intel’s first iteration of gate-all-around (GAA) transistors, and showcases their advanced packaging capabilities with its Foveros-S assembly. With Panther Lake, Intel’s manufacturing arc has shifted from nebulous roadmaps to shipped silicon, a significant milestone on their long road back to competitive semiconductor manufacturing. To evaluate the extent of Intel’s comeback, we tore down Panther Lake. The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. Our teardown traces 18A from its four-sheet RibbonFETs (Intel’s marketing name for GAAFETs) and gate stacks through contacts, frontside and backside wiring, and the bonded carrier. We explain how these material and integration choices improve gate control and reduce resistance, while adding capacitance, thermal resistance, and process complexity. Our measurements put Panther Lake’s 18A compute logic and TSMC N3E GPU logic at similar logic density. However, 18A does not lead TSMC N3P, N2 or Samsung SF2 in peak density. Panther Lake’s CPU cores are incremental updates, and the high-end GPU still uses TSMC N3E. Panther Lake assembles one compute tile, one GPU tile, and one I/O tile atop a passive base tile using Intel’s Foveros-S advanced packaging. Both compute tile variants use Intel 18A. The Xe3 GPU options are a 4-core GT1 tile on Intel 3 and a larger 12-core GT2 tile on TSMC N3E. Both I/O tile variants use TSMC N6. [1], [2] Our analysis centers on the PTL-U compute tile, both the 4-core and 12-core GPU tiles, as well as the 12-lane I/O tile. In conventional chips, power and signal are routed through the same frontside metal stack towards the device frontend. Power rails consume scarce routing resources near the transistors, while tall via stacks carry VDD and VSS from the coarse upper wires to local rails. Backside power delivery (BSPD) moves the main power network behind the transistor layer, to the backside, separating it from frontside signal routing. We covered BSPD and its impacts in 2024. [3], [4], [5] Intel’s BSPD implementation, branded as “PowerVia”, routes power through dedicated backside metals to nano-TSVs, which connect those rails to local source/drain (S/D) contacts. Implementing that separation requires Intel to build the interconnect stacks from both sides of the wafer. The frontside comprises the M0-M14 signal stack, while the backside comprises the BM0-BM5 power stack. M0 and BM0 are closest to the transistors. The nano-TSVs connect the two sides, but Intel patterns and etches each via from the front after forming the contacts. A narrow via runs from the side of the contact deep into the silicon substrate. Intel then completes the frontside signal metal stack, bonds the wafer to a carrier, flips it and removes the original substrate until the buried via tips are exposed. The backside metal stack is then deposited directly on the revealed vias. The nano-TSV and backside-via profiles taper in opposite directions because Intel forms them from opposite sides of the wafer. The transistor structures form the FEOL. Local contacts and nano-TSVs connect them to the wiring. M0 begins the frontside interconnect stack. The silicon carrier remains attached above the frontside interconnects. It supports the device wafer during substrate removal and backside processing and remains part of the finished chip’s thermal path. PowerVia removes the main power distribution from the congested frontside metals, routing supply through shorter and wider backside wires. Its lateral landing still occupies area in the standard cell, so it recovers less cell area than a direct backside contact. [3] Nano-TSVs beside the logic devices carry VDD or VSS from the backside power network, while signal connections continue upward through the frontside metals. Backside Interconnects Samsung SF2 data is included for comparison to Panther Lake’s within this article. SF2 is the incumbent GAA foundry node but lacks BSPD, serving as a useful reference to evaluate 18A. A full teardown of Samsung’s S26 products, processed on SF2, will be shared soon.Nanosheet-cut EDS comparison. The PowerVia supply path runs from the backside Cu rails through Mo-lined W nano-TSVs to the local transistor contacts. In this cross section, the tapered connection spans roughly 150 nm from the contact level to BM0. The Ta liner confines Cu and promotes adhesion to the surrounding stack; the AlOₓ etch stop controls the next dielectric etch above the rail. Dielectric beneath the ribbons electrically separates the devices from the backside wiring and removes the conducting silicon body below the channel. [6] AlOₓ serves as an etchstop (ES), enabling endpointing and protecting the underlying layers. Low-volatility aluminum fluoride reaction products resist the fluorinated plasma, allowing a thin AlOₓ film to protect the metal while the surrounding low-k dielectric is removed. [6], [7]. While the BM0 and layers above the M1 lines show double AlOx layers, Our SMIC N+3 teardown showed single AlOₓ layers. SMIC uses a simpler local AlOₓ substack, while the remaining cap and etch sequence provide the required landing protection. So why double layers? The closely spaced AlOₓ doublets provide two protected endpoints in the etch sequence. Intel documents an AlOₓ/SiN/AlOₓ stack that explains the benefit. The main dielectric plasma etch stops on the first AlOₓ film; a selective wet clear opens that film; a second plasma etch removes the intermediate SiN and stops on the second AlOₓ film. The final wet clear exposes the metal landing surface. SiN is the intermediate dielectric in Intel’s published example. [8] The second stop protects the metal through a cap breakthrough. Wide openings can etch faster than narrow ones, and etch depth varies across the wafer. Metal under an early-clearing opening would otherwise be exposed while other openings still need more etching. Staged protection widens the process window and reduces metal erosion, corrosion and void formation. [8] TSMC documents AlN/AlOₓ/SiOC/AlOₓ above Cu, with AlN blocking Cu diffusion, and a simpler AlN/SiOC/AlOₓ variant that omits one AlOx film. [9] Levels with different opening sizes, aspect ratios, pattern densities and cap materials need different etch margins. A double AlOx stop is useful where another protected endpoint justifies the added processing. The extra film adds formation, selective opening and cleaning steps, plus another set of interfaces to control adhesion, moisture, and stress. These blanket films are opened through the existing via pattern, so each film does not require another lithography mask. AlOₓ adds parasitic capacitance when it replaces lower-k dielectric; two thin AlOₓ films can nevertheless contain less AlOₓ than one thick film. Total thickness, placement, and theintermediate dielectric determine the electrical cost. Deposition chemistry also changes AlOx permittivity and residual hydroxyl content, which can oxidize the underlying metal. [7], [8], [10], [11] The backside stack separates into relatively fine BM0-BM2 wiring near the devices and coarser BM3-BM5 power distribution. The largest pitch increase occurs between BM2 and BM3. BM0’s pitch closely matches the logic-row height, fitting local power delivery to the cell rows. Higher levels aggregate current through larger conductors: routing density becomes less important than low resistance and current capacity as the network approaches the package. This hierarchy provides wide power wiring for the power delivery network without consuming scarce frontside signal-routing resources. [3] The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. Frontside Interconnects Intel 18A combines Mo-lined W contacts and nano-TSVs with a separate backside Cu power network. Samsung SF2 keeps power on the frontside, using Ti-based contact interfaces and Ta-based barriers and Co liners around Cu wiring. In 18A standard-cell rows, backside power rails supply the devices through nano-TSVs within the cells, freeing frontside routing resources. Samsung’s M0 accommodates both power and signal connections. From the device toward M0, the connection runs through a Ti-based S/D interface, W contact fill, a Mo-lined W via, and the Cu M0 wire. Mo supplies a conductive nucleation and adhesion layer for W, replacing the resistive TiN liner used in conventional W integration. This increases the effective conduction volume within the feature while retaining W fill and its established polishing, cleaning and etching processes. Intel’s Mo/W patent describes this integration tradeoff. The nano-TSV uses the same Mo-lined W construction in the backside supply path. [12] The move from TiN to Mo is an incremental change. While a full Co or Mo fill can also reduce the volume lost to liners in very small features, it requires new integration schemes that increase complexity and risk. Cu remains attractive for wider wires due to its low resistance. As wires and vias shrink, the diffusion barrier consumes an increasing fraction of their cross-section. [12], [12], [14] Intel uses Co/Ru liners at M0-M1, Co at M2-M4, and Nb at M5-M9. The lower-level liners help Cu adhere and reduce void formation during trench fills. Applied Materials’ Endura has new thermal control that facilitate wetting process, so the thin film continuity is good enough that good capillary pressure will drive Cu atoms to the via bottom without voiding. Intel’s choice to use Nb is particularly interesting. Intel’s Nb patent describes a conductive diffusion barrier intended to reduce the barrier’s contribution to resistance relative to conventional Ta-based barriers, particularly at via bottoms where all current crosses the barrier. The patent pairs Nb in coarser levels with the option of lower-cost PVD processing. [15], [16] The upper metal layers support thicker barriers formed through physical vapor deposition (PVD) despite its worse coverage and uniformity. Meanwhile, the lower metal layers require thinner barriers deposited through conformal atomic layer deposition (ALD). Co/Ru adds another material interface and requires controlled deposition and Cu fill. Changing liners and barriers by metal layer allows Intel to optimize interconnect resistance, process complexity, and reliability. [15, 16] RibbonFET, Intel’s name for its gate-all-around FETs (GAAFETs), replaces the FinFET’s vertical fins with four stacked horizontal silicon nanosheets, allowing the gate to surround the channel on every side. The path to GAAFET begins with the planar transistor. A planar MOSFET places the gate above the channel between its source and drain. Pairing an NMOS with a PMOS transistor creates a CMOS inverter, in which the NMOS pulls the output low for a high input, and the PMOS pulls it high for a low input. The gate must retain electrostatic control of the channel to ensure clean switching. As gate lengths shrank, the drain began to compete with the gate for that control, increasing off-state leakage. Electrostatic control was restored through an architectural evolution that raised the channel into a vertical fin and wrapping the gate around three sides. Called “FinFET”, this new architecture packed more effective channel width into a smaller footprint. Further scaling made it harder to maintain both drive current and leakage within smaller cells, and reintroduced the same problems planar MOSFETs faced. Nanosheet GAAFETs close the fourth side by replacing the vertical fin with a stack of horizontal nanosheets, each surrounded by the gate. The tighter electrostatic control suppresses leakage at shorter gate lengths while stacking adds effective channel width within the cell footprint. In a FinFET process, channel width changes in discrete steps as designers must add or remove whole fins. Nanosheet width can instead be adjusted continuously within the process’s design rules. Wider sheets increase drive current, while narrower sheets reduce capacitance at the cost of drive current. Intel 18A uses stacks of four nanosheets each and varies their widths across logic and SRAM. At the process level, adding more sheets to each stack increases effective channel width and drive current, but complicates fabrication. RibbonFET vs MBCFET Samsung began GAAFET production in 2022 with SF3E, following with SF3 and now SF2. Its ‘MBCFET’ provides a useful structural comparison with Intel’s first RibbonFET implementation. [17] STEEL is digging deeper into SF2, used in the Exynos 2600, and TSMC’s GAAFET N2, used in Apple’s A20 Pro, in upcoming newsletter articles. We’re throwing some teasers on X. Let’s compare Samsung SF2’s MBCFET with Intel 18A’s RibbonFET. Subscribe Even to the untrained eye, Intel’s extra nanosheet is obvious. Intel stacks four ribbons to Samsung’s three. Samsung’s sheets are much wider in these fields, so both sheet count and width matter to the available channel perimeter. Sheet width also changes which silicon surfaces carry current. On conventional (001) silicon, wide nanosheets emphasize the broad top and bottom surfaces, favoring electron transport; the larger sidewall contribution in a narrow sheet favors hole transport. Thinner sheets improve gate control but increase confinement and scattering. This makes width and thickness part of the NMOS/PMOS balance, alongside strain and threshold voltage. [18], [19] GAAFET designs like 18A use different work-function-metal (WFM) stacks for NMOS and PMOS. Around each ribbon, a thin SiOx interfacial layer separates the silicon channel from the HfOx high-k dielectric, with La providing dipole tuning and the WFM wrapping the dielectric. NMOS uses a TiAl-based stack, while PMOS uses TiN WFM. W fills the remaining gate trench, providing a lower-resistivity path where the work-function layers are no longer needed. In this field, the PMOS stacks leave room for W between ribbons, while the NMOS stacks occupy more of those gaps. A silicon-based dielectric marks the P/N boundary, allowing the PMOS and NMOS gates, sharing the same gate trench, to be processed sequentially. Fast logic paths, retention circuits, and SRAM need a family of threshold options. Changing threshold without substantially changing device dimensions, capacitance or fabrication complexity is valuable. FinFET processes typically use different work-function-metal stacks. In a four-ribbon GAA stack, the narrow sheet-to-sheet gap limits how much WFM can fit around each channel. La in the gate dielectric creates interfacial dipoles at the SiOx/HfOx boundary, shifting effective work function and tuning threshold voltage. This gives Intel another control alongside its NMOS and PMOS WFM stacks. Low-threshold devices improve critical-path drive; higher thresholds reduce leakage elsewhere. Dipole tuning is especially useful in GAA because it changes threshold without consuming the narrow intersheet gap with thicker WFM. Precise control of La incorporation, diffusion and interface quality has long been a challenge, limiting viability in high volume production but is now seen from every leading-edge foundry. Intel’s patent describes depositing a dipole-forming oxide above HfOx and annealing it toward the interfacial oxide before completing the work-function and fill metals. This separates threshold tuning from the space available for metal. Newer research addresses the thermal cost: imec’s 2026 dipole-middle research inserts the shifter between two HfOx depositions, shortening the diffusion path while protecting SiOx during patterning. [20], [21]Matched-cut EDS, Intel 18A (left) vs. Samsung SF2 (right). Intel retains raised source/drain epi beneath its contacts, while Samsung recesses W deep into the epi to form a V-shaped Ti-lined interface. The deeper contact increases metal-to-semiconductor area and shortens the current path from the lower sheets, reducing contact and spreading resistance. It also removes epi volume and brings the contact etch closer to the channel ends. Retaining more epi preserves the material available for strain transfer, especially from SiGe into PMOS. These geometries balance contact access against stress engineering and etch margin. [22], [23] Samsung stacks three sheets to Intel’s four ribbons, and both processes use sheet width to tune drive strength. In our Samsung cross-sections, widths range roughly from 19 to 30 nm in the NPU rows and 37 to 50 nm in the CU cell. The Samsung nanosheets taper, with the widest sheet at the bottom and the narrowest at the top. Both processes use HfOx gate dielectric and Ti-based work-function stacks, with Al in the NMOS stack. In the Samsung devices shown here, the dielectric and WFM occupy the intersheet gaps, leaving W above the top sheet. Intel’s PMOS stack leaves more room between ribbons, and W fills those gaps while the thicker NMOS stack leaves W mainly in the upper trench. Gate-stack EDS maps. The W between Intel’s PMOS ribbons provides a conductive path close to the lower gates. Where WFM fills the entire gap, the gate still surrounds the channel, but voltage reaches it through the more resistive work-function films. Thinner WFM and dipole tuning preserve room for low-resistivity fill; Mo and Ru are alternative fill metals being developed for further scaling. [24] A masked, sequential WFM flow explains the different gate heights and inter-nanosheet fill. The proposed sequence below shows how separate NMOS and PMOS work-function steps produce that geometry. Enabled by the BSPDN process, Intel replaces the dense-logic silicon subfin with dielectric, removing the parasitic conduction path below the ribbons and reducing substrate-related capacitance. A retained silicon body as in classical, non-SOI, planar and FinFET designs needs junction and punchthrough-stop engineering to suppress leakage. Dielectric isolation makes that leakage less sensitive to the subfin doping profile but adds removal and fill steps. It also weakens the direct thermal path through silicon, making the contacts, metal stacks and package more important for heat extraction. [24], [26] Fluorine is concentrated around selected Intel device structures in the maps. WF6 is a standard precursor for W nucleation and fill, while barrier films protect adjacent dielectrics from fluorine attack. Low-fluorine W processes reduce the residual-F burden. Chloride-based precursors avoid introducing F during W deposition, but require control of chlorine attack, nucleation and fill quality. The integration target is a continuous, low-resistance W path with a thin protective liner and minimal chemical damage to the surrounding stack. [20], [27], [28] The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. We measured cell height, gate pitch, metal geometry, and ribbon dimensions at the XTEM sites shown below. The tables group these dimensions by site and device polarity. Our “sheet cuts” cross the silicon channel and show the ribbons end-on. “gate cuts” run along the channel through successive gates. The 18A logic cell dimensions point to a five-track logic library while the N3E and Intel 3 cell dimensions evidence a seven-track logic library. The DDR-PHY uses wider M0 wires and much larger spacing than core logic. That trades routing density for lower wire resistance and weaker coupling between neighboring nets. The geometry suits the current delivery and coupling requirements of analog, clock, and I/O circuitry. PowerVia lets 18A combine a compact cell height with wider M0 geometry by moving the main power rails off the signal-routing tracks. That relaxes local wire scaling while preserving a small cell footprint. Cell height and gate pitch set the geometric density; pin access and routability determine how much of it a real block can use. [29] The biggest takeaway from our gate-pitch measurements is that Intel 18A compute logic and TSMC N3E GPU logic have similar density in the Bohr representative-cell model. The 18A example is 18.6% denser than the Intel 3 GPU example. Gate pitches are nearly identical across the three sites, so cell height drives most of the difference. The Bohr model combines a four-transistor NAND2 spanning three gate pitches and a 32-transistor scan flip-flop (SFF) spanning nineteen pitches, weighting their densities 60:40. The sensitivity column shows how independently changing cell height and gate pitch by ±1 nm changes the result. This compares representative cell geometries; whole-die density also depends on cell mix and placement. The 18A P-core gives M0 substantially more metal cross section than the N3E vector engine. Treating each profile as a trapezoid gives 2.63 times the area per line and 1.84 times the area after normalization by routing pitch. The larger section reduces the geometric contribution to line resistance and lowers current density for a given current. Taller and wider wires also add capacitance, so circuit delay depends on the balance of resistance and capacitance. The DDR-PHY has less metal area per routing width than the 18A core fields, while remaining above N3E. [30] Area = height × (top CD + bottom CD) / 2, including liners. Area/pitch normalizes by routing width. Taper is the symmetric sidewall angle from vertical, with the largest angle belonging to the DDR-PHY. Compute tile The measurements show how ribbon dimensions and gate-stack geometry vary across the compute tile and between NMOS and PMOS to balance channel drive, gate load and the space needed for the dielectric/WFM stack across logic, SRAM and the DDR-PHY. Width mainly changes available channel perimeter; thickness also changes electrostatic control and carrier confinement. Gate-stack thickness then determines the space left for low-resistivity fill P-core and LP E-core logic Both the P-core and LP E-core use multiple nanosheet widths. Widths are measured on high-magnification XTEMs while wider-field images demonstrate additional width choices within the LP E-core. Multiple widths are expected even within an LP E-core. Timing-critical paths, buffers and cells with different fanout need different drive strengths. The lower-magnification fields show this width diversity beyond the sites quantified in the table. L2 and L3 SRAM GAA gives SRAM designers another way to balance the pull-up (PU), pass-gate (PG), and pull-down (PD) transistors. FinFET bitcells set device strength through fin count while GAA adds nanosheet width as a sizing knob. In a 6T SRAM cell, a strong pull-down relative to the pass-gate limits read disturbance, while a strong pass-gate relative to the pull-up improves writability. During a write, the pass-gate and write driver pull the node storing “1” below the inverter trip point. During a read, the pull-down holds the node storing “0” low. Bias, threshold voltage, mismatch and assist circuitry set the remaining margin. FinFET high-current cells commonly use a PU:PG:PD fin-count pattern of 1:2:2, a device-sizing ratio rather than a current ratio. Ribbon width lets Intel balance SRAM strengths without adding whole fins. The L2 cell uses its narrowest ribbons for PU and widest for PD, improving writability and read stability respectively. Intel’s disclosed HCC operates without assist; its denser HDC uses negative-bitline write assist. Pulling the selected bitline briefly below ground increases pass-gate overdrive so it can overpower the pull-up at lower supply voltage. That buys density and low voltage writability at the cost of boosting circuitry, switching energy, and additional voltage stress that must be controlled. [31], [32] Four rectangular ribbons give the perimeter = 8 × (width + thickness), before corner rounding. PG/PU is 1.49 and PD/PG is 1.16. The L3 structures closely resemble L2 in layout and cell height. Fewer L3 nanosheet widths are tabulated because fewer high-magnification images were available. DDR PHY The DDR-PHY trades density for controlled analog behavior and reliable off-chip signaling. It contains drivers, receivers, delay circuits, and calibration logic that set drive strength, sampling time, and voltage margin. Repeated four-sheet devices with similar widths fit the use of regular transistor units for matching and programmable drive. Its wider local wiring provides room for current delivery and separation of sensitive signals, while consuming more area than a dense core-logic grid. The layout serves the memory channel’s electrical requirements as well as digital logic density. [33] The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. Intel 3 GPU devices Vector engine logic Intel 3’s XVE logic uses two-fin PMOS and NMOS devices with power rails in M0. Its cell height and M0 pitch give a seven-track geometry, two tracks more than the 18A logic. One-fin groups also appear among the two-fin devices. Intel 3 L2 SRAM The Intel 3 L2 SRAM uses the familiar HCC sizing pattern: one PU fin, two PG fins, and two PD fins. N3E GPU devices Vector engine logic The N3E XVE field contains repeated two-fin devices with seven-track cell geometry. N3E remains a FinFET process, giving Panther Lake a direct FinFET-to-RibbonFET comparison. N3E L2 SRAM The N3E L2 SRAM uses the same PU:PG:PD fin-count pattern of 1:2:2. Panther Lake-U follows Lunar Lake’s floorplan quite closely. Both pair 4 P-cores with 4 LP E-cores and NPU, media and display engines in similar locations. Lunar Lake also uses Xe2, the direct predecessor to Panther Lake’s Xe3 GPU. This makes Lunar Lake the most direct basis for our comparisons. Arrow Lake differs in core count and uses the older Xe-LPG GPU architecture, so we only use it where it offers a more direct component-level comparison. Compute tile Panther Lake compute-tile floorplans remain sparse even months after launch. Intel 18A’s backside metal and dielectric stack must be removed without damaging the underlying structures before a clean transistor-level floorplan can be imaged. Most published die shots hide or heavily process the background, but we are quite proud of the die shot we achieved and are excited to show the work we have done. We measured the areas of the key components on the compute tile and compared them with their Lunar Lake predecessors on TSMC N3B. These help us to capture changes in block area and compare the two chips across process nodes and designs. Our total tile areas exclude the scribe-line area. The compute-plus-GPU subtotal below uses the PTL-U compute tile and GT1 GPU; it excludes the I/O tile and passive base. Individual block areas use the boundaries marked on the floorplans The compute-plus-GPU row is recomputed from the displayed PTL-U and GT1 areas. Component rows use their stated per-region counts and are not an additive partition of the whole tile. The P-core area remains almost unchanged between Lunar Lake and Panther Lake, despite L2 capacity increasing from 2.5 MiB to 3 MiB. Arrow Lake uses the same Lion Cove core as Lunar Lake but also has a 3 MiB L2. Cougar Cove fits 20% more L2 into the same P-core area. The larger private cache keeps more of each core’s working set close to its execution units, reducing access to shared L3 and DRAM. Extra capacity adds storage leakage and lookup energy, so designers balance it against avoided lower-level accesses. The shared P-core L3 cache also shrank by 14.8%. [2] Cougar Cove combines a similar footprint with Intel’s reported power-efficiency improvements. RibbonFET’s tighter channel control reduces leakage, while PowerVia reduces supply droop and allows tighter voltage guardbands. [1] Darkmont’s four-core LP E-core cluster is 5.0% smaller than Skymont’s on Lunar Lake, with most of the reduction in its L2 regions. The 1 MiB region shrank by 8.4% and the 1.5 MiB region by 14.9%. The tag arrays also use one fewer visible row. Tags identify which memory addresses the data array holds, so rearranging them changes the cache’s layout and wiring without requiring less data capacity. [2] The LP E-cores share one L2. This pools capacity and avoids duplicating all the cache machinery, but the four cores contend for its banks and bandwidth. Their separate cluster also keeps light work away from the performance cluster and its L3, allowing that larger domain to sleep. [1], [2] Cache area includes more than the storage cells. Tags identify each line, decoders select rows, sense amplifiers read the small bitline signal, and wires connect to the banks. Splitting an array into smaller sections shortens wordlines and bitlines, improving access speed, but duplicates peripheral circuits. Panther Lake’s smaller cache regions therefore reflect the complete memory implementation, including how much of each region is devoted to storage. [34] Unlike Meteor Lake and Arrow Lake, Panther Lake has no separate SoC tile. The NPU, LP E-cores, memory controllers, PHYs, media and display engines now share the compute tile. This removes an active die and keeps CPU memory traffic on one die. The cost is moving PHY and I/O-related circuitry onto 18A: drivers, receivers and analog circuits must still meet external voltage, loading and signal-integrity requirements, so their area does not shrink like dense digital logic. [1], [2] The biggest shrink comes from the NPU, which occupies 36.9% less area. NPU 5 consolidates the same total INT8 MAC count into half as many neural compute engines. Each of the three NCEs has a larger MAC array to make the complete NCE envelope 22.6% larger than an NPU 4 engine. Consolidation also halves the number of scratchpads and SHAVE DSPs, from 12 to 6. The MAC array handles matrix multiplication and convolution, while SHAVE executes vector and custom operations that fit the array poorly. [1], [2], [35] The paired floorplans identify each NCE envelope and its scratchpad, MAC, and SHAVE regions. Each measured MAC polygon is counted once per NCE in the area accounting below. The scratchpads store weights, activations, and intermediate results near the MAC arrays, allowing repeated use without fetching them again from DRAM. Halving their number delivers the largest measured area saving but leaves less local storage for the same total MAC count. Layers that no longer fit locally require smaller working tiles or more transfers of intermediate data. The benefit depends on keeping the enlarged arrays busy while managing that tighter storage budget. [36] NPU 5 also adds native FP8. Using half the operand width of FP16 reduces storage and transfer demand, helping workloads fit the smaller local memory budget. Lower precision and format-dependent range make scaling and model validation part of deployment. Hardware activation functions further reduce work that would otherwise occupy the programmable DSPs. [1], [2] Microsoft requires an NPU to deliver at least 40 TOPS for Copilot+ PCs. Both Lunar Lake and Panther Lake meet this threshold, but Panther Lake uses significantly less silicon. GPU tiles Panther Lake is Intel’s first product with Xe3, its latest GPU architecture. It offers two different GPU tiles: a smaller GT1 tile with 4 Xe3 cores on Intel 3 and a larger GT2 tile with 12 Xe3 cores on TSMC N3E. Panther Lake allows us to compare the same GPU architecture across both Intel 3 and TSMC N3E. Wildcat Lake adds a third Xe3 implementation on Intel 18A. A future newsletter will detail Xe3 and its implementation differences across all three process nodes. GT2 scales Xe3 to a different physical layout, with render slices arranged vertically instead of GT1’s horizontal arrangement. Slice placement sets the distances to shared cache banks and the D2D interface. Those wires consume area and add delay, so scaling the number of Xe cores also requires a new balance of cache placement, routing and timing. [1] What’s immediately obvious is that the GT2 tile on TSMC N3E has much smaller Xe cores than GT1. These block areas include logic, caches, and routing. An Xe core on the GT1 tile is ~69% larger than one on Lunar Lake, and ~55% larger than one on GT2. Intel 3 therefore uses substantially more area per Xe core. The block-area gap exceeds the measured logic and SRAM density gaps, bringing routing, timing targets, cell mix, and floorplan allocation into the comparison. The measured vector/matrix engine region is almost unchanged between Lunar Lake and Panther Lake’s GT2 tile. Xe3 retains eight 512-bit vector engines and eight 2048-bit XMX engines per core. Its gains also come from feeding those engines more effectively: more resident threads hide stalls, and variable register allocation lets shaders trade registers per thread against the number of threads kept active. [1] The shared L1/SLM capacity increased by 33% from 192 KiB to 256 KiB, while its area increased only 5%, raising effective density by 27%. L1 retains reused cache lines, while software-managed SLM lets a thread group share data locally. Both reduce traffic to more distant memory. Allocating more SLM per group can also limit how many groups reside on a core at once. [1], [37] The GT1 tile carries 4 MiB of L2 against 16 MiB on the GT2 tile. GT1 divides its L2 cache into four 1 MiB banks, while GT2 uses eight 2 MiB banks. Each bank contains 128 macros, but each N3E macro stores 16 KiB, twice the Intel 3 macro’s 8 KiB capacity. The N3E macro is only 54% larger while holding twice as many bits, giving it 30% higher density: ~23.7 Mbit/mm² versus 18.3 Mbit/mm². Including bank-level circuitry, the gap widens to ~16.9 Mbit/mm² on GT2 versus ~10.4 Mbit/mm² on GT1. GT2 gains density with its macros storing more bits per unit area, and those macros occupy more of each cache bank. Larger macros spread decoder and sense-amplifier overhead across more storage, while a more compact bank layout reduces the share spent on control and routing. The compromise is longer wordlines and bitlines that carry more capacitance. [34] I/O tile Panther Lake uses two I/O tile variants, both fabricated on TSMC N6. The smaller one provides 4 PCIe 5.0 and 8 PCIe 4.0 lanes and serves lower-tier systems as well as those without a discrete GPU, while the larger one adds 8 PCIe 5.0 lanes, bringing the total to 20 lanes, for discrete-GPU connectivity. Panther Lake SKUs with the larger 10- or 12-Xe GPUs use the smaller I/O tile. [38] The smaller I/O tile adds a PCIe 4.0 block and a Thunderbolt block to Lunar Lake’s I/O layout, providing four additional PCIe 4.0 lanes and another Thunderbolt 4 port. Its repeated N6 blocks retain nearly identical areas and layouts. Reusing these proven PHYs and controllers avoids porting and requalifying external interfaces on 18A, where faster digital logic offers less benefit to circuits constrained by the off-chip link. [38] SemiAnalysis’s teardown lab (STEEL) dives deep into the world’s advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. We’re hiring technical experts from system to transistor and everywhere in between. Check out our Careers page. Panther Lake offers scalability and modularity through its disaggregated packaging that partition compute, GPU, and I/O silicon into separate tiles allowing for a suite of tile configurations. This partitioning makes the package part of Intel’s node economics as it determines how much leading-edge wafer area each product consumes, which functions can remain on other processes, and how much configuration freedom Intel can offer from a shared set of tiles. Furthermore, fabricating the compute and GPU tiles separately confines the new 18A process to the compute tile and allows graphics and I/O to use other, more established, and more cost-effective processes. For Panther Lake, the GPU and I/O tiles are assembled alongside the compute tile on a passive silicon base using Foveros-S. Intel’s current technology brief lists a nominal 36 µm pitch for Foveros-S. Through-silicon vias (TSVs) in the base connect the fine wiring above to the larger package connections below. The functional tiles sit side by side on that passive base in a 2.5D configuration. [39] Our cross-section through the compute and GPU tiles shows the package’s wiring hierarchy. Microbumps connect each active tile to the passive silicon base; its fine redistribution layer (RDL) carries the short, dense tile-to-tile links. TSVs carry connections through the base to the package substrate, which fans them out to the much coarser motherboard solder joints. The base supplies interconnect, while computation remains in the active tiles above it. [39] At the compute-tile edge, the higher-magnification inset shows a local microbump spacing of approximately 25.24 µm and a feature width of 12.33 µm. These local spacings are finer than Intel’s nominal Foveros-S value. The X-ray fields further confirm tighter neighboring bumps, consistent across every die-to-die area found on each tile. Additional X-ray analysis is offered after the paywall. Putting the memory controller beside the CPU removes the D2D transfer that CPU memory requests required in Meteor Lake and Arrow Lake. This avoids the extra transmitter, receiver, and link traversal, saving interface energy and latency. Panther Lake’s separate GPU still crosses a D2D link to reach DRAM, so its larger local caches also help contain package traffic. [1], [40] Smaller dies are less likely to contain a random fatal defect, and screening them before assembly prevents one bad tile from consuming a complete package of good silicon. Reuse also spreads design and qualification work across more products. Against those gains, Intel pays for the passive base, D2D circuits, extra bonding and test steps, and losses during assembly. Cost per working product across the portfolio captures the combined effect of wafer yield, reuse, test, and assembly. [29] Wildcat Lake packaging Intel launched Core Series 3, formerly Wildcat Lake, on 16 April 2026 for value mobile and edge systems. Wildcat Lake keeps 18A but removes the passive base and combines more functions on one die to simplify the package. The two products therefore reveal two distinct ways to commercialize the same leading-edge process. [41] Wildcat Lake’s 18A die combines up to two Cougar Cove P-cores, four Darkmont LP E-cores, two Xe3 cores and a smaller NPU. A separate platform-controller die supplies I/O, connected through UCIe, Intel’s first processor implementation of the standard. Consolidating graphics remove a tile boundary and the passive base, reducing assembly complexity for a modest-bandwidth value product. It also ties CPU and graphics scaling to the same die, giving up Panther Lake’s ability to swap in a much larger GPU. [42], [43] In July 2021, Intel CEO Pat Gelsinger set out an ambitious process roadmap aimed at regaining performance leadership by 2025, later described as five nodes in four years. Five years and one CEO later, Intel’s comeback story is not as unambiguously positive as Pat may have hoped. [44], [45] Intel once set the pace for process technology, bringing high-k metal gate technology and FinFETs into volume production years ahead of the rest of the industry. Its 22 nm FinFET process reached consumers with Ivy Bridge in 2012. [46] Intel’s integrated device manufacturing (IDM) model allowed its architects and process engineers to co-optimize products and processes. Starting with Sandy Bridge, Intel dominated x86, while AMD struggled with Bulldozer. That lead faltered at 14 nm and broke at 10 nm. Intel targeted a massive 2.7× density increase, but the node arrived years late and required several revisions before it could support Intel’s full lineup. This delay forced Intel to stretch 14 nm across six generations, while TSMC moved ahead in process technology and AMD recovered in x86. By 2019, Intel was still shipping 14 nm across most of its product stack, with its 10 nm client ramp focused on Ice Lake mobile processors. Meanwhile, TSMC was shipping N7 and N7+, and AMD’s Zen 2 compute chiplets used N7 to raise core counts and improve efficiency. Intel’s process failures were central to its decline, but unsound business decisions furthered their downward slide. Product delays compounded product mistakes, pushing client, server, and FPGA roadmaps off schedule. Several attempts to enter AI (Nervana and Gaudi) and networking (Tofino) also failed to establish lasting businesses. Intel’s recovery has focused on consumer CPUs and advanced packaging. Tiger Lake, Alder Lake, Lunar Lake and now Panther Lake have restored Intel’s consumer roadmap. On the process side, Intel 4 shipped with Meteor Lake, Intel 3 with Granite Rapids and Sierra Forest, and Intel 18A with Panther Lake. Intel has also made advanced packaging part of its foundry offering. However, Intel is still playing catch-up in servers. Several Xeon generations arrived years late and trailed contemporary AMD and Arm server CPUs in performance, efficiency, and core count. The process roadmap is back, but Intel does not hold the same process-technology leadership position it held prior to 10 nm. The introduction of gate-all-around nanosheets and backside power delivery are two of the biggest changes to transistor integration in a decade. Intel took on both changes at once: 18A paired its first RibbonFET with PowerVia in Panther Lake. Panther Lake is a substantial manufacturing milestone. Our cross-sections show how RibbonFET and PowerVia reshape local contacts and wiring, while the floorplans show where architectural consolidation and process choices save area. A sustained competitive lead depends on product performance, cost, yield, and the next implementation. The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page.. 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Available: https://www.intel.com/content/www/us/en/newsroom/news/client-computing/intel-outlines-architectures-for-agentic-ai-at-hot-chips-2026.html [44] Intel, “Intel accelerates process and packaging innovations,” Intel Investor Relations, Jul. 26, 2021. Accessed: Sep. 14, 2026. [Online]. Available: https://www.intc.com/filings-reports/all-sec-filings/content/0001193125-21-224438/d199788dex991.htm [45] Intel, “Intel reports third-quarter 2021 financial results,” Intel Investor Relations, Oct. 21, 2021. Accessed: Sep. 14, 2026. [Online]. Available: https://www.intc.com/news-events/press-releases/detail/1505/intel-reports-third-quarter-2021-financial-results [46] Intel, “3rd generation Intel Core processors bring exciting new experiences and fun to the PC,” Intel Investor Relations, Apr. 23, 2012. Accessed: Sep. 14, 2026. [Online]. Available: https://www.intc.com/news-events/press-releases/detail/577/3rd-generation-intel-core-processors-bring-exciting
Coral Academy of Science Las Vegas Campuses Earn Strong Marks in 2025-26 Nevada School Performance Framework
Coral Academy of Science Las Vegas (CASLV) is celebrating strong results across its campuses following the Nevada Department of Education’s release of the 2025-26 Nevada School Performance Framework (NSPF) ratings. The annual results include performance
Sandy Alcántara's stunning heroics save Marlins season
The Miami Marlins turned to ace Sandy Alcántara in an emergency bullpen role, and he delivered the first save of his MLB career.
11Alive
WXIA (Atlanta) — 11Alive is your source for breaking news, Georgia weather, traffic, and live coverage in Atlanta and across the metro area. Get the latest updates from the 11Alive team — from major local headlines and investigations to severe weather, community stories, and the moments everyone’s talking about. Watch live newscasts, stream breaking coverage, and catch up on the top stories shaping Atlanta, Marietta, Sandy Springs, Decatur, and surrounding communities. Subscribe for: • Atlanta breaking news + live updates • Georgia weather forecasts, storms, and severe weather alerts • Investigations and accountability reporting • Community stories across the metro area • Major events, sports, and local explainers WXIA / 11Alive — Atlanta news and weather, live and on demand. 🔗 More: https://www.11alive.com
Vintage fashion & facials: 6 Bastrop County business updates to know
Bastrop and Cedar Creek businesses see changes, including new openings, relocations and the closure of Sandy's Southern Spice.
Will Cannon, Alvaro Ortiz, Sandy Scott Share Simmons Bank Lead
Will Cannon, Alvaro Ortiz and Sandy Scott share the 36-hole lead at 14 under as the Korn Ferry Tour Finals tighten at the Simmons Bank Open.
Week 3: Texas high school football scores and highlights
West Mesquite 31, Texas High 14 Kilgore 50, Gilmer 64 Liberty-Eylau 15, Pleasant Grove 29 Mabank 14, Spring Hill 57 Waskom 24, Lakeside 14 Overton 20, Carlisle 49 Jonesboro 14, Union Hill 70 Tenaha 42, Big Sandy 41 (Thursday) Longview 22, Ruston 36 Athens 50, Pine Tree 48 Gladewater 7, West Rusk 28 Coach’s Corner […]
Sandy Williams annual black business expo this Saturday
4 News Now's Alexandra Coenjaerts reports
Healthcare executive’s mansion gets star treatment in the national real-estate press
Now that the kids are in college, Rod and Linda Windley are looking to sell their not-so-little piece of heaven in Sandy Springs, Ga., for $18.25 million.
Sea Aggie Researchers Make Evening Fun with Science on the Beach
“The environment is where we all meet; where we all have a mutual interest; it’s the one thing all of us share.” – Lady Bird JohnsonOn Galveston Island, beaches rank among the favorite environments to share and study, and, as Texas A&M University at Galveston faculty emphasized last week, are “More Than Just Sand.”A program subtitled “The Secret Life & Value of Sandy Beaches” drew more than 40 people to the Aug. 13 meeting of Surfrider Foundation Galveston, a local chapter of a nonprofit focused on the protection and enjoyment of oceans and beaches.The evening began barefoot with ecology lessons on the sand before moving across Seawall Boulevard for beverages, bites, and more beach talk at an area establishment. Drs. Guilherme Corte and Yasmina Shah Esmaeili show how a mesh bag is used as a sieve to separate organisms from samples of the sand. Credit: TAMUG Divisions of Marketing and CommunicationsNot far from where others were enjoying the attractions at Pleasure Pier, Drs. Guilherme Corte and Yasmina Shah Esmaeili introduced the ecologically curious to species living within the sediments.“When people hear ‘coral reefs,’ they immediately think of fish, live ecosystems, but when they think of sandy beaches, they think party, recreation, vacations – not coastal ecosystems,” said Corte, an assistant professor of marine biology in the College of Marine Sciences and Maritime Studies at TAMUG.Shah Esmaeili co-founded the Gulf eDNA Network and works with Corte in TAMUG’s Benthic Ecology Lab.“Sandy beaches are indeed great places for leisure and recreation,” Corte said. “Let’s keep enjoying them, because they are awesome. But they are also full of life that we most of the time don’t realize is there.”The married couple soon had the beachcombers measuring the slope with PVC poles, searching for ghost shrimp with a stainless-steel pump, sifting for marine worms and sand fleas, and guessing which species would burrow fastest back into the sand once released.Away from the sand, the focus turned to research from Drs. Ashley Ross ’03, ’10, and Virgie Greb, ’25 and those words from Lady Bird Johnson reminding people that the environment isn’t separate from their daily lives.“It’s about things that we value, mostly our communities, strong local economies, outdoor recreation, cultural connections, and our overall quality of life,” said Greb, a proud BOI – born on the island – Galvestonian, who now works in Austin as a project manager for the Texas General Land Office. “Along our coast, these benefits are deeply interconnected.”Greb and Ross, an associate professor in marine and coastal environmental science with the College of Marine Sciences & Maritime Studies, have studied a variety of ways beaches and the sea are important to Galveston and those who live there. Drs. Ashley Ross (left) and Virgie Greb (standing at right) field questions after their presentation. Credit: TAMUG Division of Marketing and CommunicationsIn 2023, using three survey methods – online for Galveston County residents, in-person at beaches, and paper distributed via city water bills – they collected 732 complete responses, 53 percent from residents and 47 percent from visitors.Most were frequent beachgoers who gave the recreation value of Galveston beaches a “B” and rated amenities such as restaurants, lodging, shopping, and beach access highly. Lower rated were water clarity and restroom facilities.“It’s noticeable that primary residents actually rate water quality higher; they’re more tolerant of hard, turbid water,” Ross said, crediting them with better understanding the natural conditions with the Trinity and San Jacinto Rivers bringing sediments and rich nutrients to the area around Galveston.Island residents also were more likely to understand that “clear” isn’t the same as clean beach water and to know that water quality is regularly tested. Clean means absent of disease-causing pathogens.“We need more education and outreach focused on water quality and the benefits of Galveston beaches and shores and water,” Greb said. “And it’s not just for tourism. There are a lot of people who are very lucky to live on an island with beaches and the bay.”
Smithsonian Brings Sandy Beach Scientists to Texas A&M Galveston
Scientists from the U.S. and South America are workshopping at Texas A&M University at Galveston (TAMUG) this week to expand sandy beach research and broaden collegiate learning opportunities.The Tides of Opportunity Project, co-led by the Smithsonian’s Marine Global Earth Observatory (MarineGEO) Program, TAMUG, the Smithsonian Marine Station, the Smithsonian National Zoo and Conservation Biology Institute, and the University of Miami, is a collaborative monitoring project with marine science professors and their students.Tuesday, Aug. 18, through Friday, Aug. 21, 15 professors and marine science professionals from the United States, Brazil, Peru, and Urugay will co-design a sandy beaches monitoring protocol and associated course modules and test the protocol in the field.The goal is to incorporate sandy beach monitoring protocols into marine science courses, which college faculty and students can use to achieve learning goals while providing essential data can help researchers diagnose the health of an understudied critical coastal habitat.Dr. Guilherme Corte, an assistant professor of marine biology in the College of Marine Sciences and Maritime Studies at TAMUG, is a principal investigator for MarineGEO. Texas A&M University at Galveston students and faculty package samples collected on the beach to take to campus for study in the Benthic Ecology Lab. Credit: TAMUG Division of Marketing and Communications“One third of the world’s ice-free coastlines are made of sandy beaches, and they go from pole to pole,” Corte said.However, despite their abundance and place as one of the most accessible coastal ecosystems for college-level education and research, they remain critically understudied.The Tides of Opportunity Project recognized that accessibility makes sandy beaches uniquely suited for engaging professors and students, including those with limited resources.“Any students can do sandy beach research,” Corte said, encouraging instructors to help students take a break from typing questions into artificial intelligence tools and embrace opportunities to do real science. “Providing this hands-on experience is something unique.”Tides of Opportunity Project goals include:Training a cohort of professors from across the Americas in standardized sandy beach monitoring methods; Equipping participating faculty with classroom modules, field tools, and multilingual teaching materials; Expanding MarineGEO with new monitoring sites focused on the implementation of long-term sandy beach monitoring; Strengthening hands-on, college-level learning experiences; And cultivating interest, learning, and efficacy in science among college-level students.By the end of this week, workshop participants plan to have a final version of the protocol and associated course modules that we can share with professors shortly after the workshop ends to then test with their students in courses that take place between September 2026 and February 2027.The scheduleDay 1: Tuesday, Aug. 18Location: Aggie Special Events Center (ASEC), Rooms 102 B and C, Texas A&M University at Galveston 8:30 – 9 a.m. Breakfast9 – 9:30 am Welcome and brief group introductions9:30 – 10 a.m. Introduction to Tides of Opportunity Project, Design Workshop, MarineGEO, and the Connecting Coastlines to Campuses Program (presentation)10 a.m. – 1 p.m. Introduction to workshop participants and project coordination team (presentations by each participant)• Brief lunch break from 12-12:30 p.m.1 – 3 p.m. Discussion about why collaborative science matters (presentation and interactive group discussion)3 – 4:15 p.m. Introduction to sandy beaches (presentation and group discussion)Day 2: Wednesday, Aug.19Location:• Morning sessions: ASEC Rooms 102 B and C, Texas A&M University at Galveston • Afternoon sessions: Corte’s field site (location available upon request)8:30 – 9 a.m. Breakfast9 a.m. – noon Prep for fieldwork (presentation and interactive group discussion)• Finish conversation about importance of studying sandy beaches• Go through sandy beaches monitoring protocol and field sheetsNoon – 12:45 p.m. Lunch12:45 – 1:30 p.m Prep for field (including driving to the field site)1:30 – 5:30 p.m. Fieldwork & bring samples back to TAMUGDay 3: Thursday, Aug. 20Location:• Breakfast: ASEC Rooms 102 B and C, Texas A&M University at Galveston • Fieldwork: Guilherme’s field site (location available upon request)• Lab/afternoon sessions: TAMUG lab (location available upon request) and ASEC Rooms 102 B and C8:30 – 9 a.m . Breakfast9 – 11 a.m. Return to field• Shorter field trip – recovering samples left out overnight11 a.m. – noon Lab work12 – 12:45 p.m. Lunch12:45 – 2:45 p.m. Continue lab work3 – 5 p.m. Discuss with professors the feasibility of implementing protocol in their courses and where might need to make changes (discussion)Day 4: Friday, Aug. 21Location: ASEC Rooms 102 B and C, Texas A&M University at Galveston 8:30 – 9 a.m. Breakfast9 a.m. – noon Group Discussion• How to evaluate student learning and engagement• Course modules• Next steps
Scientists put tiny backpacks on crayfish
However, keeping tabs on these four-inch-long freshwater creatures can get a bit sticky.
The Scientists Who Want to Steer Hurricanes
Over the weekend, Hawaii was lashed by Hurricane Lala, which has washed away homes, left more than 125,000 people without power, shut down two of the state’s busiest airports, threatened dangerous flash flooding and, at time of writing, has killed one person. What if we could’ve steered the storm away from Hawaii, into the vast expanse of the empty Pacific Ocean that lies all around the islands—where no one could get hurt? This scenario might sound like the stuff of science fiction. But earlier this year, a peer-reviewed study published by the Public Library of Science found that it might be possible, and sooner than we think. The study was titled: “Weather Jiu-Jitsu: Prospects for atmospheric nudging to defuse the impact of catastrophic weather extremes.” According to the paper, the controversial practice of cloud seeding could enable human beings to make hurricanes change direction. The potential results could be astounding: The authors suggested that Hurricane Sandy, which in New York City alone killed 44 people and caused $19 billion of damage in 2012, could’ve been diverted by 200 miles, missing the metropolis entirely. Cloud seeding, which first succeeded in the U.S. in 1946, is a practice whereby small particles—for example, dry ice, silver iodide, or salt—are dropped into clouds, causing moisture to condense into precipitation. In the 1960s, the U.S. government launched Project Stormfury, an experiment that saw Navy pilots flying into the heart of a hurricane, dodging winds over a hundred miles per hour, to cloud-seed inside it, in the hope of reducing the storm’s power. “The seeding,” the theory went, “would stimulate the formation of a new eyewall that would surround the existing eyewall. The new eyewall would contract, strangling the old eyewall and reducing the intensity of the hurricane.”
Yoshinobu Yamamoto goes deep, Dodgers can’t support him
Yoshinobu Yamamoto pitched eight strong innings, but the Dodgers offense didn’t support him, falling to the Boston Red Sox 3-2 on Saturday night at Dodger Stadium. Yamamoto, who leads MLB averaging 6.68 innings per start, completed eight innings for the fourth time this season, tying Marlins ace Sandy Alcantara for the major league lead. Yamamoto […]
Tempo coach Sandy Brondello suspended 1 game by WNBA for 'protected species' remark about Angel Reese
A Tide-Fueled Trove of Biodiversity in Guinea-Bissau
The expansive mudflats, sandy beaches, and mangrove forests of the Bijagós archipelago support an array of migratory shorebirds and large numbers of sea turtles.
Lopez homers, Alcantara leads Marlins past Athletics
Otto Lopez padded his MLB-leading average with three hits while Sandy Alcantara fanned eight over eight dominant innings, lifting Miami to their eighth victory in eleven games.
The Onion to give $100,000 to Sandy Hook families
The satirical news site The Onion isn’t waiting to take possession of Infowars to launch a parody of Alex Jones’ conspiracy platform.
Pioneering female sports editor honored with Hall of Fame induction
Sandy Smith is being inducted into the New Hampshire Legends Hockey Hall of Fame for her passion and coverage of sports.
One of Jackie and Shadow’s chicks accidentally left the nest
Sandy lost her footing and fell down a few branches.
Scientists mull controversial plan to steer hurricanes
It might sound like science fiction, but some scientists say we have tools that could be used to disrupt natural disasters. Others are skeptical.
Minuteman Press Franchise Owner Dave Forster Reflects on 40 Years in Minneapolis
MINNEAPOLIS, June 26, 2026 (GLOBE NEWSWIRE) -- Dave and Sandy Forster are the owners of Minuteman Press in Minneapolis, MN since February of 198...
The unwanted return of tetanus; why soccer makes people so happy; breast cancer in men; plus other stories with Vanderbilt Health sources
Women’s Health interviewed Kathryn Edwards, MD, Sarah H. Sell and Cornelius Vanderbilt Professor of Pediatrics, for a story about her JAMA Viewpoint article on tetanus making a comeback. Women’s Health interviewed Colin Armstrong, PhD, Assistant Professor of Clinical Psychiatry and Behavioral Sciences and Assistant Professor of Physical Medicine and Rehabilitation, for a story tied to the World Cup about why soccer makes people so happy. An NBC News story about the announcement by “X-Men” actor and former wrestler Tyler Mane that he has breast cancer quotes Ben Ho Park, MD, director of the Vanderbilt-Ingram Cancer Center. The story focuses on how a prominent man with breast cancer may help remove some stigma from a cancer that is rare in males. Prevention magazine interviewed Caitlyn Mooney, MD, Assistant Professor, Department of Orthopaedic Surgery, for a story about a BMJ study that suggests 90 to 120 minutes per week of strength training may lower the risk of death. William Schaffner, MD, Professor of Preventive Medicine, was quoted by several news outlets about public health issues, including: Women’s Health (norovirus is more common this summer); SFGate (measles in San Francisco just before the World Cup crowds); Travel + Leisure (how to avoid getting sick on a cruise); and Fox News (mosquito-borne diseases). Reporter Liz DeSantis from WKRN News 2 aired a story on the rehab unit at Monroe Carell Jr. Children’s Hospital at Vanderbilt. Kat Hedden, PT, DPT, PCS, CBIS, Acute Pediatric Physical Therapy Clinical Team Lead and Mary McLanahan, MD, Assistant Professor of Physical Medicine and Rehabilitation were interviewed, as well as the family of patient Will Terry. Reporter Nikki Hauser from WTVF News Channel 5 interviewed Graden Knapp, Gaming and Technology Specialist at Monroe Carell Jr. Children’s Hospital at Vanderbilt about his 3-D wheelchair project. Tennesseanreporter Sandy Mazza covered the announcement of the latest Leadership Nashville class, which includes Jane Freedman, MD, Deputy CEO, and Chief Health Systems Office for Vanderbilt Health; and also the announcement of the latest Leadership Tennessee cohort, which includes Jeff Upperman, MD, Surgeon in Chief at Monroe Carroll Jr Children’s Hospital at Vanderbilt.
Dodgers star Yoshinobu Yamamoto loses perfect game on Mookie Betts error in 8th inning, then loses no-hitter in 9th
Sandy Koufax remains the only Dodger to throw a perfect game.
Miami Marlins vs. Pittsburgh Pirates: Sandy Alcantara vs. Braxton Ashcraft
The Pirates are at PNC Park looking to grab a win today.
Science panel to present hardened structure report findings
The North Carolina Coastal Resources Commission is expected to hear from its science advisory panel its findings on the effects hard structures have on sandy, open-ocean coastlines.
A New York cemetery was hiding 5.5 million bees underground
A casual walk through an Ithaca cemetery led to the discovery of a gigantic hidden bee population — roughly 5.5 million ground-nesting bees packed beneath the soil. Scientists believe it may be one of the largest bee aggregations ever documented and say the insects are crucial pollinators for apple orchards and other crops. The bees have likely lived there for more than 100 years, thriving in the cemetery’s undisturbed sandy soil.
Clark makes dad assistant in first management job
Nicky Clark appoints his father Sandy as an assistant as the former Rangers and Dundee United striker starts his first management job with Queen of the South.
SEG, Intermountain Health announce sports medicine center at South Town in Sandy
Smith Entertainment Group and Intermountain Health announced a partnership and the creation of a sports medicine center at The Shops at South Town.The "first-of
SEG, Intermountain Health announce sports medicine center at South Town in Sandy
Smith Entertainment Group and Intermountain Health announced a partnership and the creation of a sports medicine center at The Shops at South Town.The "first-of
Smith Entertainment Group adding this to its Sandy sports campus
Intermountain Health Sports Performance Center to be built next to Mammoth, Jazz practice facilities
Can spreading basaltic volcanic rock dust improve crops and the health of Florida’s soils?
UF researchers are testing volcanic rock dust to improve soil health across the state’s sandy and organic farmlands.
Sandy shores and serious business: Palomar takes on InsuranceFest 2026
The industry’s best minds are gathering in one location
Jackie and Shadow’s eaglets can now see like their parents
Sandy and Luna's vision rivals that of adult bald eagles.
Why do crabs walk sideways? Scientists trace it back 200 million years
Crabs’ famous sideways walk may trace back to a single evolutionary moment 200 million years ago. Researchers found that most modern crabs inherited this trait from one ancestor—and never looked back. The movement likely gave them an edge, helping them dodge predators with quick, unpredictable bursts. It’s a rare example of a behavior evolving once and then dominating an entire group.
FAMU doctoral candidate is among record number of public health grads
Sandy Noel-Jones is one of eight public health doctoral candidates making history at FAMU, the largest cohort ever.
Democratic candidate for U.S. Senate touts business background, integrity in fight for Kansas seat
Sandy Spidel Neumann is running to take Sen. Roger Marshall's seat, focusing on the need for accountability in politics.
Thailand’s Krabi Coast
The coastal province features striking tropical karst landscapes and sandy beaches alongside a mix of natural land cover and developed areas.
Can you dig it? Everyone was psyched for the groovy Arts for All Gala
ARVADA CENTER FOR THE ARTS AND HUMANITIES Arvada News: Between the sequined mini dresses, platform shoes, go-go boots, paisley prints and bell-bottom pants, the 350 guests at the Arvada Center’s 1970s-themed Arts for All Gala clearly were “right on” in selecting what to wear for a “groovy” night of disco-infused fundraising. “Some of you look like you just walked out of Studio 54,” remarked board member David Martinelli, who chaired the gala with Sandy Hartgens. Hartgens, also […]
GameThread: Tigers vs. Marlins, 1:40 p.m.
Detroit Tigers (6-9) vs. Miami Marlins (8-7) Time/Place: 1:40 p.m., Comerica ParkOpponent Site: Fish On FirstMedia: Detroit SportsNet, MLB.TV, Tigers Radio NetworkPitching Matchup: LHP Tarik Skubal (1-2, 2.55 ERA) vs. RHP Sandy Alcantara (2-0, 0.74 ERA) Lineups MARLINS TIGERS Austin Slater – RF Kevin McGonigle – SS Agustin Ramirez – C Gleyber Torres – 2B Jakob Marsee – CF Colt Keith […]
Sandy Lyle recalls Jack Nicklaus's 1986 Masters win
Sandy Lyle recalls playing with Jack Nicklaus during his legendary 1986 Masters win and what he learned from it.
Sandy Alcantara questions Marlins' decision to end his bid for back-to-back shutouts in 9th inning
Agency Brief—Terri & Sandy continues leadership revamp with Martin hire
This week, we’ve got an exclusive on Terri & Sandy’s C-suite hire, and we dive into Publicis Groupe’s continued push into sports.
Scientists just found DNA “supergenes” that speed up evolution
Hidden within fish DNA are powerful genetic twists that may explain one of nature’s biggest mysteries: how new species form so quickly. In Lake Malawi, hundreds of cichlid fish species evolved at lightning speed, and scientists now think “flipped” sections of DNA—called chromosomal inversions—are the secret. These inversions lock together useful gene combinations, creating “supergenes” that help fish rapidly adapt to different environments, from deep waters to sandy shores.
Designers and talent agencies: why fashion is turning to entertainment in 2026
More designers are signing with talent agencies. From Sandy Liang to Jonathan Anderson, fashion is becoming entertainment and reshaping the industry
Mike Tomlin Signs With Sports Media Agent Sandy Montag
Sandy Montag and sportscaster-turned-agent Alex Flanagan will represent Mike Tomlin in potential talks with networks and streamers.
11Alive
WXIA (Atlanta) — 11Alive is your source for breaking news, Georgia weather, traffic, and live coverage in Atlanta and across the metro area. Get the latest updates from the 11Alive team — from major local headlines and investigations to severe weather, community stories, and the moments everyone’s talking about. Watch live newscasts, stream breaking coverage, and catch up on the top stories shaping Atlanta, Marietta, Sandy Springs, Decatur, and surrounding communities. Subscribe for: • Atlanta breaking news + live updates • Georgia weather forecasts, storms, and severe weather alerts • Investigations and accountability reporting • Community stories across the metro area • Major events, sports, and local explainers WXIA / 11Alive — Atlanta news and weather, live and on demand. 🔗 More: https://www.11alive.com
Asteroid Bennu’s Rugged Surface Baffled NASA, We Finally Know Why
In one of the biggest surprises of NASA's OSIRIS-REx mission, its target asteroid, Bennu, turned out to be a jagged, rugged world covered in large boulders, with few of the smooth patches of sandy or pebbly material scientists had expected based on observations with Earth-based instruments. Bennu's looks were quite deceiving, and until now, scientists struggled to figure out why.
Mental health solutions for the digital age
Ask the digital natives of Gen Z about the source of their biggest mental health challenges, and most will say social media and AI.Several of the nearly 400 guests at the third annual Gen Z Wellness Summit, presented by the Friends of Semel Teen Advisory Council at UCLA on March 8, explicitly named the endless stream of content on their phones as serious stressors. “Everybody is addicted to (Tik Tok) as if they were addicted to substances,” said Jantin Asmar, 17, a senior at Virtual Academy in Antelope Valley. “We’re always chasing that dopamine. We’re expecting that dopamine rush and it’s really decaying our interactions with others.” High school student Jantin Asmar was among nearly 400 people who attended the third annual Gen Z Wellness Summit. (Photo by Sandy Cohen) Even young teens feel pressure to be on social media constantly, both to consume content and collect “likes,” said 13-year-olds Chloe and Sophia, both students at Brentwood School. “Everyone’s always on, and you miss stuff if you’re not on it,” Chloe said, adding that social media’s emphasis on appearances is leading to eating disorders: “That’s a big thing for our generation.”The incessant influx of images and updates creates expectations that “weigh teenagers down,” said Linda Kou, 16, a junior at San Gabriel High School.Even though digital spaces allow people to connect with others beyond their immediate surroundings, it doesn’t always translate to real-life community, said Kelah Morgan, 17, a senior at Animo South Los Angeles Charter High School. High school students Kelah Morgan, left, and Linda Kou, shared about the challenges presented by social media. (Photo by Sandy Cohen) “Even if you see people saying that they relate to you online, it might be hard to find people in your personal life who you see every day who you feel comfortable enough to say, ‘You see me online, but this is me in real life and what I’m actually going through,’” she said.Solutions for our digital timesThe Gen Z Wellness Summit was intentionally designed as a free, in-person gathering where young people interested in mental health from across the southland could meet in person. “Peer support is the most important element of maintaining our mental health in community,” said Helena Hansen, MD, PhD, director of UCLA’s Semel Institute for Neuroscience and Human Behavior.Keynote speakers at the summit addressed AI, social connection and self-empowerment, while breakout sessions included discussions about eating disorders, dating, substance use, phone detox and breathwork. Here are some of the day’s top takeaways:Beware of FOPO: Scott Barry Kaufman, PhD, a psychology professor at Columbia University, said that rather than FOMO, or fear of missing out, we ought to be more aware of FOPO: fear of people’s opinions. “Just think about how much your FOPO might be holding you back in your life,” Dr. Kaufman said. “And just that inner contemplation should be enough for you to change your life, because there’s so many things we don’t go after because we have debilitating FOPO.”We don’t need to feel like we’re the best – or what he called “narcissistic self-esteem” – but it’s helpful to acknowledge our own worth, recognize our good qualities and develop self-belief in the skills and talents we’ve cultivated. When we have that – dignity and self-respect, without needing everyone to like us – FOPO is less of a concern.Self-reflection is most effective in community: “When we try to self-reflect alone, we sometimes ruminate,” said Ira Bedzow, PhD, executive director of the Emory University Purpose Project. “But when we self-reflect with people that we trust … (it) allows us to hold ourselves accountable to different ways of seeing and different ways of hearing and different ways of being.”Opening up about our experiences and listening to others are skills we can develop, Dr. Bedzow said.He invited students to participate in what he called a “fishbowl exercise,” where four students sat in a small circle, surrounded by a dozen or so students forming a larger circle. Those in the inner circle answered such questions as: “What stops you from being you today?” and “What helps you feel most like you?”Within minutes, the group in the small circle (the fishbowl), were sharing intimately about their life challenges as those in the outer circle nodded in understanding.After the exercise, one participant said, “I felt like I wasn’t alone, that it wasn’t just me who feels that way.”Another remarked on how “personal” it felt to share face-to-face with others, even strangers.Don’t let AI crush your creativity: Theoretical neuroscientist Vivienne Ming, PhD, has been studying artificial intelligence for more than 20 years. And while she said “it’s reasonable to be concerned” about the fast-growing technology, it can also help humans become better problem-solvers when used strategically.“The smartest thing on the planet today are humans and machines working together creatively,” Dr. Ming said. “What gets more valuable in humans as machines get smarter? Our ability to explore the unknown.“Your unique voice is literally your value to the world … but most of us for most of our lives have been taught to not be unique,” she continued. “Be your own person. Celebrate being different. It is genuinely, measurably, truly valuable.”In a breakout session called “Phone Detox? IYKYK: Living Your Story IRL” led by Don Grant, PhD, students shared their frustrations with AI compromising academic work, art and creativity.“Art is a translation of human experience,” one participant said. “When people use AI, they diminish their own human experience.”Dr. Grant urged them, as “the last generation to remember a world before AI,” to remember the power of imagination and creativity – and to act on it.Remember that social media distorts perceptions: Stuart B. Murray, PhD, PsyD, who directs the Eating Disorders Program and Translational Research in Eating Disorders Program at UCLA, asked the students in his breakout session to take a spontaneous selfie and edit it to conform with society’s beauty standards. All 20 girls in the room immediately got to work, thickening their hair, slimming their faces, plumping their lips.“The pressure to look like what we present on social media can be crippling,” Dr. Murray said. “We now know that social media use is part of a causal pathway into an eating disorder.”Adolescents and young adults are most at risk of developing an eating disorder, he said, with one in three students on college campuses exhibiting clinically meaningful eating-disorder symptoms. More than 4 million people in California will have an eating disorder in their lifetime.Even for those who don’t develop anorexia or bulimia, the ubiquity of modified images online distorts what we consider normal, making us feel worse about ourselves. Remembering that, he and other speakers said, might inspire us to log off occasionally and spend time in the real world with people who love us as we are.
Sandy Wernick Dead: Adam Sandler's Longtime Manager Was 86
He also served as an executive producer on several of Sandler's movies, including 'Happy Gilmore,' 'Billy Madison,' 'The Wedding Singer' and 'Bulletproof.'
Sandy Wernick, Manager for Adam Sandler, Dies at 86
Sanford "Sandy" Wernick, manager of Adam Sandler and senior executive VP at Brillstein Entertainment Partners, died Thursday. He was 86.
Stardew Valley reveals new marriage candidates for 1.7 update
Stardew Valley fans can get a first look at the two new marriage candidates, Clint and Sandy, coming with the 1.7 update right here.
Miller Sports + Entertainment Announces Legacy Partnership with SME Industries
SANDY, UT (February 18, 2026) – Miller Sports + Entertainment (MSE) announced today a new legacy partnership with SME Industries, Inc. (SME) across the platform, including Real Salt Lake, Utah Royals FC, Salt Lake Bees and Megaplex. Together, the organizations will focus on community-driven experiences and initiatives fueled by the
Miller Sports + Entertainment Announces Legacy Partnership with SME Industries
SANDY, UT (February 18, 2026) – Miller Sports + Entertainment (MSE) announced today a new legacy partnership with SME Industries, Inc. (SME) across the platform, including Real Salt Lake, Utah Royals FC, Salt Lake Bees and Megaplex. Together, the organizations will focus on community-driven experiences and initiatives fueled by the
Miller Sports + Entertainment Announces Legacy Partnership with SME Industries
SANDY, UT (February 18, 2026) – Miller Sports + Entertainment (MSE) announced today a new legacy partnership with SME Industries, Inc. (SME) across the platform, including Real Salt Lake, Utah Royals FC, Salt Lake Bees and Megaplex. Together, the organizations will focus on community-driven experiences and initiatives fueled by the
Miller Sports + Entertainment Announces Legacy Partnership with SME Industries
SANDY, UT (February 18, 2026) – Miller Sports + Entertainment (MSE) announced today a new legacy partnership with SME Industries, Inc. (SME) across the platform, including Real Salt Lake, Utah Royals FC, Salt Lake Bees and Megaplex. Together, the organizations will focus on community-driven experiences and initiatives fueled by the
I got laid off from my tech job and retired in France at 69. I won't move back.
Sandy Adams has always loved France. But it wasn't until she was laid off from her tech job at 69 that she decided to move there and retire.
Perriello returns to politics, hoping to win the seat he once held in Congress
Democrats hoping to represent a Virginia district stretching from liberal Charlottesville to conservative Southside were preparing for what could have been an expensive and damaging primary. Now three candidates are out, and momentum is building for a man who has served in Congress before. Sandy Hausman has that story.
MLB rumors: Latest on Sandy Alcantara, Cardinals' plans after Contreras trade
Here's the latest from MLB's hot stove as we hit the Offseason Solstice
After decades in St. Paul, trailblazing lawmakers reflect on what’s changed for women in politics
Sens. Sandy Pappas and Ann Rest watched as women went from being relegated to the sidelines to leading caucuses and top committees at the Capitol.
Essentia Health hosts local lawmakers at St. Joseph’s Medical Center ahead of legislative session
Sandy Zutz-Wiczek, vice president of operations at Essentia, led a tour of the hospital and discussed how lawmakers can help ensure rural communities preserve access to high-quality care