SCROLL NEWS / DISCOVERY
Search headlines
Find the stories shaping the conversation.
Results for " shifting " 496 found 🔀 AI-powered Shuffle
LaMelo Ball is strategically shifting his luxury real …
LaMelo Ball is strategically shifting his luxury real …
What to Watch for in Bengals-Ravens
Lamar Jackson’s health and a shifting Bengals backfield take center stage as AFC North rivals collide, featuring a high-stakes reunion for star pass rusher Trey Hendrickson.
From the bleachers to the ballot box, a community weighs a changing Texas
At a Deer Park High School football game outside Houston, voters grapple with rising costs, immigration and shifting political loyalties as Democrats mount competitive challenges in two of Texas’ highest-profile races.
Cook Political Report shifts Ohio governor’s race from toss-up to lean Democrat
The Cook Political Report is shifting a closely watched gubernatorial contest toward Democrats after a controversial campaign ad shook up the race. The nonpartisan election forecaster moved the gov…
Funding Cuts Push Global Health Partnerships Toward Local Ownership
Speakers at IDWeek 2026 urged shifting global health partnerships from donor-recipient models to shared, locally led ownership as funding contracts.
Climate change is literally altering the shape of our planet
The melting of the poles is increasingly shifting Earth's shape at a faster rate, with the planet becoming more and more round.
Why Entertainment Industry Layoffs Are Accelerating
Hollywood layoffs are mounting as streaming competition, overseas production and shifting audience habits reshape the entertainment industry.
Thune makes bold prediction about Republicans' Senate chances as GOP pulls millions from key races
John Thune says Republicans will outperform the polls in toss-up senate races despite shifting campaign cash away from Georgia and into Kansas.
Is Donald Trump ready to do business with Myanmar?
There are signs the United States is shifting its policy towards Myanmar, formerly a global pariah.
How Behavioral Science Can Get Shoppers To Buy (and Eat) More Fresh Produce
Industry leaders at IFPA’s Global Produce and Floral Show revealed that overcoming flat fruit and vegetable consumption requires shifting away from clinical health messaging toward flavor-forward marketing, cultural rituals and frictionless convenience.
‘We’re in a red sinkhole’: Plummeting Latino support for Republicans could swing the midterms
After helping elect Donald Trump in 2024, the nation’s 36 million Latino voters are shifting in significant numbers in Democrats’ favor. That could shift key midterm races across the country.
World Affairs Council of the Upstate to host ‘Supply Chains’ panel discussion on Oct. 29
The program will explore how geopolitical tensions, shifting trade policies, transportation challenges and changing global markets are reshaping supply chains.
Brook Park OKs less on-site parking at Browns stadium, shifting demand to nearby businesses
Businesses like Ampex Metal Products are weighing whether they want to be part of the game-day experience in Brook Park, where there's a projected need for 10,000 off-site parking spaces.
How a cruise ship navigates Greenland's icebergs and extreme Arctic conditions
Inside a Greenland cruise ship, where crews navigate shifting icebergs, unpredictable weather, and emergencies far from help.
NASA’s Webb reveals the wild weather of a mysterious world 20 light-years away
NASA’s James Webb Space Telescope has revealed that a turbulent world 20 light-years away has a surprisingly orderly weather system, with three recurring atmospheric states driven by temperature changes and shifting clouds. The breakthrough gives scientists a powerful new tool for uncovering weather patterns on distant worlds and understanding the conditions that shape their atmospheres.
Downtown Portland businesses weigh safety and signs of progress after deadly shooting
Downtown Portland business owners react after police fatally shot a man on SW Broadway. Merchants describe chaos, shifting street behavior, and cautious optimism as crime data shows assaults up, homicides down.
Blue shift: Yet another political forecaster shifts CD 25 race in Jared Moskowitz’s favor
‘The race doesn’t appear to have tightened, so we’re shifting it.’
Wyoming Business Council CEO resigns amid agency reform efforts
Josh Dorrell's tenure saw the council navigate through a shifting economic and political landscape that included an effort to dismantle the agency.
Republicans retreat from battleground districts as lines shift in House races
The shifting money in the final weeks of midterm campaigns points to a defensive posture by Republicans and new aggression from Democrats, who aim to capitalize on President Donald Trump's weak approval ratings.
New PCC opens in Madison Valley
After a decade navigating financial turmoil, a global pandemic and shifting consumer habits, the grocery chain finally opens the store's doors on Wednesday.
PROFILE: Ben Sio
New President of CenterState CEO Brings Nearly Two Decades of Experience to Drive CNY Growth By Stefan Yablonski Ben Sio serves as president of the CenterState Corporation for Economic Opportunity — or CenterState CEO. The independent Syracuse-based nonprofit is committed to creating inclusive, equitable and sustainable economic growth in Central New York. “I started in this position in March, so it has been six months. I’m in my 19th year with CenterState,” he said in August. As president, he is responsible for overseeing the organization’s administration and governance, while leading and executing its vision to be an effective advocate, exceptional employer and a force for positive outcomes for the community. He previously served as chief of staff and senior vice president of strategy, policy and planning, overseeing the organization’s long-term strategic planning, consulting, corporate governance, fundraising and development, land-use planning and government relations. In his years with the organization, Sio has led or supported many high-profile strategic initiatives including the creation of the CNY Rising Plan, the launch of the NUAIR Alliance and the region’s UAS strategy, the creation of the Micron-enabled Community Priorities Document and the recently awarded NY Smart I Corridor Tech Hub. “When we decided to split Rob’s [Simpson] role into two positions, he has the CEO title and I got the president title. Rob remains focused on forward looking vision strategy for the organization and I’m more focused on the day-to-day operations,” he explained. “I’m also responsible for building consensus around strategic needs and priorities and managing the change necessary to drive execution. It’s an eventful job. “The experiment that we call CenterState is always evolving and shifting and addressing where we see market demand and market failure. “If we see something in our economy that isn’t going the way we think it should go, then whether it is housing development or workforce development or something else, we are always figuring out how to step into these situations and address those challenges.” “We are the largest ever in terms of staff that we have ever been. We are no longer the 20-person organization we were when we started out many, many years ago,” he said. “There are more day-to-day things to take care of. But also there is just so much happening in the community right now that is pulling CenterState and our expertise in so many directions. I tell people if we were bored and not busy, then I’d be really concerned about what we are doing. But we are not bored. We’ve certainly got our hands full — and that is a good thing.” CenterState has now approximately 63 employees on its staff, according to recent nonprofit database records. It’s involved in myriad programs, ranging from Genius NY, a business accelerator competition for uncrewed systems, IoT and robotics startups, to CenterState Up Start, a collaborative business development program that connects local, service-based businesses and aspiring entrepreneurs to the tools and networks that help them thrive. CNY Guy Through and Through A Central New York guy through and through, Sio was born and raised in Skaneateles. “My mom was a teacher, an art teacher. My father worked for many, many years with National Grid. He was there through the transition from Niagara Mohawk to National Grid,” he said. “Neither of my parents were touched by cutbacks and job loss. But I grew up going through that transition and being concerned that there were rounds of layoffs. My childhood connection to the economy here in Central New York … years ago it was on the decline. There were people that lived here that were concerned about losing their job. They were thinking they lived in a place that didn’t show much promise.” That narrative translated to his generation, he added. “The kids that grew up in the ‘90s in Central New York were very much told, directly or indirectly, by their parents, that they had to go somewhere else to find economic opportunity. That is what I grew up thinking,” he said. “I only went a few miles down Route 20 for college — in Geneva, New York; I graduated from Hobart and William Smith College with a bachelor’s degree in public policy and political science. “I got real interested in regional economies; because what makes regional economy is what makes the economy successful. And when I graduated, I had an opportunity to move to Washington, DC and work down there at a nonprofit doing this work.” However, he decided to stay in Central New York. “I got hired two weeks after I graduated. I got hired by the Greater Syracuse Chamber of Commerce. At the time it was one of two entities doing economic development in Central New York — [the Greater Syracuse Chamber of Commerce and the Metropolitan Development Association] — and it eventually became CenterState CEO,” he said, referring to 2010 merger between the two organizations. During his time at CenterState, Sio has also split time at the Brookings Institution in Washington, D.C., where he supported communities developing export and foreign direct investment (FDI), a long-term cross-border investment where an individual or company from one country buys a lasting stake or control in a business located in another country. The program — known as Global Cities Initiative — was designed to help leaders in major U.S. and international metropolitan areas reorient their local economies toward global markets. “Early on in my tenure at CenterState, we had done a lot of work with the Brookings Institution, just regional planning stuff. We worked with them on developing a regional export plan, to export more products out of Central New York and a larger business plan for the region. They hired me on to help replicate those plans in different parts of the country,”Sio explained. “So, I worked there for three or four years. I worked for CenterState, but I was technically loaned to Brookings for a period of time to help them do this work elsewhere.” Family ties “My wife is Carly. We have been married 14 years. We have two kids, a 3-year-old and a 7-year-old. “With a 3-year-old and a 7-year-old, fun is a relative term these days. We do a lot of hiking. The kids this summer got very interested in waterfalls. We’ve hit every waterfall we could in a short hike — we’ve done Skaneateles and some others.” “I do woodworking and wood turning — it’s a branch of woodworking; you use a wood lathe. My big thing there is making wood bowls. I do that in most of my free time, which is not much,” he quipped. “I like to get into my woodshop and make a bowl and decompress and turn off the rest of the world for a little bit. I usually do it late at night when the house is quiet. It is definitely my escape from the day to day. I make a lot of bowls; all different sizes, all different species of wood. It’s a fun thing to do for me.” He gives away many of his creations. “They are mostly gifts — I don’t really sell them. I really don’t have time to go set up a booth at a fair or craft show. I usually give them away. I donate them to different things. If you are in my periphery, you’ve likely received a salad bowl from me as a gift. I just need to find something to do with all the stuff that I create,” he said. Lifelines Name: Benjamin Sio Position: President, CenterState CEO Birth Date: Not provided Birth place: Syracuse Residence: Westvale Education: Hobart and William Smith Colleges in the Finger Lakes Affiliations: Member of the boards of Skaneateles Festival, Greccio Foundation, Interfaith Works, CNY Community Foundation Personal/family: Married with two kids Hobbies: Woodworking and woodturning
ON THE JOB: ‘Where Do You See Your Career or Business in 3 to 5 Years?’
“For the next three to five years, I am looking to grow Oswego County Opportunities’ support for the county’s economic development to fight poverty and take advantage of the major investments that are coming to the area.” — Kevin Dean, Executive director, Oswego County Opportunities, Fulton “I love what I’m doing. I’m trying to do this as long as they let me. It’s so exciting to walk the floors at the various factories, talk with community leaders and be part of the solutions to their business problems. As we do this work with manufacturers and community members, we are helping the next generation have these great jobs in skilled manufacturing. I’d like to have the same job title for years to come. I’ve watched the last five years with awe and it makes me proud and excited to be from Upstate New York. I want to keep being part of the conversation that, yes, we can do it in Upstate New York.” — Randy Wolken, President and CEO, Manufacturing Association of Central New York (MACNY) “I oversee the Rochester and Syracuse offices. We’re seeing continual growth as there are more and more job seekers and companies that are looking to fill positions as the economy grows. I’d like to have another Upstate New York office in our region to help promote people under me. I want to see that happen. With an increase in the job market, that is what the end goal is here for sure. We currently have offices in Rochester, Buffalo, Syracuse and Albany, among more than 300 worldwide.” — Briana Calabrese, Marketing director and vice president of finance & accounting and administrative & customer support, Robert Half Recruiters & Employment Agency, Syracuse “Hopefully, we’ll continue to grow by word of mouth. I just took over a couple of years ago. I was an employee for 27 years. Business is great and we’re up on sales from where we were last year and I’m hoping that continues to happen. I get an overwhelming response from people who say they want to support local businesses. It’s my objective when people walk out the door that they want to come back. In a small town like this, it’s crucial. I see myself in five years doing exactly what I’m doing now: sticking with it and trying to grow Fulton Screen Printing.” — Tim Stone, Owner, Fulton Screen Printing, Fulton “I am 85 years old and teach four fitness classes a week and swim four times a week. I hope to live to be 90 — if I can do that, I won’t complain. The older I get, the less afraid I am of dying. What I don’t want to do is get some sickness where I’m lingering and I’m in pain and it just goes on and on. I expect to be exercising as much as I can and I hope I will know when I need to back off to accommodate different problems I may have when I’m older. For a short time, I got up at 6 a.m. to jog for a half hour every morning. But I had to avoid dogs, so I quit jogging. I hope to be able to swim for life. When I swim for half an hour, whatever problems I have wash away. I will still be working in exercise in five years. I also write research articles. It challenges my mind. You have to challenge your mind and body and have some kind of goals and reasons to go on living. My wife died three and a half years ago, so I try to go out and do things, even though she’s no longer here.” — Fred Wilson. Certified personal trainer at Fitness After 50 and leader of senior fitness classes, Syracuse “I expect to continue working as a local financial adviser professional for the next several years. I really enjoy working with my clients and consider it a privilege to come to work every day, helping my clients reach their financial goals.” — Randy L. Zeigler, Certified financial planner practitioner, chartered financial consultant and private wealth adviser, Ameriprise Financial Services, LLC, Oswego “I see myself doing something with young people. I want to open an after-school program as a safe space for high schoolers where they can get tutored, behavioral health, get something to eat. I want to do something with policy. I have thought of doing something with neurodivergent kids where kids can run some kind of business. I want to do anything with community like therapy and psychotherapy. I want to still be able to offer those services to people. At 55, I’m not sure how much I will do. I will see what happens after graduation from Keuka College.” — Della Joyce Smith, Master’s student, Syracuse “I think the core of the gym is in personal training. I don’t see that changing. People will still need a gym and personal training will stay. There may be some loss to AI as there is in just about every industry, but there’s always been the ability to go online and get a workout. I don’t think AI will cut into business any more than the internet has. I think the class structure is shifting. Large group classes might be fading away for a while. I see more people going to specialized classes like Pilates. I wouldn’t be surprised if maybe the traditional classes like boot camps started to fade away. It’s important to adapt. Maybe someday I’ll need to get some new kinds of classes. Everything tends to go in cycles.” — Ryan Vollmer, Certified personal trainer and owner Edge Strength and Conditioning, Syracuse “I have been growing my firm at 24% a year. In five years, we may be purchasing or building a new office building to accommodate the new growth. Right now, our focus is on growth and adding team members, mostly financial advisers and administrative staff.” — Terri Krueger, Chartered financial consultant and senior financial adviser with Orla Wealth Management in Syracuse “Over the next three to five years, I see TDO continuing to experience steady, sustainable growth as new industries establish and expand their presence across Central New York. These investments will create new opportunities throughout the regional manufacturing supply chain, and TDO will continue evolving our capabilities to help both existing manufacturers and emerging industries grow, compete, and succeed.” — Jim D’Agostino, CEO and executive director Central New York TDO (Train, Develop, Optimize), Liverpool
Defense focuses on mental health after state rests in Rodney Hinton murder trial
The defense began calling witnesses Tuesday in the murder trial of Rodney Hinton, shifting the focus to his mental health after he watched video of police shooting and killing his son.
Cook Political Report shifts 4 governors’ races toward Democrats
Cook Political Report is shifting four gubernatorial races in Democrats’ favor, the nonpartisan election handicapper said Tuesday, all in states which currently have Republican governors. Amo…
Cook Political Report shifts 4 governors’ races toward Democrats
Cook Political Report is shifting four gubernatorial races in Democrats’ favor, the nonpartisan election handicapper said Tuesday, all in states which currently have Republican governors. Amo…
Student-loan borrowers' timing to pick new repayment plan is shifting
More student-loan borrowers are receiving notices that they have an extra 30 days to leave the SAVE repayment plan, extending the transition deadline.
As sports betting is normalized, college players become targets of angry bettors
As legalized sports betting has grown, so have bets on individual player performance rather than final scores. "Prop bets" have surged especially in college sports, shifting the focus to individual players who are increasingly targets for abuse by aggrieved bettors.
Women’s health landscape shifting, but systemic hurdles remain
Closing the data gap with inclusionary research and educating investors on the promise of women’s health innovations remain key steps to health equity.
Democrats distance themselves from trans rights – close midterm races may show whether that pays off
A scholar of LGBTQ+ politics looks at how Democratic campaigns in Texas and Ohio are shifting on trans issues and what that could mean for control of Congress.
The Case for Shifting Mental Health Care From Institutions to Communities
Institutionalized mental health care is “outdated” and “a human rights issue hiding in plain sight,” write Anura Kumara Dissanayake and Tedros Adhanom Ghebreyesus.
‘All INdiana Politics’: Cost of living and AI regulation dominate Indiana’s most competitive House race
INDIANAPOLIS — The race for Indiana’s 5th Congressional District has emerged as the state’s most competitive contest as Democratic State Sen. JD Ford challenges Republican incumbent Rep. Victoria Spartz. The district, which includes Hamilton, Tipton, Howard, Grant, Madison, and Delaware counties, has long been a Republican stronghold. However, shifting trends in the northern Indianapolis suburbs […]
S.C. Succession: History-Making Debate Could Reshape Palmetto State's Evolving Politics
Three female candidates take the stage in South Carolina amid shifting electoral sands...
REO Town businesses forced to adapt amid economic slowdown
Small businesses in Lansing’s REO Town are adapting to economic challenges by shifting toward experiential services and receiving grants to attract customers, even as some local establishment…
'All INdiana Politics': Cost of living and AI regulation dominate Indiana’s most competitive House race
INDIANAPOLIS — The race for Indiana’s 5th Congressional District has emerged as the state’s most competitive contest as Democratic State Sen. JD Ford challenges Republican incumbent Rep. Victoria Spartz. The district, which includes Hamilton, Tipton, Howard, Grant, Madison, and Delaware counties, has historically served as a Republican stronghold. However, shifting trends in the northern Indianapolis […]
MLB Insider Links Guardians' Steven Kwan To Padres
A.J. Preller could pursue a blockbuster trade for Cleveland’s Gold Glove outfielder, potentially shifting Fernando Tatis Jr. in the lineup to create a terrifying new offensive core.
Ruto versus experts: Questions as President mocks science on El Niño threat
Ruto questioned the shifting timelines for the heavy rains associated with the El Niño event.
Why Cook Political Report is shifting 18 House races in Democrats’ direction
Ryan Smith launches survey in search for 'strong local vibe' at SLC entertainment district
With two-thirds of the Delta Center's renovation now complete, the owner of the Utah Jazz and Mammoth is now shifting his attention to a planned district east of it.
Data centers in Ohio are redrawing political battle lines
In Southwest Ohio, planned data centers are fueling intense local backlash. NBC News’ Ryan Nobles traveled to a Trump stronghold where the debate is shifting political allegiances and could swing the balance of power in Congress come November.
Covering the Cost: The cost of health insurance plans and Medicare
Annalisa Burgos talks with health insurance and Medicare expert Martha Khlopin, about what you need to know when enrolling in a health plan and shifting from employer-paid insurance to Medicare.
The shifting politics of Latino voters
A legislative battle in McAllen could signal if moderate Latino voters are shifting further left or continuing to lean towards the Republican party.
Ikea closing Bolingbrook location for small-format Naperville store
Ikea is replacing its Bolingbrook location with a smaller-format store in Naperville in 2027, part of the Swedish furniture retailer's shifting strategy.
In this vast stretch of northern Minnesota, shifting politics make every vote count
A state Senate rematch and a closely watched House race has a once-reliable DFL stronghold in northeastern Minnesota at the center of the fight for control of the Legislature.
Florida poll: Republicans lead in the races for governor and Senate
The new survey shows the state’s Hispanic voters shifting away from President Donald Trump after Republicans made gains in 2024.
Fran Lebowitz quips about politics, culture, tech at launch of ‘mosaic’ initiative
Duke hosted author and humorist Fran Lebowitz on Tuesday night in Page Auditorium. Her discussion ranged from her queer identity to the shifting arts landscape in America, with jokes cracked in every breath.
Bastrop's beef business
Bastrop County cattle producers are shifting to direct sales, flexible buying options and new products to manage rising costs and smaller herds.
LOCALIZE IT: As coding boom fades, computer science grads focus on AI skills in choppy job market
Computer science graduates face hiring challenges; artificial intelligence demand is shifting recruitment toward seniors
Let’s learn about origami-inspired science
The Japanese art of paper folding has inspired new designs for lightweight and shapeshifting technology.
Will Dawkins on AJ Dybantsa, Ending Wizards' Deconstruction Phase
From scouting character to ending the teardown, Washington Wizards GM Will Dawkins details the vision behind drafting AJ Dybantsa and how the franchise is finally shifting toward competitive growth.
Colorado football's quarterback carousel keeps going round and round
Deion Sanders struggles to find a consistent signal-caller as schematic failures and shifting offensive identities force another benching, leaving the Buffaloes searching for a desperate spark against Utah.
As Music Instrument Buyers Go Upscale, Fender Overhauls Online Experience
Fender is revamping its online presence amid a shifting market for musical instruments moving toward premium offerings, vintage sounds, and online sales and information.
Taylor Morrison snags 406 lots near TSMC's $265B Phoenix development
Homebuilders are shifting toward aggressive bulk lot acquisitions to lock down future inventory, with more to come.
Brian Bosworth Says Oklahoma’s Offensive Line Is Failing John Mateer
Sooners legend Brian Bosworth challenges the narrative surrounding John Mateer’s struggles, shifting the blame from the quarterback’s psyche to a porous offensive line failing to provide basic protection
The shifting Senate map: From the Politics Desk
The shifting Senate map: From the Politics Desk
Plus, Trump broadcasts his midterm anxieties.
Six mysterious structures found deep underground—scientists stunned by the discovery - Futura-Sciences
The Hidden Machinery Deep Below Earth isn’t just about tectonic plates shifting, volcanoes erupting, or the planet’s magnetic field shielding your compass. Our planet is an immense, complex machine, with gears grinding not only on the surface, but especially deep within. Numerous clues, mainly from seismic data, suggest that the...
GOP super PAC pauses spending in North Carolina Senate race, shifting money to Kansas
The new moves from the Senate Leadership Fund reflect a difficult landscape for Republicans, with increasingly competitive races in red states.
The Download October 2, 2026
The Download: Healey asks Trump administration to speed up review of planned gas expansion in latest sign of shifting energy politics
Willis ownership shifting with addition of Sewell family as new partner
Willis Automotive and the Sewell Family of Companies today announced a new partnership that will see Willis Chairman Rich Willis sell the company to current CEO Jason Willis and Collin Sewell of the Sewell Family. Jason Willis will continue to serve as president of Willis Automotive and remain an owner alongside Sewell. Rich Willis, chairman…
Healey asks Trump administration to speed up review of planned gas expansion in latest sign of shifting energy politics
As Healey hunts for ways to bring down soaring costs and campaigns for reelection in a race defined by the affordability crisis gripping the state, the governor sees an opportunity to appeal to the Trump administration to bring more gas into the state.
GOP hold on Florida and Texas governors’ races weakens, nonpartisan analyst says
President Donald Trump’s poor ratings contributed to the Cook Political Report shifting both races from “Likely Republican” to “Lean Republican.”
‘Uncertain Empire’: Historian considers post-World War I shifts that shaped Jewish futures
Historian Elizabeth E. Imber’s award-winning book, considers the shifting post-World War I political dynamics — including the uncertain fate of British imperialism — that shaped Jewish futures.
Global Health & WASH: October 2026 Funding Opportunities (26 new opportunities)
41 opportunities on the Global Health & WASH page this cycle, 26 of them new. The health money on this page is mostly research money, and much of it is aimed at people early in their careers. Funder after funder, from the TANGO2 Research Foundation’s Research Pathways grants to the South African Medical Research Council’s Early Investigators Programme to the National Ataxia Foundation and Alex’s Lemonade Stand Foundation, is funding early-career investigators and the institutions that host them, with a clear tilt toward researchers based in or from the Global South, from AMBSO in Uganda to Kenya’s CONNECT-VAX network to Ersilia’s AI Incubator for African drug discovery. The money is organized by disease as much as by need: narrow foundations, the Parkinson’s Foundation, NTAP for neurofibromatosis, the RUNX1 Research Program for an inherited blood disorder, each run their own grant, so the question for an applicant is less which health problem you work on than which foundation owns your disease. The largest European cheques go to consortia only, with the European Innovation Council putting up to EUR €4 million behind a single healthy-ageing project and UNITE up to EUR €1 million behind each cross-border digital health team. Water sits apart, almost entirely in applied utility research: the Water Research Foundation’s cluster of USD $250,000 to $500,000 projects, each built around a utility problem from sewer laterals to reuse treatment. And the biggest single pot is public: HRSA is renewing community health center service areas with awards of up to USD $10 million each. This post is for paid subscribers. This helps support the time and effort it takes to curate and organize these opportunities. Subscribe To keep this accessible to everyone who needs it, we’re happy to offer pay what you can rates. You can find more details here. Open Opportunities 2027 Building the Field of Health Advocacy Grant, Georgia Health Initiative. *New!* *Closing soon!* Georgia Health Initiative, a nonprofit private foundation focused on health equity, is opening its 2027 Building the Field of Health Advocacy Grant to strengthen the organizations that push for healthier systems across the state. The Initiative treats advocacy as infrastructure, backing one-year projects that range from urgent responses to shifting federal policy to longer arc campaigns on housing, behavioral health, care access, and food security. It wants coalitions that elevate community voice, apply an equity lens, and arrive ready to deploy concrete strategies, and it deliberately seeks variety in issues, communities, and organizational size. The optional webinar and required lobbying training signal a funder investing in a durable field, not one grant cycle. The strongest fits are Georgia nonprofits and public agencies ready to turn advocacy readiness into systems change. Geographies: United States. Who can apply: Tax-exempt 501(c)(3) public charities, state or local government agencies, or coalitions/collaboratives using a 501(c)(3) fiscal sponsor, that work in Georgia on behalf of Georgians and align with the mission, vision, and values of Georgia Health Initiative. Only one application per organization, though an organization may be listed as a partner or subcontractor on multiple applications. Funding amount: Organizations can apply for up to USD $80,000 per project; the Initiative anticipates investing a total of USD $1.36 million. Targeted Sectors / SDGs: Governance, Policy & Advocacy · SDG3; SDG10. Deadline: October 2, 2026. Learn more and apply here. TDD Research Pathways Grant, TANGO2 Research Foundation. *New!* *Closing soon!* The TANGO2 Research Foundation, working with a founding gift from Tango2UK, is opening its TDD Research Pathways Grant to fund early-career investigators anywhere in the world who study TANGO2 Deficiency Disorder. The foundation is using this money to seed pilot work and to build a research community around a rare disorder that few labs currently study. It wants to back emerging scientists, clinicians, and trainees who will stay with this field, not one-off projects, which is why it requires a committed mentor and real institutional support and asks each applicant for a plan for future contributions. The design rewards promise and persistence over track record. The strongest fits are students, residents, postdoctoral fellows, and new investigators ready to commit to TANGO2 research. Geographies: Global. Who can apply: Early-career investigators worldwide, including undergraduate, graduate, and medical trainees, postdoctoral fellows, residents, and clinical or research fellows. Early-career investigators must hold a PhD, MD, or equivalent doctoral degree and be within 10 years of that degree or within 5 years of initiating rare disease research, engaged in postdoctoral research at an academic institution, teaching hospital, or nonprofit research institute. Currently enrolled trainees and transitional PhD candidates beginning a postdoctoral appointment at a nonprofit institution by July 1, 2026 are also eligible. All applicants must identify a qualified mentor with relevant TDD or rare disease research experience and demonstrate institutional support. Funding amount: Up to USD $15,000. Targeted Sectors / SDGs: Innovation, Science & Technology. Deadline: October 2, 2026. Learn more and apply here. Call for Expression of Interest (EOI): AMBSO Impact Research Initiative, Africa Medical and Behavioral Sciences Organization (AMBSO). *Closing soon!* The Africa Medical and Behavioral Sciences Organization is inviting expressions of interest for its Impact Research Initiative, which funds early-stage pilot studies and proof of concept work on priority health challenges. AMBSO is a Ugandan research organization backing bold ideas that can grow into larger studies, and its tracks span antimicrobial resistance, epidemic preparedness, artificial intelligence for diagnostics, HIV prevention, climate and health, cancer, maternal and child health, and non-communicable diseases. The small award size and direct-cost-only rule point to a funder that wants evidence rather than overhead, and that favors projects able to attract follow-on money or use AMBSO’s own research infrastructure. Eligibility runs worldwide, welcoming researchers and institutions inside and outside Africa. The strongest fits are researchers with a feasible pilot that generates policy-ready evidence. Geographies: Global. Who can apply: Open worldwide to researchers, academic institutions, and research organizations whose work aligns with generating high-impact health evidence. Independent researchers are eligible if affiliated with an academic or research institution. Doctoral students are encouraged to apply as part of a research team led by a faculty Principal Investigator. Community-based organizations and other eligible entities may apply. Projects may be implemented inside or outside Uganda. Funding amount: Up to USD $10,000 per project, with no minimum funding threshold. Targeted Sectors / SDGs: SDG3. Deadline: October 2, 2026. Learn more and apply here. Entrepreneurs for Resilience 2027 (E4R27), Swiss Re Foundation. *Closing soon!* Swiss Re Foundation is opening the tenth edition of Entrepreneurs for Resilience, which backs healthcare social enterprises expanding affordable, quality primary care for low-income communities across low- and middle-income countries. The Foundation is using catalytic, blended funding plus multi-year advisory to take risk out of scaling, helping proven models reach more people sustainably rather than stay stuck at pilot size. It looks to back brick-and-click enterprises that pair physical care with digital tools and build affordability through savings, payments, or microinsurance, ideally integrated with public health systems. Requiring earned revenue, real customer scale, and gender-inclusive teams signals that this is growth capital for commercially serious ventures, not seed money. The strongest fits are established, revenue-generating healthcare enterprises ready to scale access for underserved populations. Geographies: Global. Who can apply: For-profit and hybrid healthcare social enterprises serving low-income and underserved populations in low- and middle-income countries, using combined physical and digital (brick-and-click) healthcare delivery models. Applicants must demonstrate measurable social impact, generate at least 50% of income through earned revenue, have been established no later than December 2023, already serve at least 50,000 people with potential to scale, and have at least 30% low-income customers. Preference for gender-inclusive enterprises with at least one female founder or at least 30% women in management. Funding amount: Pilot funding of up to USD $45,000 for the 6-8 shortlisted social enterprises; up to USD $1 million in blended funding (up to USD $600,000 unconditional plus up to USD $400,000 conditional) shared among 3-4 finalists over a two-year implementation period; total programme funding approximately USD $1.3 million. Targeted Sectors / SDGs: Innovation, Science & Technology · SDG3; SDG5. Deadline: October 4, 2026. Learn more and apply here. Horizon HealthTech 2026, IIITD Innovation & Incubation Center. *Closing soon!* IIITD Innovation and Incubation Center is opening Horizon HealthTech 2026, a nine-month MedTech incubation cohort run under the aegis of BIRAC EDGE for founders building medical devices, diagnostics, surgical and interventional tools, or remote monitoring. The center is backing teams that already hold a validated proof of concept and want to reach a tested prototype, pairing each founder with a named expert and clinical validation through a hospital partner. What they seek to back is Indian health technology that can survive real clinical scrutiny and regulatory review, not slideware. The structure, with lab access, CDSCO guidance, IP support, and investor connects, signals a program built to make startups ready for follow-on capital. The strongest fits are early-stage MedTech teams with defensible IP and a working path from bench to bedside. Geographies: India. Who can apply: Early-stage teams/startups with a validated idea/proof of concept (TRL 3 onwards) working on medical devices, diagnostics, surgical/interventional technologies, or remote monitoring, holding IP or with potential to generate IP. Funding amount: No cash award amount is stated on the official program page. Benefits are in-kind: prototyping lab and equipment access, clinical/hospital validation (Max Healthcare), expert mentorship, CDSCO regulatory guidance, IP filing support, workspace, cloud credits and tools, and investor connects. Run under the aegis of BIRAC EDGE and builds a path to follow-on Government/VC/Angel funding. Targeted Sectors / SDGs: Innovation, Science & Technology · SDG3; SDG9. Deadline: October 5, 2026. Learn more and apply here. OpenAI AI and Teen Development Research Grant Program, OpenAI. *New!* *Closing soon!* OpenAI is opening its AI and Teen Development Research Grant Program to fund independent studies of how generative AI shapes the lives of young people ages 13 to 17. OpenAI wants a stronger evidence base on how teens actually use these tools and what that use does to their social and emotional development, so that product teams, policymakers, and regulators can act on findings rather than assumptions. It seeks work on emotion regulation, relationships, belonging, and the safeguards that keep teens safer, welcoming interdisciplinary teams and any methodology. That it will fund research whose conclusions may not favor AI providers, and prioritizes studies touching ChatGPT, signals a genuine appetite for credible outside scrutiny. The strongest fits are research groups grounded in adolescent development, well-being, and AI safety. Geographies: Global. Who can apply: Researchers aged 18 or older who are affiliated with a research institution or organization, and/or have significant experience relevant to child or adolescent development, well-being, human-computer interaction, AI impacts, or a closely related field. Multiple institutions may collaborate. OpenAI is seeking to fund research rather than for-profit initiatives and will not prioritize for-profit organizations. Funding amount: Individual research grants up to USD $1 million, totaling up to USD $5 million; maximum 10% of each grant for overhead or indirect costs. Targeted Sectors / SDGs: Social Inclusion & Community Wellbeing; Innovation, Science & Technology. Deadline: October 6, 2026. Learn more and apply here.
Community Bridges built ECM to prevent health crises. Now the state funding is shifting and we have to close the program
California created enhanced care management to help Medi-Cal patients with complex health and social needs before they reach the emergency room. Community Bridges spent three years building a community-based program that now serves more than 200 people. But, Community Bridges CEO Ray Cancino writes, a shift toward encounter-based reimbursement is making the relationship-building, outreach and coordination that prevention requires increasingly difficult to sustain and Community Bridges will now be forced to close the program. Cancino wonders here the new payment model will actually save money — or simply move the costs downstream.
Business and Industry Association Ranks Lawmakers for the 2026 Session; Political Winds Shifting
The Business and Industry Association's annual legislative report and legislative rankings is an indication of how much the political landscape has changed in Concord.
Business and Industry Association Ranks Lawmakers for the 2026 Session; Political Winds Shifting
The Business and Industry Association's annual legislative report and legislative rankings is an indication of how much the political landscape has changed in Concord.
Trump’s shift from ‘Housing First’ is causing upheaval for homelessness programs and many they serve
The Trump administration is shifting federal policy and dollars away from the “Housing First” approach that has been at the heart of federal homelessness policy.
Proposal 2 targets political giving by businesses. A court fight is a sure bet.
With Proposal 2 polling strongly, attention is already shifting to an expected constitutional challenge from business interests if voters pass the measure on Nov. 3.
Proposal 2 targets political giving by businesses. A court fight is a sure bet.
With Proposal 2 polling strongly, attention is already shifting to an expected constitutional challenge from business interests if voters pass the measure on Nov. 3.
In more than a dozen Minnesota House races, no GOP candidate is running
In 17 Minnesota House races, the Minnesota GOP does not have a candidate on the ballot. That absence is a surprise to some, but it also shows a strategy of shifting resources to more winnable districts.
GOP doubts about North Carolina have Republicans shifting focus
Republicans haven’t abandoned the Southern battlegrounds, though they're shifting greater resources to states they see as more competitive.
Scientists Test an Unexpected Sleep Aid Made From Tree Roots
A pilot study suggests that oil from underused Hinoki roots could be used in scented products for relaxation. Falling asleep can be compared to easing down a dimmer switch, with brain activity gradually shifting as sleep deepens. Researchers studying Hinoki, or Japanese cypress, are exploring whether its scent could help smooth that transition for women
Can Oracle's longtime board oversee its radically changing business?
The company is shifting aggressively toward AI and cloud infrastructure, but six of its 13 nominees are over 70.
From professor to patient: One man's journey on the frontier of lung cancer treatment
Lung cancer is still the top cancer killer, but new developments are shifting what the future might hold for patients.
Soaring diesel prices are clobbering Trump’s MAGA faithful, exposing rifts
Pain at the pump for rural Republicans is shifting the political map.
Nearly 50, Jason Mraz is genre-shifting, living in the moment and done flirting
Ahead of his Hong Kong concert, the American singer spills all on love songs and ‘highlighting the goodness’.
Presentation on proposed development by Emplify Health in Viroqua Business Park sparks debate about the future of local healthcare
Sept. 26, 2026 by TIM HUNDT VIROQUA, Wis. — A proposed healthcare expansion in Viroqua has moved to a key municipal committee, as local consumers continue to wonder what the shifting relationship between Vernon Health and Emplify Health will mean for their access to medical care. The Viroqua Business Park Commission met Wednesday, September 23, […]
Intel Panther Lake Teardown, 18A, BSPD, GAAFET, SemiAnalysis STEEL
Panther Lake debuts the first commercial implementation of backside power delivery (BSPDN), introduces Intel’s first iteration of gate-all-around (GAA) transistors, and showcases their advanced packaging capabilities with its Foveros-S assembly. With Panther Lake, Intel’s manufacturing arc has shifted from nebulous roadmaps to shipped silicon, a significant milestone on their long road back to competitive semiconductor manufacturing. To evaluate the extent of Intel’s comeback, we tore down Panther Lake. The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. Our teardown traces 18A from its four-sheet RibbonFETs (Intel’s marketing name for GAAFETs) and gate stacks through contacts, frontside and backside wiring, and the bonded carrier. We explain how these material and integration choices improve gate control and reduce resistance, while adding capacitance, thermal resistance, and process complexity. Our measurements put Panther Lake’s 18A compute logic and TSMC N3E GPU logic at similar logic density. However, 18A does not lead TSMC N3P, N2 or Samsung SF2 in peak density. Panther Lake’s CPU cores are incremental updates, and the high-end GPU still uses TSMC N3E. Panther Lake assembles one compute tile, one GPU tile, and one I/O tile atop a passive base tile using Intel’s Foveros-S advanced packaging. Both compute tile variants use Intel 18A. The Xe3 GPU options are a 4-core GT1 tile on Intel 3 and a larger 12-core GT2 tile on TSMC N3E. Both I/O tile variants use TSMC N6. [1], [2] Our analysis centers on the PTL-U compute tile, both the 4-core and 12-core GPU tiles, as well as the 12-lane I/O tile. In conventional chips, power and signal are routed through the same frontside metal stack towards the device frontend. Power rails consume scarce routing resources near the transistors, while tall via stacks carry VDD and VSS from the coarse upper wires to local rails. Backside power delivery (BSPD) moves the main power network behind the transistor layer, to the backside, separating it from frontside signal routing. We covered BSPD and its impacts in 2024. [3], [4], [5] Intel’s BSPD implementation, branded as “PowerVia”, routes power through dedicated backside metals to nano-TSVs, which connect those rails to local source/drain (S/D) contacts. Implementing that separation requires Intel to build the interconnect stacks from both sides of the wafer. The frontside comprises the M0-M14 signal stack, while the backside comprises the BM0-BM5 power stack. M0 and BM0 are closest to the transistors. The nano-TSVs connect the two sides, but Intel patterns and etches each via from the front after forming the contacts. A narrow via runs from the side of the contact deep into the silicon substrate. Intel then completes the frontside signal metal stack, bonds the wafer to a carrier, flips it and removes the original substrate until the buried via tips are exposed. The backside metal stack is then deposited directly on the revealed vias. The nano-TSV and backside-via profiles taper in opposite directions because Intel forms them from opposite sides of the wafer. The transistor structures form the FEOL. Local contacts and nano-TSVs connect them to the wiring. M0 begins the frontside interconnect stack. The silicon carrier remains attached above the frontside interconnects. It supports the device wafer during substrate removal and backside processing and remains part of the finished chip’s thermal path. PowerVia removes the main power distribution from the congested frontside metals, routing supply through shorter and wider backside wires. Its lateral landing still occupies area in the standard cell, so it recovers less cell area than a direct backside contact. [3] Nano-TSVs beside the logic devices carry VDD or VSS from the backside power network, while signal connections continue upward through the frontside metals. Backside Interconnects Samsung SF2 data is included for comparison to Panther Lake’s within this article. SF2 is the incumbent GAA foundry node but lacks BSPD, serving as a useful reference to evaluate 18A. A full teardown of Samsung’s S26 products, processed on SF2, will be shared soon.Nanosheet-cut EDS comparison. The PowerVia supply path runs from the backside Cu rails through Mo-lined W nano-TSVs to the local transistor contacts. In this cross section, the tapered connection spans roughly 150 nm from the contact level to BM0. The Ta liner confines Cu and promotes adhesion to the surrounding stack; the AlOₓ etch stop controls the next dielectric etch above the rail. Dielectric beneath the ribbons electrically separates the devices from the backside wiring and removes the conducting silicon body below the channel. [6] AlOₓ serves as an etchstop (ES), enabling endpointing and protecting the underlying layers. Low-volatility aluminum fluoride reaction products resist the fluorinated plasma, allowing a thin AlOₓ film to protect the metal while the surrounding low-k dielectric is removed. [6], [7]. While the BM0 and layers above the M1 lines show double AlOx layers, Our SMIC N+3 teardown showed single AlOₓ layers. SMIC uses a simpler local AlOₓ substack, while the remaining cap and etch sequence provide the required landing protection. So why double layers? The closely spaced AlOₓ doublets provide two protected endpoints in the etch sequence. Intel documents an AlOₓ/SiN/AlOₓ stack that explains the benefit. The main dielectric plasma etch stops on the first AlOₓ film; a selective wet clear opens that film; a second plasma etch removes the intermediate SiN and stops on the second AlOₓ film. The final wet clear exposes the metal landing surface. SiN is the intermediate dielectric in Intel’s published example. [8] The second stop protects the metal through a cap breakthrough. Wide openings can etch faster than narrow ones, and etch depth varies across the wafer. Metal under an early-clearing opening would otherwise be exposed while other openings still need more etching. Staged protection widens the process window and reduces metal erosion, corrosion and void formation. [8] TSMC documents AlN/AlOₓ/SiOC/AlOₓ above Cu, with AlN blocking Cu diffusion, and a simpler AlN/SiOC/AlOₓ variant that omits one AlOx film. [9] Levels with different opening sizes, aspect ratios, pattern densities and cap materials need different etch margins. A double AlOx stop is useful where another protected endpoint justifies the added processing. The extra film adds formation, selective opening and cleaning steps, plus another set of interfaces to control adhesion, moisture, and stress. These blanket films are opened through the existing via pattern, so each film does not require another lithography mask. AlOₓ adds parasitic capacitance when it replaces lower-k dielectric; two thin AlOₓ films can nevertheless contain less AlOₓ than one thick film. Total thickness, placement, and theintermediate dielectric determine the electrical cost. Deposition chemistry also changes AlOx permittivity and residual hydroxyl content, which can oxidize the underlying metal. [7], [8], [10], [11] The backside stack separates into relatively fine BM0-BM2 wiring near the devices and coarser BM3-BM5 power distribution. The largest pitch increase occurs between BM2 and BM3. BM0’s pitch closely matches the logic-row height, fitting local power delivery to the cell rows. Higher levels aggregate current through larger conductors: routing density becomes less important than low resistance and current capacity as the network approaches the package. This hierarchy provides wide power wiring for the power delivery network without consuming scarce frontside signal-routing resources. [3] The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. Frontside Interconnects Intel 18A combines Mo-lined W contacts and nano-TSVs with a separate backside Cu power network. Samsung SF2 keeps power on the frontside, using Ti-based contact interfaces and Ta-based barriers and Co liners around Cu wiring. In 18A standard-cell rows, backside power rails supply the devices through nano-TSVs within the cells, freeing frontside routing resources. Samsung’s M0 accommodates both power and signal connections. From the device toward M0, the connection runs through a Ti-based S/D interface, W contact fill, a Mo-lined W via, and the Cu M0 wire. Mo supplies a conductive nucleation and adhesion layer for W, replacing the resistive TiN liner used in conventional W integration. This increases the effective conduction volume within the feature while retaining W fill and its established polishing, cleaning and etching processes. Intel’s Mo/W patent describes this integration tradeoff. The nano-TSV uses the same Mo-lined W construction in the backside supply path. [12] The move from TiN to Mo is an incremental change. While a full Co or Mo fill can also reduce the volume lost to liners in very small features, it requires new integration schemes that increase complexity and risk. Cu remains attractive for wider wires due to its low resistance. As wires and vias shrink, the diffusion barrier consumes an increasing fraction of their cross-section. [12], [12], [14] Intel uses Co/Ru liners at M0-M1, Co at M2-M4, and Nb at M5-M9. The lower-level liners help Cu adhere and reduce void formation during trench fills. Applied Materials’ Endura has new thermal control that facilitate wetting process, so the thin film continuity is good enough that good capillary pressure will drive Cu atoms to the via bottom without voiding. Intel’s choice to use Nb is particularly interesting. Intel’s Nb patent describes a conductive diffusion barrier intended to reduce the barrier’s contribution to resistance relative to conventional Ta-based barriers, particularly at via bottoms where all current crosses the barrier. The patent pairs Nb in coarser levels with the option of lower-cost PVD processing. [15], [16] The upper metal layers support thicker barriers formed through physical vapor deposition (PVD) despite its worse coverage and uniformity. Meanwhile, the lower metal layers require thinner barriers deposited through conformal atomic layer deposition (ALD). Co/Ru adds another material interface and requires controlled deposition and Cu fill. Changing liners and barriers by metal layer allows Intel to optimize interconnect resistance, process complexity, and reliability. [15, 16] RibbonFET, Intel’s name for its gate-all-around FETs (GAAFETs), replaces the FinFET’s vertical fins with four stacked horizontal silicon nanosheets, allowing the gate to surround the channel on every side. The path to GAAFET begins with the planar transistor. A planar MOSFET places the gate above the channel between its source and drain. Pairing an NMOS with a PMOS transistor creates a CMOS inverter, in which the NMOS pulls the output low for a high input, and the PMOS pulls it high for a low input. The gate must retain electrostatic control of the channel to ensure clean switching. As gate lengths shrank, the drain began to compete with the gate for that control, increasing off-state leakage. Electrostatic control was restored through an architectural evolution that raised the channel into a vertical fin and wrapping the gate around three sides. Called “FinFET”, this new architecture packed more effective channel width into a smaller footprint. Further scaling made it harder to maintain both drive current and leakage within smaller cells, and reintroduced the same problems planar MOSFETs faced. Nanosheet GAAFETs close the fourth side by replacing the vertical fin with a stack of horizontal nanosheets, each surrounded by the gate. The tighter electrostatic control suppresses leakage at shorter gate lengths while stacking adds effective channel width within the cell footprint. In a FinFET process, channel width changes in discrete steps as designers must add or remove whole fins. Nanosheet width can instead be adjusted continuously within the process’s design rules. Wider sheets increase drive current, while narrower sheets reduce capacitance at the cost of drive current. Intel 18A uses stacks of four nanosheets each and varies their widths across logic and SRAM. At the process level, adding more sheets to each stack increases effective channel width and drive current, but complicates fabrication. RibbonFET vs MBCFET Samsung began GAAFET production in 2022 with SF3E, following with SF3 and now SF2. Its ‘MBCFET’ provides a useful structural comparison with Intel’s first RibbonFET implementation. [17] STEEL is digging deeper into SF2, used in the Exynos 2600, and TSMC’s GAAFET N2, used in Apple’s A20 Pro, in upcoming newsletter articles. We’re throwing some teasers on X. Let’s compare Samsung SF2’s MBCFET with Intel 18A’s RibbonFET. Subscribe Even to the untrained eye, Intel’s extra nanosheet is obvious. Intel stacks four ribbons to Samsung’s three. Samsung’s sheets are much wider in these fields, so both sheet count and width matter to the available channel perimeter. Sheet width also changes which silicon surfaces carry current. On conventional (001) silicon, wide nanosheets emphasize the broad top and bottom surfaces, favoring electron transport; the larger sidewall contribution in a narrow sheet favors hole transport. Thinner sheets improve gate control but increase confinement and scattering. This makes width and thickness part of the NMOS/PMOS balance, alongside strain and threshold voltage. [18], [19] GAAFET designs like 18A use different work-function-metal (WFM) stacks for NMOS and PMOS. Around each ribbon, a thin SiOx interfacial layer separates the silicon channel from the HfOx high-k dielectric, with La providing dipole tuning and the WFM wrapping the dielectric. NMOS uses a TiAl-based stack, while PMOS uses TiN WFM. W fills the remaining gate trench, providing a lower-resistivity path where the work-function layers are no longer needed. In this field, the PMOS stacks leave room for W between ribbons, while the NMOS stacks occupy more of those gaps. A silicon-based dielectric marks the P/N boundary, allowing the PMOS and NMOS gates, sharing the same gate trench, to be processed sequentially. Fast logic paths, retention circuits, and SRAM need a family of threshold options. Changing threshold without substantially changing device dimensions, capacitance or fabrication complexity is valuable. FinFET processes typically use different work-function-metal stacks. In a four-ribbon GAA stack, the narrow sheet-to-sheet gap limits how much WFM can fit around each channel. La in the gate dielectric creates interfacial dipoles at the SiOx/HfOx boundary, shifting effective work function and tuning threshold voltage. This gives Intel another control alongside its NMOS and PMOS WFM stacks. Low-threshold devices improve critical-path drive; higher thresholds reduce leakage elsewhere. Dipole tuning is especially useful in GAA because it changes threshold without consuming the narrow intersheet gap with thicker WFM. Precise control of La incorporation, diffusion and interface quality has long been a challenge, limiting viability in high volume production but is now seen from every leading-edge foundry. Intel’s patent describes depositing a dipole-forming oxide above HfOx and annealing it toward the interfacial oxide before completing the work-function and fill metals. This separates threshold tuning from the space available for metal. Newer research addresses the thermal cost: imec’s 2026 dipole-middle research inserts the shifter between two HfOx depositions, shortening the diffusion path while protecting SiOx during patterning. [20], [21]Matched-cut EDS, Intel 18A (left) vs. Samsung SF2 (right). Intel retains raised source/drain epi beneath its contacts, while Samsung recesses W deep into the epi to form a V-shaped Ti-lined interface. The deeper contact increases metal-to-semiconductor area and shortens the current path from the lower sheets, reducing contact and spreading resistance. It also removes epi volume and brings the contact etch closer to the channel ends. Retaining more epi preserves the material available for strain transfer, especially from SiGe into PMOS. These geometries balance contact access against stress engineering and etch margin. [22], [23] Samsung stacks three sheets to Intel’s four ribbons, and both processes use sheet width to tune drive strength. In our Samsung cross-sections, widths range roughly from 19 to 30 nm in the NPU rows and 37 to 50 nm in the CU cell. The Samsung nanosheets taper, with the widest sheet at the bottom and the narrowest at the top. Both processes use HfOx gate dielectric and Ti-based work-function stacks, with Al in the NMOS stack. In the Samsung devices shown here, the dielectric and WFM occupy the intersheet gaps, leaving W above the top sheet. Intel’s PMOS stack leaves more room between ribbons, and W fills those gaps while the thicker NMOS stack leaves W mainly in the upper trench. Gate-stack EDS maps. The W between Intel’s PMOS ribbons provides a conductive path close to the lower gates. Where WFM fills the entire gap, the gate still surrounds the channel, but voltage reaches it through the more resistive work-function films. Thinner WFM and dipole tuning preserve room for low-resistivity fill; Mo and Ru are alternative fill metals being developed for further scaling. [24] A masked, sequential WFM flow explains the different gate heights and inter-nanosheet fill. The proposed sequence below shows how separate NMOS and PMOS work-function steps produce that geometry. Enabled by the BSPDN process, Intel replaces the dense-logic silicon subfin with dielectric, removing the parasitic conduction path below the ribbons and reducing substrate-related capacitance. A retained silicon body as in classical, non-SOI, planar and FinFET designs needs junction and punchthrough-stop engineering to suppress leakage. Dielectric isolation makes that leakage less sensitive to the subfin doping profile but adds removal and fill steps. It also weakens the direct thermal path through silicon, making the contacts, metal stacks and package more important for heat extraction. [24], [26] Fluorine is concentrated around selected Intel device structures in the maps. WF6 is a standard precursor for W nucleation and fill, while barrier films protect adjacent dielectrics from fluorine attack. Low-fluorine W processes reduce the residual-F burden. Chloride-based precursors avoid introducing F during W deposition, but require control of chlorine attack, nucleation and fill quality. The integration target is a continuous, low-resistance W path with a thin protective liner and minimal chemical damage to the surrounding stack. [20], [27], [28] The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. We measured cell height, gate pitch, metal geometry, and ribbon dimensions at the XTEM sites shown below. The tables group these dimensions by site and device polarity. Our “sheet cuts” cross the silicon channel and show the ribbons end-on. “gate cuts” run along the channel through successive gates. The 18A logic cell dimensions point to a five-track logic library while the N3E and Intel 3 cell dimensions evidence a seven-track logic library. The DDR-PHY uses wider M0 wires and much larger spacing than core logic. That trades routing density for lower wire resistance and weaker coupling between neighboring nets. The geometry suits the current delivery and coupling requirements of analog, clock, and I/O circuitry. PowerVia lets 18A combine a compact cell height with wider M0 geometry by moving the main power rails off the signal-routing tracks. That relaxes local wire scaling while preserving a small cell footprint. Cell height and gate pitch set the geometric density; pin access and routability determine how much of it a real block can use. [29] The biggest takeaway from our gate-pitch measurements is that Intel 18A compute logic and TSMC N3E GPU logic have similar density in the Bohr representative-cell model. The 18A example is 18.6% denser than the Intel 3 GPU example. Gate pitches are nearly identical across the three sites, so cell height drives most of the difference. The Bohr model combines a four-transistor NAND2 spanning three gate pitches and a 32-transistor scan flip-flop (SFF) spanning nineteen pitches, weighting their densities 60:40. The sensitivity column shows how independently changing cell height and gate pitch by ±1 nm changes the result. This compares representative cell geometries; whole-die density also depends on cell mix and placement. The 18A P-core gives M0 substantially more metal cross section than the N3E vector engine. Treating each profile as a trapezoid gives 2.63 times the area per line and 1.84 times the area after normalization by routing pitch. The larger section reduces the geometric contribution to line resistance and lowers current density for a given current. Taller and wider wires also add capacitance, so circuit delay depends on the balance of resistance and capacitance. The DDR-PHY has less metal area per routing width than the 18A core fields, while remaining above N3E. [30] Area = height × (top CD + bottom CD) / 2, including liners. Area/pitch normalizes by routing width. Taper is the symmetric sidewall angle from vertical, with the largest angle belonging to the DDR-PHY. Compute tile The measurements show how ribbon dimensions and gate-stack geometry vary across the compute tile and between NMOS and PMOS to balance channel drive, gate load and the space needed for the dielectric/WFM stack across logic, SRAM and the DDR-PHY. Width mainly changes available channel perimeter; thickness also changes electrostatic control and carrier confinement. Gate-stack thickness then determines the space left for low-resistivity fill P-core and LP E-core logic Both the P-core and LP E-core use multiple nanosheet widths. Widths are measured on high-magnification XTEMs while wider-field images demonstrate additional width choices within the LP E-core. Multiple widths are expected even within an LP E-core. Timing-critical paths, buffers and cells with different fanout need different drive strengths. The lower-magnification fields show this width diversity beyond the sites quantified in the table. L2 and L3 SRAM GAA gives SRAM designers another way to balance the pull-up (PU), pass-gate (PG), and pull-down (PD) transistors. FinFET bitcells set device strength through fin count while GAA adds nanosheet width as a sizing knob. In a 6T SRAM cell, a strong pull-down relative to the pass-gate limits read disturbance, while a strong pass-gate relative to the pull-up improves writability. During a write, the pass-gate and write driver pull the node storing “1” below the inverter trip point. During a read, the pull-down holds the node storing “0” low. Bias, threshold voltage, mismatch and assist circuitry set the remaining margin. FinFET high-current cells commonly use a PU:PG:PD fin-count pattern of 1:2:2, a device-sizing ratio rather than a current ratio. Ribbon width lets Intel balance SRAM strengths without adding whole fins. The L2 cell uses its narrowest ribbons for PU and widest for PD, improving writability and read stability respectively. Intel’s disclosed HCC operates without assist; its denser HDC uses negative-bitline write assist. Pulling the selected bitline briefly below ground increases pass-gate overdrive so it can overpower the pull-up at lower supply voltage. That buys density and low voltage writability at the cost of boosting circuitry, switching energy, and additional voltage stress that must be controlled. [31], [32] Four rectangular ribbons give the perimeter = 8 × (width + thickness), before corner rounding. PG/PU is 1.49 and PD/PG is 1.16. The L3 structures closely resemble L2 in layout and cell height. Fewer L3 nanosheet widths are tabulated because fewer high-magnification images were available. DDR PHY The DDR-PHY trades density for controlled analog behavior and reliable off-chip signaling. It contains drivers, receivers, delay circuits, and calibration logic that set drive strength, sampling time, and voltage margin. Repeated four-sheet devices with similar widths fit the use of regular transistor units for matching and programmable drive. Its wider local wiring provides room for current delivery and separation of sensitive signals, while consuming more area than a dense core-logic grid. The layout serves the memory channel’s electrical requirements as well as digital logic density. [33] The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. Intel 3 GPU devices Vector engine logic Intel 3’s XVE logic uses two-fin PMOS and NMOS devices with power rails in M0. Its cell height and M0 pitch give a seven-track geometry, two tracks more than the 18A logic. One-fin groups also appear among the two-fin devices. Intel 3 L2 SRAM The Intel 3 L2 SRAM uses the familiar HCC sizing pattern: one PU fin, two PG fins, and two PD fins. N3E GPU devices Vector engine logic The N3E XVE field contains repeated two-fin devices with seven-track cell geometry. N3E remains a FinFET process, giving Panther Lake a direct FinFET-to-RibbonFET comparison. N3E L2 SRAM The N3E L2 SRAM uses the same PU:PG:PD fin-count pattern of 1:2:2. Panther Lake-U follows Lunar Lake’s floorplan quite closely. Both pair 4 P-cores with 4 LP E-cores and NPU, media and display engines in similar locations. Lunar Lake also uses Xe2, the direct predecessor to Panther Lake’s Xe3 GPU. This makes Lunar Lake the most direct basis for our comparisons. Arrow Lake differs in core count and uses the older Xe-LPG GPU architecture, so we only use it where it offers a more direct component-level comparison. Compute tile Panther Lake compute-tile floorplans remain sparse even months after launch. Intel 18A’s backside metal and dielectric stack must be removed without damaging the underlying structures before a clean transistor-level floorplan can be imaged. Most published die shots hide or heavily process the background, but we are quite proud of the die shot we achieved and are excited to show the work we have done. We measured the areas of the key components on the compute tile and compared them with their Lunar Lake predecessors on TSMC N3B. These help us to capture changes in block area and compare the two chips across process nodes and designs. Our total tile areas exclude the scribe-line area. The compute-plus-GPU subtotal below uses the PTL-U compute tile and GT1 GPU; it excludes the I/O tile and passive base. Individual block areas use the boundaries marked on the floorplans The compute-plus-GPU row is recomputed from the displayed PTL-U and GT1 areas. Component rows use their stated per-region counts and are not an additive partition of the whole tile. The P-core area remains almost unchanged between Lunar Lake and Panther Lake, despite L2 capacity increasing from 2.5 MiB to 3 MiB. Arrow Lake uses the same Lion Cove core as Lunar Lake but also has a 3 MiB L2. Cougar Cove fits 20% more L2 into the same P-core area. The larger private cache keeps more of each core’s working set close to its execution units, reducing access to shared L3 and DRAM. Extra capacity adds storage leakage and lookup energy, so designers balance it against avoided lower-level accesses. The shared P-core L3 cache also shrank by 14.8%. [2] Cougar Cove combines a similar footprint with Intel’s reported power-efficiency improvements. RibbonFET’s tighter channel control reduces leakage, while PowerVia reduces supply droop and allows tighter voltage guardbands. [1] Darkmont’s four-core LP E-core cluster is 5.0% smaller than Skymont’s on Lunar Lake, with most of the reduction in its L2 regions. The 1 MiB region shrank by 8.4% and the 1.5 MiB region by 14.9%. The tag arrays also use one fewer visible row. Tags identify which memory addresses the data array holds, so rearranging them changes the cache’s layout and wiring without requiring less data capacity. [2] The LP E-cores share one L2. This pools capacity and avoids duplicating all the cache machinery, but the four cores contend for its banks and bandwidth. Their separate cluster also keeps light work away from the performance cluster and its L3, allowing that larger domain to sleep. [1], [2] Cache area includes more than the storage cells. Tags identify each line, decoders select rows, sense amplifiers read the small bitline signal, and wires connect to the banks. Splitting an array into smaller sections shortens wordlines and bitlines, improving access speed, but duplicates peripheral circuits. Panther Lake’s smaller cache regions therefore reflect the complete memory implementation, including how much of each region is devoted to storage. [34] Unlike Meteor Lake and Arrow Lake, Panther Lake has no separate SoC tile. The NPU, LP E-cores, memory controllers, PHYs, media and display engines now share the compute tile. This removes an active die and keeps CPU memory traffic on one die. The cost is moving PHY and I/O-related circuitry onto 18A: drivers, receivers and analog circuits must still meet external voltage, loading and signal-integrity requirements, so their area does not shrink like dense digital logic. [1], [2] The biggest shrink comes from the NPU, which occupies 36.9% less area. NPU 5 consolidates the same total INT8 MAC count into half as many neural compute engines. Each of the three NCEs has a larger MAC array to make the complete NCE envelope 22.6% larger than an NPU 4 engine. Consolidation also halves the number of scratchpads and SHAVE DSPs, from 12 to 6. The MAC array handles matrix multiplication and convolution, while SHAVE executes vector and custom operations that fit the array poorly. [1], [2], [35] The paired floorplans identify each NCE envelope and its scratchpad, MAC, and SHAVE regions. Each measured MAC polygon is counted once per NCE in the area accounting below. The scratchpads store weights, activations, and intermediate results near the MAC arrays, allowing repeated use without fetching them again from DRAM. Halving their number delivers the largest measured area saving but leaves less local storage for the same total MAC count. Layers that no longer fit locally require smaller working tiles or more transfers of intermediate data. The benefit depends on keeping the enlarged arrays busy while managing that tighter storage budget. [36] NPU 5 also adds native FP8. Using half the operand width of FP16 reduces storage and transfer demand, helping workloads fit the smaller local memory budget. Lower precision and format-dependent range make scaling and model validation part of deployment. Hardware activation functions further reduce work that would otherwise occupy the programmable DSPs. [1], [2] Microsoft requires an NPU to deliver at least 40 TOPS for Copilot+ PCs. Both Lunar Lake and Panther Lake meet this threshold, but Panther Lake uses significantly less silicon. GPU tiles Panther Lake is Intel’s first product with Xe3, its latest GPU architecture. It offers two different GPU tiles: a smaller GT1 tile with 4 Xe3 cores on Intel 3 and a larger GT2 tile with 12 Xe3 cores on TSMC N3E. Panther Lake allows us to compare the same GPU architecture across both Intel 3 and TSMC N3E. Wildcat Lake adds a third Xe3 implementation on Intel 18A. A future newsletter will detail Xe3 and its implementation differences across all three process nodes. GT2 scales Xe3 to a different physical layout, with render slices arranged vertically instead of GT1’s horizontal arrangement. Slice placement sets the distances to shared cache banks and the D2D interface. Those wires consume area and add delay, so scaling the number of Xe cores also requires a new balance of cache placement, routing and timing. [1] What’s immediately obvious is that the GT2 tile on TSMC N3E has much smaller Xe cores than GT1. These block areas include logic, caches, and routing. An Xe core on the GT1 tile is ~69% larger than one on Lunar Lake, and ~55% larger than one on GT2. Intel 3 therefore uses substantially more area per Xe core. The block-area gap exceeds the measured logic and SRAM density gaps, bringing routing, timing targets, cell mix, and floorplan allocation into the comparison. The measured vector/matrix engine region is almost unchanged between Lunar Lake and Panther Lake’s GT2 tile. Xe3 retains eight 512-bit vector engines and eight 2048-bit XMX engines per core. Its gains also come from feeding those engines more effectively: more resident threads hide stalls, and variable register allocation lets shaders trade registers per thread against the number of threads kept active. [1] The shared L1/SLM capacity increased by 33% from 192 KiB to 256 KiB, while its area increased only 5%, raising effective density by 27%. L1 retains reused cache lines, while software-managed SLM lets a thread group share data locally. Both reduce traffic to more distant memory. Allocating more SLM per group can also limit how many groups reside on a core at once. [1], [37] The GT1 tile carries 4 MiB of L2 against 16 MiB on the GT2 tile. GT1 divides its L2 cache into four 1 MiB banks, while GT2 uses eight 2 MiB banks. Each bank contains 128 macros, but each N3E macro stores 16 KiB, twice the Intel 3 macro’s 8 KiB capacity. The N3E macro is only 54% larger while holding twice as many bits, giving it 30% higher density: ~23.7 Mbit/mm² versus 18.3 Mbit/mm². Including bank-level circuitry, the gap widens to ~16.9 Mbit/mm² on GT2 versus ~10.4 Mbit/mm² on GT1. GT2 gains density with its macros storing more bits per unit area, and those macros occupy more of each cache bank. Larger macros spread decoder and sense-amplifier overhead across more storage, while a more compact bank layout reduces the share spent on control and routing. The compromise is longer wordlines and bitlines that carry more capacitance. [34] I/O tile Panther Lake uses two I/O tile variants, both fabricated on TSMC N6. The smaller one provides 4 PCIe 5.0 and 8 PCIe 4.0 lanes and serves lower-tier systems as well as those without a discrete GPU, while the larger one adds 8 PCIe 5.0 lanes, bringing the total to 20 lanes, for discrete-GPU connectivity. Panther Lake SKUs with the larger 10- or 12-Xe GPUs use the smaller I/O tile. [38] The smaller I/O tile adds a PCIe 4.0 block and a Thunderbolt block to Lunar Lake’s I/O layout, providing four additional PCIe 4.0 lanes and another Thunderbolt 4 port. Its repeated N6 blocks retain nearly identical areas and layouts. Reusing these proven PHYs and controllers avoids porting and requalifying external interfaces on 18A, where faster digital logic offers less benefit to circuits constrained by the off-chip link. [38] SemiAnalysis’s teardown lab (STEEL) dives deep into the world’s advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. We’re hiring technical experts from system to transistor and everywhere in between. Check out our Careers page. Panther Lake offers scalability and modularity through its disaggregated packaging that partition compute, GPU, and I/O silicon into separate tiles allowing for a suite of tile configurations. This partitioning makes the package part of Intel’s node economics as it determines how much leading-edge wafer area each product consumes, which functions can remain on other processes, and how much configuration freedom Intel can offer from a shared set of tiles. Furthermore, fabricating the compute and GPU tiles separately confines the new 18A process to the compute tile and allows graphics and I/O to use other, more established, and more cost-effective processes. For Panther Lake, the GPU and I/O tiles are assembled alongside the compute tile on a passive silicon base using Foveros-S. Intel’s current technology brief lists a nominal 36 µm pitch for Foveros-S. Through-silicon vias (TSVs) in the base connect the fine wiring above to the larger package connections below. The functional tiles sit side by side on that passive base in a 2.5D configuration. [39] Our cross-section through the compute and GPU tiles shows the package’s wiring hierarchy. Microbumps connect each active tile to the passive silicon base; its fine redistribution layer (RDL) carries the short, dense tile-to-tile links. TSVs carry connections through the base to the package substrate, which fans them out to the much coarser motherboard solder joints. The base supplies interconnect, while computation remains in the active tiles above it. [39] At the compute-tile edge, the higher-magnification inset shows a local microbump spacing of approximately 25.24 µm and a feature width of 12.33 µm. These local spacings are finer than Intel’s nominal Foveros-S value. The X-ray fields further confirm tighter neighboring bumps, consistent across every die-to-die area found on each tile. Additional X-ray analysis is offered after the paywall. Putting the memory controller beside the CPU removes the D2D transfer that CPU memory requests required in Meteor Lake and Arrow Lake. This avoids the extra transmitter, receiver, and link traversal, saving interface energy and latency. Panther Lake’s separate GPU still crosses a D2D link to reach DRAM, so its larger local caches also help contain package traffic. [1], [40] Smaller dies are less likely to contain a random fatal defect, and screening them before assembly prevents one bad tile from consuming a complete package of good silicon. Reuse also spreads design and qualification work across more products. Against those gains, Intel pays for the passive base, D2D circuits, extra bonding and test steps, and losses during assembly. Cost per working product across the portfolio captures the combined effect of wafer yield, reuse, test, and assembly. [29] Wildcat Lake packaging Intel launched Core Series 3, formerly Wildcat Lake, on 16 April 2026 for value mobile and edge systems. Wildcat Lake keeps 18A but removes the passive base and combines more functions on one die to simplify the package. The two products therefore reveal two distinct ways to commercialize the same leading-edge process. [41] Wildcat Lake’s 18A die combines up to two Cougar Cove P-cores, four Darkmont LP E-cores, two Xe3 cores and a smaller NPU. A separate platform-controller die supplies I/O, connected through UCIe, Intel’s first processor implementation of the standard. Consolidating graphics remove a tile boundary and the passive base, reducing assembly complexity for a modest-bandwidth value product. It also ties CPU and graphics scaling to the same die, giving up Panther Lake’s ability to swap in a much larger GPU. [42], [43] In July 2021, Intel CEO Pat Gelsinger set out an ambitious process roadmap aimed at regaining performance leadership by 2025, later described as five nodes in four years. Five years and one CEO later, Intel’s comeback story is not as unambiguously positive as Pat may have hoped. [44], [45] Intel once set the pace for process technology, bringing high-k metal gate technology and FinFETs into volume production years ahead of the rest of the industry. Its 22 nm FinFET process reached consumers with Ivy Bridge in 2012. [46] Intel’s integrated device manufacturing (IDM) model allowed its architects and process engineers to co-optimize products and processes. Starting with Sandy Bridge, Intel dominated x86, while AMD struggled with Bulldozer. That lead faltered at 14 nm and broke at 10 nm. Intel targeted a massive 2.7× density increase, but the node arrived years late and required several revisions before it could support Intel’s full lineup. This delay forced Intel to stretch 14 nm across six generations, while TSMC moved ahead in process technology and AMD recovered in x86. By 2019, Intel was still shipping 14 nm across most of its product stack, with its 10 nm client ramp focused on Ice Lake mobile processors. Meanwhile, TSMC was shipping N7 and N7+, and AMD’s Zen 2 compute chiplets used N7 to raise core counts and improve efficiency. Intel’s process failures were central to its decline, but unsound business decisions furthered their downward slide. Product delays compounded product mistakes, pushing client, server, and FPGA roadmaps off schedule. Several attempts to enter AI (Nervana and Gaudi) and networking (Tofino) also failed to establish lasting businesses. Intel’s recovery has focused on consumer CPUs and advanced packaging. Tiger Lake, Alder Lake, Lunar Lake and now Panther Lake have restored Intel’s consumer roadmap. On the process side, Intel 4 shipped with Meteor Lake, Intel 3 with Granite Rapids and Sierra Forest, and Intel 18A with Panther Lake. Intel has also made advanced packaging part of its foundry offering. However, Intel is still playing catch-up in servers. Several Xeon generations arrived years late and trailed contemporary AMD and Arm server CPUs in performance, efficiency, and core count. The process roadmap is back, but Intel does not hold the same process-technology leadership position it held prior to 10 nm. The introduction of gate-all-around nanosheets and backside power delivery are two of the biggest changes to transistor integration in a decade. Intel took on both changes at once: 18A paired its first RibbonFET with PowerVia in Panther Lake. Panther Lake is a substantial manufacturing milestone. Our cross-sections show how RibbonFET and PowerVia reshape local contacts and wiring, while the floorplans show where architectural consolidation and process choices save area. A sustained competitive lead depends on product performance, cost, yield, and the next implementation. The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page.. [1] Intel, “Intel Tech Tour 2025 Panther Lake recap,” Doc. 866361, 2025. Accessed: Sep. 14, 2026. [Online]. Available: https://cdrdv2-public.intel.com/866361/ITT_2025_Panther_Lake_Recap1.pdf [2] Intel, “Core Ultra processors Series 3 datasheet, volume 1,” Doc. 872188-001, Jan. 2026. Accessed: Sep. 14, 2026. [Online]. Available: https://cdrdv2-public.intel.com/872188/872188-001.pdf [3] N. Horiguchi and E. Beyne, “Backside power delivery: How to power chips from the backside,” imec Reading Room, Nov. 25, 2022. Accessed: Sep. 14, 2026. [Online]. Available: https://www.imec-int.com/en/articles/how-power-chips-backside [4] W. Hafez et al., “Intel PowerVia technology: Backside power delivery for high density and high-performance computing,” in Proc. IEEE Symp. VLSI Technol. Circuits, Kyoto, Japan, Jun. 2023, pp. 1–2, doi: 10.23919/vlsitechnologyandcir57934.2023.10185208. [5] K. Fischer et al., “Intel 18A platform technology featuring RibbonFET (GAA) and PowerVia for advanced high-performance computing,” in Proc. Symp. VLSI Technol. Circuits, Kyoto, Japan, Jun. 2025, pp. 1–3, doi: 10.23919/vlsitechnologyandcir65189.2025.11075006. [6] K.-F. Cheng, C.-L. Teng, H.-Y. Huang, and H.-C. Chen, “Metal oxide composite as etch stop layer,” U.S. Patent 12 176 247 B2, Dec. 24, 2024. Accessed: Sep. 14, 2026. [Online]. Available: https://patents.google.com/patent/US12176247B2/en [7] S. W. King, “Dielectric barrier, etch stop, and metal capping materials for state of the art and beyond metal interconnects,” ECS J. Solid State Sci. Technol., vol. 4, no. 1, pp. N3029–N3047, 2015, doi: 10.1149/2.0051501jss. [8] A. V. Mule’, D. J. Towner, D. Seghete, C. R. Ryder, and A. A. Gonzalez, “Multi-layer etch stop layers for advanced integrated circuit structure fabrication,” U.S. Patent Appl. 20220102343 A1, Mar. 31, 2022. Accessed: Sep. 14, 2026. [Online]. Available: https://patents.google.com/patent/US20220102343A1/en [9] C.-C. Wang and J. H. Wang, “Interconnect structure with dielectric cap layer and etch stop layer stack,” U.S. Patent Appl. 20230253247 A1, Aug. 10, 2023. Accessed: Sep. 14, 2026. [Online]. Available: https://patents.google.com/patent/US20230253247A1/en [10] Y. J. Wu, K.-F. Cheng, C.-C. Lee, H.-K. Chang, and H.-Y. Huang, “Etch stop layer for interconnect structures,” U.S. Patent Appl. 20240332070 A1, Oct. 3, 2024. Accessed: Sep. 14, 2026. [Online]. Available: https://patents.google.com/patent/US20240332070A1/en [11] M. G. Rainville, N. Shankar, K. S. Reddy, and D. M. Hausmann, “Deposition of aluminum oxide etch stop layers,” U.S. Patent Appl. 20180197770 A1, Jul. 12, 2018. Accessed: Sep. 14, 2026. [Online]. Available: https://patents.justia.com/patent/20180197770 [12] J. S. Leib et al., “Conductive lines having molybdenum liner and tungsten fill for advanced integrated circuit structure fabrication,” U.S. Patent Appl. 20240429126 A1, Dec. 26, 2024. Accessed: Sep. 14, 2026. [Online]. Available: https://patents.justia.com/patent/20240429126 [13] M. Naik, “Cobalt enables power and performance scaling at single-digit logic nodes,” Applied Materials, Dec. 17, 2018. Accessed: Sep. 14, 2026. [Online]. Available: https://www.appliedmaterials.com/us/en/blog/blog-posts/cobalt-enables-power-and-performance-scaling-at-single-digit-logic-nodes.html [14] Lam Research, “Breaking through AI’s invisible barrier with molybdenum,” Lam Research Newsroom, May 6, 2025. Accessed: Sep. 14, 2026. [Online]. Available: https://newsroom.lamresearch.com/molybdenum-metallization-ai-revolution [15] P. Yashar, G. Malyavanatham, and H. Vijwani, “Integrated circuit interconnect structures with niobium barrier materials,” U.S. Patent Appl. 20240112951 A1, Apr. 4, 2024. Accessed: Sep. 14, 2026. [Online]. Available: https://patents.google.com/patent/US20240112951A1/en [16] Applied Materials, “Applied Materials unveils chip wiring innovations for more energy-efficient computing,” Applied Materials Investor Relations, Jul. 8, 2024. Accessed: Sep. 14, 2026. [Online]. Available: https://ir.appliedmaterials.com/news-releases/news-release-details/applied-materials-unveils-chip-wiring-innovations-more-energy [17] Samsung, “Samsung showcases AI-era vision and latest foundry technologies at SFF 2024,” Samsung Semiconductor, Jun. 13, 2024. Accessed: Sep. 14, 2026. [Online]. Available: https://semiconductor.samsung.com/news-events/news/samsung-showcases-ai-era-vision-and-latest-foundry-technologies-at-sff-2024/ [18] C. W. Yeung et al., “Channel geometry impact and narrow sheet effect of stacked nanosheet,” in Proc. IEEE Int. Electron Devices Meeting (IEDM), Dec. 2018, pp. 28.6.1–28.6.4, doi: 10.1109/iedm.2018.8614608. [19] S. Mochizuki et al., “Evaluation of (110) versus (001) channel orientation for improved nFET/pFET device performance trade-off in gate-all-around nanosheet technology,” in Proc. Int. Electron Devices Meeting (IEDM), Dec. 2023, pp. 1–4, doi: 10.1109/iedm45741.2023.10413854. [20] D. G. Ouellette et al., “Fabrication of gate-all-around integrated circuit structures having molybdenum nitride metal gates and gate dielectrics with a dipole layer,” U.S. Patent 12 051 698 B2, Jul. 30, 2024. Accessed: Sep. 14, 2026. [Online]. Available: https://patents.google.com/patent/US12051698B2/en [21] imec, “Advancing the CFET-based device roadmap with novel integration modules and standard-cell architectures,” imec, 2026. Accessed: Sep. 14, 2026. [Online]. Available: https://www.imec-int.com/en/articles/advancing-cfet-based-device-roadmap-novel-integration-modules-and-standard-cell [22] A. Reznicek, X. Miao, C. Lee, and J. Zhang, “Wrap around contact for nanosheet source drain epitaxy,” U.S. Patent 11 302 813 B2, Apr. 12, 2022. Accessed: Sep. 14, 2026. [Online]. Available: https://patents.google.com/patent/US11302813B2/en [23] J. A. Kittl, J. G. Hong, D. R. Palle, and M. S. Rodder, “Methods for varied strain on nano-scale field effect transistor devices,” U.S. Patent 9 978 833 B2, May 22, 2018. Accessed: Sep. 14, 2026. [Online]. Available: https://patents.google.com/patent/US9978833B2/en [24] S. Gandikota et al., “Method of reducing metal gate resistance for next generation NMOS device application,” Int. Patent Appl. WO 2024/137272 A1, Jun. 27, 2024. Accessed: Sep. 14, 2026. [Online]. Available: https://patents.google.com/patent/WO2024137272A1/en [25] J. Zhang et al., “Full bottom dielectric isolation to enable stacked nanosheet transistor for low power and high performance applications,” in Proc. IEEE Int. Electron Devices Meeting (IEDM), Dec. 2019, pp. 11.6.1–11.6.4, doi: 10.1109/iedm19573.2019.8993490. [26] C. Yoo, J. Chang, Y. Seon, H. Kim, and J. Jeon, “Analysis of self-heating effects in multi-nanosheet FET considering bottom isolation and package options,” IEEE Trans. Electron Devices, vol. 69, no. 3, pp. 1524–1531, Mar. 2022, doi: 10.1109/ted.2022.3141327. [27] S. S. Pradhan, D. B. Bergstrom, J.-S. Chun, and J. Chiu, “Tungsten gates for non-planar transistors,” European Patent Appl. EP 3 506 367 A1, Jul. 3, 2019. Accessed: Sep. 14, 2026. [Online]. Available: https://patents.google.com/patent/EP3506367A1/en [28] L. Schloss and X. Ba, “Tungsten films having low fluorine content,” U.S. Patent 9 754 824 B2, Sep. 5, 2017. Accessed: Sep. 14, 2026. [Online]. Available: https://patents.google.com/patent/US9754824B2/en [29] Intel Foundry, “Accelerating AI and HPC with advanced process and packaging technologies,” Doc. 367370-001US, Jun. 2026. Accessed: Sep. 14, 2026. [Online]. Available: https://www.intel.com/content/dam/www/central-libraries/us/en/documents/2025-11/intel-foundry-hpc-ai-brief.pdf [30] M. Lofrano, X. Chang, H. Oprins, and Z. Tokei, “Mitigating the thermal bottleneck in advanced interconnects,” imec, Sep. 28, 2023. Accessed: Sep. 14, 2026. [Online]. Available: https://www.imec-int.com/en/articles/mitigating-thermal-bottleneck-advanced-interconnects [31] S. Bair, “Intel at ISSCC 2025: Navid Shahriari invited talk, eight papers, forums, panelist & product details,” Intel Community, Feb. 19, 2025. Accessed: Sep. 14, 2026. [Online]. Available: https://community.intel.com/t5/Blogs/Tech-Innovation/Edge-5G/Intel-at-ISSCC-2025-Navid-Shahriari-Invited-Talk-Eight-Papers/post/1667592 [32] D. Chandra, E. Potladhurthi, D. R. S. Reddy, and K. S. Rengarajan, “Tunable negative bitline write assist and boost attenuation circuit,” U.S. Patent Appl. 20160203857 A1, Jul. 14, 2016. Accessed: Sep. 14, 2026. [Online]. Available: https://patents.google.com/patent/US20160203857A1/en [33] Synopsys, “Advantages of firmware-based training in high-speed DDR IP,” Synopsys IP Technical Bulletin. Accessed: Sep. 14, 2026. [Online]. Available: https://www.synopsys.com/articles/firmware-based-training-ddr-ip.html [34] N. Muralimanohar, R. Balasubramonian, and N. P. Jouppi, “CACTI 6.0: A tool to understand large caches,” Hewlett-Packard Laboratories, 2009. Accessed: Sep. 14, 2026. [Online]. Available: https://users.cs.utah.edu/~rajeev/cacti6/cacti6-tr.pdf [35] Intel, “Intel Tech Tour 2024 Lunar Lake AI hardware accelerators,” Doc. 824436, 2024. Accessed: Sep. 14, 2026. [Online]. Available: https://cdrdv2-public.intel.com/824436/2024_Intel_Tech%20Tour%20TW_Lunar%20Lake%20AI%20Hardware%20Accelerators.pdf [36] Y.-H. Chen, J. Emer, and V. Sze, “Eyeriss: A spatial architecture for energy-efficient dataflow for convolutional neural networks,” in Proc. 43rd ACM/IEEE Annu. Int. Symp. Comput. Archit. (ISCA), Jun. 2016, pp. 367–379, doi: 10.1109/isca.2016.40. [37] Intel, “Introduction to the Xe-HPG architecture,” Doc. 758306, Nov. 4, 2022. Accessed: Sep. 14, 2026. [Online]. Available: https://www.intel.com/content/www/us/en/developer/articles/technical/introduction-to-the-xe-hpg-architecture.html [38] Intel, “Core Ultra processors Series 3 for the edge,” Doc. 855291. Accessed: Sep. 14, 2026. [Online]. Available: https://cdrdv2-public.intel.com/855291/Intel%C2%AE%20Core%E2%84%A2%20Ultra%20Processors%20Series%203%20for%20Edge%20Overview_2.pdf [39] Intel Foundry, “Foveros technology brief,” Doc. 366411-001US, Feb. 2026. Accessed: Sep. 14, 2026. [Online]. Available: https://www.intel.com/content/dam/www/central-libraries/us/en/documents/2025-07/foveros-25d-product-brief.pdf [40] D. Das Sharma, “UCIe: Building an open chiplet ecosystem,” UCIe Consortium, 2022. Accessed: Sep. 14, 2026. [Online]. Available: https://www.uciexpress.org/_files/ugd/0c1418_c5970a68ab214ffc97fab16d11581449.pdf [41] Intel, “Intel launches Intel Core Series 3 processors,” Intel Newsroom, Apr. 16, 2026. Accessed: Sep. 14, 2026. [Online]. Available: https://www.intel.com/content/www/us/en/newsroom/news/client-computing/intel-launches-intel-core-series-3-processors-changing-the-game-for-everyday-computing.html [42] Intel, “Core Series 3 launch press deck,” Apr. 2026. Accessed: Sep. 14, 2026. [Online]. Available: https://download.intel.com/newsroom/2026/Intel-Core-Series-3/Intel-Core-Series-3-Launch-Press-Deck.pdf [43] Intel, “Intel outlines architectures for agentic AI at Hot Chips 2026,” Intel Newsroom, Aug. 24, 2026. Accessed: Sep. 14, 2026. [Online]. Available: https://www.intel.com/content/www/us/en/newsroom/news/client-computing/intel-outlines-architectures-for-agentic-ai-at-hot-chips-2026.html [44] Intel, “Intel accelerates process and packaging innovations,” Intel Investor Relations, Jul. 26, 2021. Accessed: Sep. 14, 2026. [Online]. Available: https://www.intc.com/filings-reports/all-sec-filings/content/0001193125-21-224438/d199788dex991.htm [45] Intel, “Intel reports third-quarter 2021 financial results,” Intel Investor Relations, Oct. 21, 2021. Accessed: Sep. 14, 2026. [Online]. Available: https://www.intc.com/news-events/press-releases/detail/1505/intel-reports-third-quarter-2021-financial-results [46] Intel, “3rd generation Intel Core processors bring exciting new experiences and fun to the PC,” Intel Investor Relations, Apr. 23, 2012. Accessed: Sep. 14, 2026. [Online]. Available: https://www.intc.com/news-events/press-releases/detail/577/3rd-generation-intel-core-processors-bring-exciting
Global health summit in Saranac Lake tackles the shifting threat of dengue fever
The Trudeau Institute hosted a summit to discuss ongoing evaluation of treatments for the battle against dengue fever.
Utah Jazz Could See Major Player Swings as Expectations Rise
As the franchise pivots from development to winning, shifting stakes will test locker room veterans and rising stars alike, forcing critical adjustments in performance and nightly availability.
How AI Is Driving Both Parties Back to Their Roots
The dot-com boom shifted political alignments. AI is shifting them back.
This year, with shifting political winds, Canada gets more of the spotlight on the UN's stage
UNITED NATIONS (AP) — For years, Canada was a trouper in the drama of international affairs. An adept and experienced contributor, it didn't often draw the spotlight when world leaders gathered at the U.N. each September.
‘I miss old Google’: readers tell us how they search the internet in the age of AI
A feature called AI Overviews has been a profound change, and the browsing habits of billions of people are shifting
Time of Use Rate for Small and Medium Businesses Now Available
We’re excited to announce that our Time of Use (TOU) rate option for customers with services on Small and Medium Business rates is now available! Just like the residential TOU rate, this optional rate encourages shifting electricity use away from peak hours, giving your business more ways to manage costs and support a cleaner, more […]
Phoenix Suns Star Dillon Brooks Receiving Due Recognition
Landing at #76 on ESPN’s top 100, the polarizing wing is silencing critics through defensive grit and culture-shifting leadership as Phoenix prepares for a high-stakes playoff push.
Behind closed doors, the politics of solar geoengineering are shifting
More politicians in the U.S. and around the globe are taking a look at sunlight-reflecting technologies, two experts said Friday.
Behind closed doors, the politics of solar geoengineering are shifting
More politicians in the U.S. and around the globe are taking a look at sunlight-reflecting technologies, two experts said.
Matthew Berry expanding beyond ‘Fantasy’ with new daily talk show on Roku Channel
Arguably the most well-known fantasy football personality, Berry is shifting from NBC Sports to hub Roku Channel's daily sports lineup.
This year, with shifting political winds, Canada gets more of the spotlight on the UN's stage
Canada has a new posture on the planet’s biggest diplomatic stage as world leaders convene at the U.N. General Assembly this week | WWL
This year, with shifting political winds, Canada gets more of the spotlight on the UN's stage
Canada has a new posture on the planet’s biggest diplomatic stage as world leaders convene at the U.N. General Assembly this week | WWJ Newsradio 950
This year, with shifting political winds, Canada gets more of the spotlight on the UN's stage
Canada has a new posture on the planet’s biggest diplomatic stage as world leaders convene at the U.N. General Assembly this week.
This year, with shifting political winds, Canada gets more of the spotlight on the UN's stage
Canada has a new posture on the planet’s biggest diplomatic stage as world leaders convene at the U.N. General Assembly this week.
Scientists Tracked The Earth's Center Of Mass Using Satellites, And It's Shifting Around Down There
Over the course of a year, the Earth's center of mass changed significantly.
Colorado flag football rankings: USA TODAY Sports Super 10, Week 5
With less than one month left of the flag football season, the Colorado rankings are still shifting.
Why Melinda French Gates is shifting her philanthropy on women’s health
The philanthropist is investing in care for women in their midlife.
Mike McCarthy pivots strategy as young players catch up
Following sloppy practices, Mike McCarthy is shifting focus toward lighter play volumes and creative design to keep young players progressing.
Georgia’s center of political gravity is shifting toward Atlanta. Why it matters.
Metro Atlanta is poised to wield more power over Georgia’s politics and policy regardless of who wins in November.
Raynaud Tabbed as Kings Breakout Candidate in 2026-27
Raynaud's dominant summer performances position him to seize a starting role amidst shifting trade rumors in Sacramento.
Billions at stake as Texas reshapes business contract program
Texas has dramatically overhauled its Historically Underutilized Business (HUB) program in the past year, shifting eligibility toward service-disabled veterans and leaving thousands of minority- an…
He championed vaccine mandates. Will that record help him unseat a party-shifting conservative?
In one of California’s newly created congressional districts, candidates diverge sharply on healthcare issues, but most voters agree healthcare costs too much.