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‘Wildwood’ review: LAIKA weaves its extraordinary animation magic into a dark fairy tale
Think twice about bringing kids to the "Coraline" creators' brutal and spectacular adventure. Adults? Must watch.
Chuba Hubbard scores twice in Week 4 win
Chuba Hubbard racked up 129 total yards and two touchdowns during the club's Week 4 victory over the Detroit Lions.
Celtic fans fear derby 'nightmare' after 'appalling' Euro defeat
Must focus on the weekend, Celtic can't lose three games in a week, twice to the Rangers! Alistair Johnston, Jota and Yang back will be soon, Celtic need to hang in there. A win against Rangers on Sunday and all is forgotten.
How well have past GOTY winners sold?
We’re less than two months away from 2026’s The Game Awards, and what a year it’s been for fantastic games, including Resident Evil Requiem, Forza Horizon 6, Slay the Spire II, the Blood of Dawnwalker, and Control Resonant – just to name a few. So as we approach the end of the year, we thought we’d look back on our estimates for the GOTY winners of the past four years. In terms of revenue, Elden Ring (2022 winner), Baldur’s Gate 3 (2023), Astro Bot (2024), and Expedition 33 (2025) have generated a combined $3.8B via 73M copies sold: Let’s have a look, then. Elden Ring has generated $2B in revenue Elden Ring is a phenomenon in every sense. It’s sold a whopping 36.4M copies across Steam (50%), PS5 (35%), and Xbox (15% across console and PC). Want more free estimates and insights in your inbox twice a week? Subscribe below! Subscribe Elden Ring also just passed an astronomical milestone: $2B in revenue. While PlayStation and Xbox account for half of Elden Ring’s copies sold across these three platforms, they account for 57.5% of revenue. This – as ever – is due to regional pricing and the higher relative share of PC gamers in lower-priced markets. For example, around 17.4% of Elden Ring’s Steam copies sold were in China, where the game costs about 26% less than the price in the States. There’s an … interesting narrative going around these days that console gamers are only interested in ball-and-gun games and have the patience for little else. Well, Elden Ring’s impressive sales prove that is simply not true, and across all platforms. What’s more, over 9.8M people have played Elden Ring for over 100 hours, with nearly 3.5M people getting all of the achievements and trophies. For reference, 10.9% of Elden Ring’s PlayStation players have the platinum trophy, while 10.5% of players on Steam and 3.9% of Xbox players unlocked all the achievements. Git gud, Xbox players! Of the 1.5M people who played Elden Ring on PlayStation last month, 4% also played Dark Souls 3 last month, 4% played Bloodborne, and 3% played Sekiro. There’s those Soulsborne diehards for you. By many accounts, including my own, Elden Ring is one of the best games of all time. It’s an evergreen seller that will continue to be a cash cow for Bandai and FromSoftware for years to come. Want more free estimates and insights in your inbox twice a week? Subscribe below! Subscribe Elden Ring has sold another 2M copies across Steam, PlayStation, and Xbox this year, generating almost $110M. This means it’s outperforming many of this year’s high-profile releases. Even Elden Ring’s standalone run-based PvE spinoff, 2025’s Nightreign, has sold 7.8M copies and generated $282M in revenue. Baldur’s Gate 3 is another billion-dollar-plus banger Another cross-platform phenomenon is Baldur’s Gate 3, which has sold 23.2M copies and generated over $1.2B in revenue. About 18.7M of these copies (80.6%) are via Steam, 2.9M via PS5 (12.7%), and 1.6M (6.8%) via Xbox. Around 1.3M folks on Steam bought BG3 before it hit 1.0. The PlayStation version launched about a month after the PC 1.0 release, while the Xbox version came four months later due to technical issues around developing local co-op on the Series S. Want more free estimates and insights in your inbox twice a week? Subscribe below! Subscribe Across platforms, Baldur’s Gate 3’s monthly active users have never dropped below 2M, including 2.2M MAUs last month (68.5% on Steam, 21.9% on PS5, and 9.6% on Xbox). And it still regularly brings in 280K to 400K players every day: About 1% of BG3’s Steam player base has played for over 500 hours! That’s a little under 200K people. Astro Bot is also an evergreen seller, albeit a more niche, family one Astro Bot, 2024’s winner, has now sold 4.7M copies and generated $291M in revenue. The budget, including marketing, is almost certainly under $100M, given the small Japan-based core team and three-year dev timeline. You can really see why the tides are changing toward less expensive hubs. Astro Bot is the only first-party winner on this list, but follows other first-party winners of The Last of Us Part II (2020’s winner), God of War (2018), and Breath of the Wild (2017). Around 46.6% of Astro Bot’s copies sold have been physical, which is far higher than the typical game. This makes sense for a couple of reasons: There’s a large family audience for this one, and physical boxes are an item to wrap when giving Astro as a gift. Astro has collector value for the PlayStation core (this is nostalgia-fueled platformer celebrating PlayStation’s history) Want more free estimates and insights in your inbox twice a week? Subscribe below! Subscribe Astro is another one of those games that continues selling over time, regularly selling more than 100K a month. It’s sold around 1M more copies this year ($60M in revenue) and is a popular title with families. We can see this using the Alinea platform’s MAU crossover tool: Astro Bot’s top #2, #3, and #4 games by crossover in any given month this year are Minecraft, Fortnite, and Roblox – without fail. The #1 title every month, though, is Astro’s Playroom, a pack-in with all PS5 consoles. For every month this year, between 20% and 30% of Astro Bot players also played Astro’s Playroom that month. So the free pack-in is a noice funnel for converting players to a full paid product. Expedition 33 sells 8.7M despite Game Pass cannibalisation Finally, we have last year’s winner – Expedition 33. The turn-based-RPG banger has generated $366M via 8.7M copies sold, with 58.8% on Steam, 35.7% on PS5, and 5.5% on Xbox. Xbox’s share of copies sold is this low due to Expedition 33 launching on Game Pass, where 4.3M people across console and PC accessed the game. A little under 700K Xbox players used their subscription to play Expedition 33 this year. That said, the game’s 1.5-year Game Pass deal ended last week on October 16, and we’re already beginning to see a positive trend on Expedition 33’s copies sold via Xbox (but the jury’s still out!). There’s understandably a lot of French pride behind this one, as France is the game’s #3 market on both Steam and PlayStation. Vive la France! One thing that stood out to me is that the GOTY winners aren’t $300M Hollywood productions made in the US. They’re mostly mid-budget studios outside the traditional AAA cost centres. Lots to think about there. Also, good games sell well; who’d have thunk it!? And there’s a whole load of them this year, with GTA 6 still to come, too. GTA just made the cutoff point for the VGAs this year. What a coincidence! Loading... Cool links and other stuff Our physical games newsletter from Tuesday was picked up by GameSpot, Eurogamer, TweakTown, and a bunch of others. We’re offering a free trial of our platform for games companies. Send us a message here, or reply right here on Substack/email, and we’ll set you up. Next week, we’ve got some exciting news regarding the future of our newsletter, so stay tuned! The last word Reply to this email – or reach out here – if you have any feedback for the newsletter – or want to request a game for us to cover. Want to see why these companies (and many others) are subscribed to Alinea? Get a free platform trial! [Alinea Analytics boasts the most accurate PC and console estimates in the business. Game makers use our platform to understand their audience, keep an eye on the competition, monitor sales trends, and spot new opportunities. We equip game studios and financial institutions with accurate data and the confidence to make smarter, data-driven decisions. Want to talk about all things games market data? We’d love to chat!]
The Packers’ defense delivered the answer Dallas needed to see
Green Bay intercepted Dak Prescott twice and held the Cowboys to 13 points in a 23-13 win. The performance came after Dallas held a players-only meeting and added a defensive consultant.
Scientists create world's first floating titanium
They say a drowning man is willing to grasp onto just about anything to stay afloat, but he would most likely think twice if you offered a titanium buoy. Yet, scientists have created a titanium structure that floats without compromising the metal’s strength.
Twice’s Jihyo officially leaves JYP Entertainment after 21 years
The 29-year-old singer announced on Wednesday (Oct 21) that she will be departing her longtime agency, JYP Entertainment, making her the latest Twice member to do so.
Intel Panther Lake Teardown, 18A, BSPD, GAAFET, SemiAnalysis STEEL
Panther Lake debuts the first commercial implementation of backside power delivery (BSPDN), introduces Intel’s first iteration of gate-all-around (GAA) transistors, and showcases their advanced packaging capabilities with its Foveros-S assembly. With Panther Lake, Intel’s manufacturing arc has shifted from nebulous roadmaps to shipped silicon, a significant milestone on their long road back to competitive semiconductor manufacturing. To evaluate the extent of Intel’s comeback, we tore down Panther Lake. The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. Our teardown traces 18A from its four-sheet RibbonFETs (Intel’s marketing name for GAAFETs) and gate stacks through contacts, frontside and backside wiring, and the bonded carrier. We explain how these material and integration choices improve gate control and reduce resistance, while adding capacitance, thermal resistance, and process complexity. Our measurements put Panther Lake’s 18A compute logic and TSMC N3E GPU logic at similar logic density. However, 18A does not lead TSMC N3P, N2 or Samsung SF2 in peak density. Panther Lake’s CPU cores are incremental updates, and the high-end GPU still uses TSMC N3E. Panther Lake assembles one compute tile, one GPU tile, and one I/O tile atop a passive base tile using Intel’s Foveros-S advanced packaging. Both compute tile variants use Intel 18A. The Xe3 GPU options are a 4-core GT1 tile on Intel 3 and a larger 12-core GT2 tile on TSMC N3E. Both I/O tile variants use TSMC N6. [1], [2] Our analysis centers on the PTL-U compute tile, both the 4-core and 12-core GPU tiles, as well as the 12-lane I/O tile. In conventional chips, power and signal are routed through the same frontside metal stack towards the device frontend. Power rails consume scarce routing resources near the transistors, while tall via stacks carry VDD and VSS from the coarse upper wires to local rails. Backside power delivery (BSPD) moves the main power network behind the transistor layer, to the backside, separating it from frontside signal routing. We covered BSPD and its impacts in 2024. [3], [4], [5] Intel’s BSPD implementation, branded as “PowerVia”, routes power through dedicated backside metals to nano-TSVs, which connect those rails to local source/drain (S/D) contacts. Implementing that separation requires Intel to build the interconnect stacks from both sides of the wafer. The frontside comprises the M0-M14 signal stack, while the backside comprises the BM0-BM5 power stack. M0 and BM0 are closest to the transistors. The nano-TSVs connect the two sides, but Intel patterns and etches each via from the front after forming the contacts. A narrow via runs from the side of the contact deep into the silicon substrate. Intel then completes the frontside signal metal stack, bonds the wafer to a carrier, flips it and removes the original substrate until the buried via tips are exposed. The backside metal stack is then deposited directly on the revealed vias. The nano-TSV and backside-via profiles taper in opposite directions because Intel forms them from opposite sides of the wafer. The transistor structures form the FEOL. Local contacts and nano-TSVs connect them to the wiring. M0 begins the frontside interconnect stack. The silicon carrier remains attached above the frontside interconnects. It supports the device wafer during substrate removal and backside processing and remains part of the finished chip’s thermal path. PowerVia removes the main power distribution from the congested frontside metals, routing supply through shorter and wider backside wires. Its lateral landing still occupies area in the standard cell, so it recovers less cell area than a direct backside contact. [3] Nano-TSVs beside the logic devices carry VDD or VSS from the backside power network, while signal connections continue upward through the frontside metals. Backside Interconnects Samsung SF2 data is included for comparison to Panther Lake’s within this article. SF2 is the incumbent GAA foundry node but lacks BSPD, serving as a useful reference to evaluate 18A. A full teardown of Samsung’s S26 products, processed on SF2, will be shared soon.Nanosheet-cut EDS comparison. The PowerVia supply path runs from the backside Cu rails through Mo-lined W nano-TSVs to the local transistor contacts. In this cross section, the tapered connection spans roughly 150 nm from the contact level to BM0. The Ta liner confines Cu and promotes adhesion to the surrounding stack; the AlOₓ etch stop controls the next dielectric etch above the rail. Dielectric beneath the ribbons electrically separates the devices from the backside wiring and removes the conducting silicon body below the channel. [6] AlOₓ serves as an etchstop (ES), enabling endpointing and protecting the underlying layers. Low-volatility aluminum fluoride reaction products resist the fluorinated plasma, allowing a thin AlOₓ film to protect the metal while the surrounding low-k dielectric is removed. [6], [7]. While the BM0 and layers above the M1 lines show double AlOx layers, Our SMIC N+3 teardown showed single AlOₓ layers. SMIC uses a simpler local AlOₓ substack, while the remaining cap and etch sequence provide the required landing protection. So why double layers? The closely spaced AlOₓ doublets provide two protected endpoints in the etch sequence. Intel documents an AlOₓ/SiN/AlOₓ stack that explains the benefit. The main dielectric plasma etch stops on the first AlOₓ film; a selective wet clear opens that film; a second plasma etch removes the intermediate SiN and stops on the second AlOₓ film. The final wet clear exposes the metal landing surface. SiN is the intermediate dielectric in Intel’s published example. [8] The second stop protects the metal through a cap breakthrough. Wide openings can etch faster than narrow ones, and etch depth varies across the wafer. Metal under an early-clearing opening would otherwise be exposed while other openings still need more etching. Staged protection widens the process window and reduces metal erosion, corrosion and void formation. [8] TSMC documents AlN/AlOₓ/SiOC/AlOₓ above Cu, with AlN blocking Cu diffusion, and a simpler AlN/SiOC/AlOₓ variant that omits one AlOx film. [9] Levels with different opening sizes, aspect ratios, pattern densities and cap materials need different etch margins. A double AlOx stop is useful where another protected endpoint justifies the added processing. The extra film adds formation, selective opening and cleaning steps, plus another set of interfaces to control adhesion, moisture, and stress. These blanket films are opened through the existing via pattern, so each film does not require another lithography mask. AlOₓ adds parasitic capacitance when it replaces lower-k dielectric; two thin AlOₓ films can nevertheless contain less AlOₓ than one thick film. Total thickness, placement, and theintermediate dielectric determine the electrical cost. Deposition chemistry also changes AlOx permittivity and residual hydroxyl content, which can oxidize the underlying metal. [7], [8], [10], [11] The backside stack separates into relatively fine BM0-BM2 wiring near the devices and coarser BM3-BM5 power distribution. The largest pitch increase occurs between BM2 and BM3. BM0’s pitch closely matches the logic-row height, fitting local power delivery to the cell rows. Higher levels aggregate current through larger conductors: routing density becomes less important than low resistance and current capacity as the network approaches the package. This hierarchy provides wide power wiring for the power delivery network without consuming scarce frontside signal-routing resources. [3] The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. Frontside Interconnects Intel 18A combines Mo-lined W contacts and nano-TSVs with a separate backside Cu power network. Samsung SF2 keeps power on the frontside, using Ti-based contact interfaces and Ta-based barriers and Co liners around Cu wiring. In 18A standard-cell rows, backside power rails supply the devices through nano-TSVs within the cells, freeing frontside routing resources. Samsung’s M0 accommodates both power and signal connections. From the device toward M0, the connection runs through a Ti-based S/D interface, W contact fill, a Mo-lined W via, and the Cu M0 wire. Mo supplies a conductive nucleation and adhesion layer for W, replacing the resistive TiN liner used in conventional W integration. This increases the effective conduction volume within the feature while retaining W fill and its established polishing, cleaning and etching processes. Intel’s Mo/W patent describes this integration tradeoff. The nano-TSV uses the same Mo-lined W construction in the backside supply path. [12] The move from TiN to Mo is an incremental change. While a full Co or Mo fill can also reduce the volume lost to liners in very small features, it requires new integration schemes that increase complexity and risk. Cu remains attractive for wider wires due to its low resistance. As wires and vias shrink, the diffusion barrier consumes an increasing fraction of their cross-section. [12], [12], [14] Intel uses Co/Ru liners at M0-M1, Co at M2-M4, and Nb at M5-M9. The lower-level liners help Cu adhere and reduce void formation during trench fills. Applied Materials’ Endura has new thermal control that facilitate wetting process, so the thin film continuity is good enough that good capillary pressure will drive Cu atoms to the via bottom without voiding. Intel’s choice to use Nb is particularly interesting. Intel’s Nb patent describes a conductive diffusion barrier intended to reduce the barrier’s contribution to resistance relative to conventional Ta-based barriers, particularly at via bottoms where all current crosses the barrier. The patent pairs Nb in coarser levels with the option of lower-cost PVD processing. [15], [16] The upper metal layers support thicker barriers formed through physical vapor deposition (PVD) despite its worse coverage and uniformity. Meanwhile, the lower metal layers require thinner barriers deposited through conformal atomic layer deposition (ALD). Co/Ru adds another material interface and requires controlled deposition and Cu fill. Changing liners and barriers by metal layer allows Intel to optimize interconnect resistance, process complexity, and reliability. [15, 16] RibbonFET, Intel’s name for its gate-all-around FETs (GAAFETs), replaces the FinFET’s vertical fins with four stacked horizontal silicon nanosheets, allowing the gate to surround the channel on every side. The path to GAAFET begins with the planar transistor. A planar MOSFET places the gate above the channel between its source and drain. Pairing an NMOS with a PMOS transistor creates a CMOS inverter, in which the NMOS pulls the output low for a high input, and the PMOS pulls it high for a low input. The gate must retain electrostatic control of the channel to ensure clean switching. As gate lengths shrank, the drain began to compete with the gate for that control, increasing off-state leakage. Electrostatic control was restored through an architectural evolution that raised the channel into a vertical fin and wrapping the gate around three sides. Called “FinFET”, this new architecture packed more effective channel width into a smaller footprint. Further scaling made it harder to maintain both drive current and leakage within smaller cells, and reintroduced the same problems planar MOSFETs faced. Nanosheet GAAFETs close the fourth side by replacing the vertical fin with a stack of horizontal nanosheets, each surrounded by the gate. The tighter electrostatic control suppresses leakage at shorter gate lengths while stacking adds effective channel width within the cell footprint. In a FinFET process, channel width changes in discrete steps as designers must add or remove whole fins. Nanosheet width can instead be adjusted continuously within the process’s design rules. Wider sheets increase drive current, while narrower sheets reduce capacitance at the cost of drive current. Intel 18A uses stacks of four nanosheets each and varies their widths across logic and SRAM. At the process level, adding more sheets to each stack increases effective channel width and drive current, but complicates fabrication. RibbonFET vs MBCFET Samsung began GAAFET production in 2022 with SF3E, following with SF3 and now SF2. Its ‘MBCFET’ provides a useful structural comparison with Intel’s first RibbonFET implementation. [17] STEEL is digging deeper into SF2, used in the Exynos 2600, and TSMC’s GAAFET N2, used in Apple’s A20 Pro, in upcoming newsletter articles. We’re throwing some teasers on X. Let’s compare Samsung SF2’s MBCFET with Intel 18A’s RibbonFET. Subscribe Even to the untrained eye, Intel’s extra nanosheet is obvious. Intel stacks four ribbons to Samsung’s three. Samsung’s sheets are much wider in these fields, so both sheet count and width matter to the available channel perimeter. Sheet width also changes which silicon surfaces carry current. On conventional (001) silicon, wide nanosheets emphasize the broad top and bottom surfaces, favoring electron transport; the larger sidewall contribution in a narrow sheet favors hole transport. Thinner sheets improve gate control but increase confinement and scattering. This makes width and thickness part of the NMOS/PMOS balance, alongside strain and threshold voltage. [18], [19] GAAFET designs like 18A use different work-function-metal (WFM) stacks for NMOS and PMOS. Around each ribbon, a thin SiOx interfacial layer separates the silicon channel from the HfOx high-k dielectric, with La providing dipole tuning and the WFM wrapping the dielectric. NMOS uses a TiAl-based stack, while PMOS uses TiN WFM. W fills the remaining gate trench, providing a lower-resistivity path where the work-function layers are no longer needed. In this field, the PMOS stacks leave room for W between ribbons, while the NMOS stacks occupy more of those gaps. A silicon-based dielectric marks the P/N boundary, allowing the PMOS and NMOS gates, sharing the same gate trench, to be processed sequentially. Fast logic paths, retention circuits, and SRAM need a family of threshold options. Changing threshold without substantially changing device dimensions, capacitance or fabrication complexity is valuable. FinFET processes typically use different work-function-metal stacks. In a four-ribbon GAA stack, the narrow sheet-to-sheet gap limits how much WFM can fit around each channel. La in the gate dielectric creates interfacial dipoles at the SiOx/HfOx boundary, shifting effective work function and tuning threshold voltage. This gives Intel another control alongside its NMOS and PMOS WFM stacks. Low-threshold devices improve critical-path drive; higher thresholds reduce leakage elsewhere. Dipole tuning is especially useful in GAA because it changes threshold without consuming the narrow intersheet gap with thicker WFM. Precise control of La incorporation, diffusion and interface quality has long been a challenge, limiting viability in high volume production but is now seen from every leading-edge foundry. Intel’s patent describes depositing a dipole-forming oxide above HfOx and annealing it toward the interfacial oxide before completing the work-function and fill metals. This separates threshold tuning from the space available for metal. Newer research addresses the thermal cost: imec’s 2026 dipole-middle research inserts the shifter between two HfOx depositions, shortening the diffusion path while protecting SiOx during patterning. [20], [21]Matched-cut EDS, Intel 18A (left) vs. Samsung SF2 (right). Intel retains raised source/drain epi beneath its contacts, while Samsung recesses W deep into the epi to form a V-shaped Ti-lined interface. The deeper contact increases metal-to-semiconductor area and shortens the current path from the lower sheets, reducing contact and spreading resistance. It also removes epi volume and brings the contact etch closer to the channel ends. Retaining more epi preserves the material available for strain transfer, especially from SiGe into PMOS. These geometries balance contact access against stress engineering and etch margin. [22], [23] Samsung stacks three sheets to Intel’s four ribbons, and both processes use sheet width to tune drive strength. In our Samsung cross-sections, widths range roughly from 19 to 30 nm in the NPU rows and 37 to 50 nm in the CU cell. The Samsung nanosheets taper, with the widest sheet at the bottom and the narrowest at the top. Both processes use HfOx gate dielectric and Ti-based work-function stacks, with Al in the NMOS stack. In the Samsung devices shown here, the dielectric and WFM occupy the intersheet gaps, leaving W above the top sheet. Intel’s PMOS stack leaves more room between ribbons, and W fills those gaps while the thicker NMOS stack leaves W mainly in the upper trench. Gate-stack EDS maps. The W between Intel’s PMOS ribbons provides a conductive path close to the lower gates. Where WFM fills the entire gap, the gate still surrounds the channel, but voltage reaches it through the more resistive work-function films. Thinner WFM and dipole tuning preserve room for low-resistivity fill; Mo and Ru are alternative fill metals being developed for further scaling. [24] A masked, sequential WFM flow explains the different gate heights and inter-nanosheet fill. The proposed sequence below shows how separate NMOS and PMOS work-function steps produce that geometry. Enabled by the BSPDN process, Intel replaces the dense-logic silicon subfin with dielectric, removing the parasitic conduction path below the ribbons and reducing substrate-related capacitance. A retained silicon body as in classical, non-SOI, planar and FinFET designs needs junction and punchthrough-stop engineering to suppress leakage. Dielectric isolation makes that leakage less sensitive to the subfin doping profile but adds removal and fill steps. It also weakens the direct thermal path through silicon, making the contacts, metal stacks and package more important for heat extraction. [24], [26] Fluorine is concentrated around selected Intel device structures in the maps. WF6 is a standard precursor for W nucleation and fill, while barrier films protect adjacent dielectrics from fluorine attack. Low-fluorine W processes reduce the residual-F burden. Chloride-based precursors avoid introducing F during W deposition, but require control of chlorine attack, nucleation and fill quality. The integration target is a continuous, low-resistance W path with a thin protective liner and minimal chemical damage to the surrounding stack. [20], [27], [28] The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. We measured cell height, gate pitch, metal geometry, and ribbon dimensions at the XTEM sites shown below. The tables group these dimensions by site and device polarity. Our “sheet cuts” cross the silicon channel and show the ribbons end-on. “gate cuts” run along the channel through successive gates. The 18A logic cell dimensions point to a five-track logic library while the N3E and Intel 3 cell dimensions evidence a seven-track logic library. The DDR-PHY uses wider M0 wires and much larger spacing than core logic. That trades routing density for lower wire resistance and weaker coupling between neighboring nets. The geometry suits the current delivery and coupling requirements of analog, clock, and I/O circuitry. PowerVia lets 18A combine a compact cell height with wider M0 geometry by moving the main power rails off the signal-routing tracks. That relaxes local wire scaling while preserving a small cell footprint. Cell height and gate pitch set the geometric density; pin access and routability determine how much of it a real block can use. [29] The biggest takeaway from our gate-pitch measurements is that Intel 18A compute logic and TSMC N3E GPU logic have similar density in the Bohr representative-cell model. The 18A example is 18.6% denser than the Intel 3 GPU example. Gate pitches are nearly identical across the three sites, so cell height drives most of the difference. The Bohr model combines a four-transistor NAND2 spanning three gate pitches and a 32-transistor scan flip-flop (SFF) spanning nineteen pitches, weighting their densities 60:40. The sensitivity column shows how independently changing cell height and gate pitch by ±1 nm changes the result. This compares representative cell geometries; whole-die density also depends on cell mix and placement. The 18A P-core gives M0 substantially more metal cross section than the N3E vector engine. Treating each profile as a trapezoid gives 2.63 times the area per line and 1.84 times the area after normalization by routing pitch. The larger section reduces the geometric contribution to line resistance and lowers current density for a given current. Taller and wider wires also add capacitance, so circuit delay depends on the balance of resistance and capacitance. The DDR-PHY has less metal area per routing width than the 18A core fields, while remaining above N3E. [30] Area = height × (top CD + bottom CD) / 2, including liners. Area/pitch normalizes by routing width. Taper is the symmetric sidewall angle from vertical, with the largest angle belonging to the DDR-PHY. Compute tile The measurements show how ribbon dimensions and gate-stack geometry vary across the compute tile and between NMOS and PMOS to balance channel drive, gate load and the space needed for the dielectric/WFM stack across logic, SRAM and the DDR-PHY. Width mainly changes available channel perimeter; thickness also changes electrostatic control and carrier confinement. Gate-stack thickness then determines the space left for low-resistivity fill P-core and LP E-core logic Both the P-core and LP E-core use multiple nanosheet widths. Widths are measured on high-magnification XTEMs while wider-field images demonstrate additional width choices within the LP E-core. Multiple widths are expected even within an LP E-core. Timing-critical paths, buffers and cells with different fanout need different drive strengths. The lower-magnification fields show this width diversity beyond the sites quantified in the table. L2 and L3 SRAM GAA gives SRAM designers another way to balance the pull-up (PU), pass-gate (PG), and pull-down (PD) transistors. FinFET bitcells set device strength through fin count while GAA adds nanosheet width as a sizing knob. In a 6T SRAM cell, a strong pull-down relative to the pass-gate limits read disturbance, while a strong pass-gate relative to the pull-up improves writability. During a write, the pass-gate and write driver pull the node storing “1” below the inverter trip point. During a read, the pull-down holds the node storing “0” low. Bias, threshold voltage, mismatch and assist circuitry set the remaining margin. FinFET high-current cells commonly use a PU:PG:PD fin-count pattern of 1:2:2, a device-sizing ratio rather than a current ratio. Ribbon width lets Intel balance SRAM strengths without adding whole fins. The L2 cell uses its narrowest ribbons for PU and widest for PD, improving writability and read stability respectively. Intel’s disclosed HCC operates without assist; its denser HDC uses negative-bitline write assist. Pulling the selected bitline briefly below ground increases pass-gate overdrive so it can overpower the pull-up at lower supply voltage. That buys density and low voltage writability at the cost of boosting circuitry, switching energy, and additional voltage stress that must be controlled. [31], [32] Four rectangular ribbons give the perimeter = 8 × (width + thickness), before corner rounding. PG/PU is 1.49 and PD/PG is 1.16. The L3 structures closely resemble L2 in layout and cell height. Fewer L3 nanosheet widths are tabulated because fewer high-magnification images were available. DDR PHY The DDR-PHY trades density for controlled analog behavior and reliable off-chip signaling. It contains drivers, receivers, delay circuits, and calibration logic that set drive strength, sampling time, and voltage margin. Repeated four-sheet devices with similar widths fit the use of regular transistor units for matching and programmable drive. Its wider local wiring provides room for current delivery and separation of sensitive signals, while consuming more area than a dense core-logic grid. The layout serves the memory channel’s electrical requirements as well as digital logic density. [33] The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page. Intel 3 GPU devices Vector engine logic Intel 3’s XVE logic uses two-fin PMOS and NMOS devices with power rails in M0. Its cell height and M0 pitch give a seven-track geometry, two tracks more than the 18A logic. One-fin groups also appear among the two-fin devices. Intel 3 L2 SRAM The Intel 3 L2 SRAM uses the familiar HCC sizing pattern: one PU fin, two PG fins, and two PD fins. N3E GPU devices Vector engine logic The N3E XVE field contains repeated two-fin devices with seven-track cell geometry. N3E remains a FinFET process, giving Panther Lake a direct FinFET-to-RibbonFET comparison. N3E L2 SRAM The N3E L2 SRAM uses the same PU:PG:PD fin-count pattern of 1:2:2. Panther Lake-U follows Lunar Lake’s floorplan quite closely. Both pair 4 P-cores with 4 LP E-cores and NPU, media and display engines in similar locations. Lunar Lake also uses Xe2, the direct predecessor to Panther Lake’s Xe3 GPU. This makes Lunar Lake the most direct basis for our comparisons. Arrow Lake differs in core count and uses the older Xe-LPG GPU architecture, so we only use it where it offers a more direct component-level comparison. Compute tile Panther Lake compute-tile floorplans remain sparse even months after launch. Intel 18A’s backside metal and dielectric stack must be removed without damaging the underlying structures before a clean transistor-level floorplan can be imaged. Most published die shots hide or heavily process the background, but we are quite proud of the die shot we achieved and are excited to show the work we have done. We measured the areas of the key components on the compute tile and compared them with their Lunar Lake predecessors on TSMC N3B. These help us to capture changes in block area and compare the two chips across process nodes and designs. Our total tile areas exclude the scribe-line area. The compute-plus-GPU subtotal below uses the PTL-U compute tile and GT1 GPU; it excludes the I/O tile and passive base. Individual block areas use the boundaries marked on the floorplans The compute-plus-GPU row is recomputed from the displayed PTL-U and GT1 areas. Component rows use their stated per-region counts and are not an additive partition of the whole tile. The P-core area remains almost unchanged between Lunar Lake and Panther Lake, despite L2 capacity increasing from 2.5 MiB to 3 MiB. Arrow Lake uses the same Lion Cove core as Lunar Lake but also has a 3 MiB L2. Cougar Cove fits 20% more L2 into the same P-core area. The larger private cache keeps more of each core’s working set close to its execution units, reducing access to shared L3 and DRAM. Extra capacity adds storage leakage and lookup energy, so designers balance it against avoided lower-level accesses. The shared P-core L3 cache also shrank by 14.8%. [2] Cougar Cove combines a similar footprint with Intel’s reported power-efficiency improvements. RibbonFET’s tighter channel control reduces leakage, while PowerVia reduces supply droop and allows tighter voltage guardbands. [1] Darkmont’s four-core LP E-core cluster is 5.0% smaller than Skymont’s on Lunar Lake, with most of the reduction in its L2 regions. The 1 MiB region shrank by 8.4% and the 1.5 MiB region by 14.9%. The tag arrays also use one fewer visible row. Tags identify which memory addresses the data array holds, so rearranging them changes the cache’s layout and wiring without requiring less data capacity. [2] The LP E-cores share one L2. This pools capacity and avoids duplicating all the cache machinery, but the four cores contend for its banks and bandwidth. Their separate cluster also keeps light work away from the performance cluster and its L3, allowing that larger domain to sleep. [1], [2] Cache area includes more than the storage cells. Tags identify each line, decoders select rows, sense amplifiers read the small bitline signal, and wires connect to the banks. Splitting an array into smaller sections shortens wordlines and bitlines, improving access speed, but duplicates peripheral circuits. Panther Lake’s smaller cache regions therefore reflect the complete memory implementation, including how much of each region is devoted to storage. [34] Unlike Meteor Lake and Arrow Lake, Panther Lake has no separate SoC tile. The NPU, LP E-cores, memory controllers, PHYs, media and display engines now share the compute tile. This removes an active die and keeps CPU memory traffic on one die. The cost is moving PHY and I/O-related circuitry onto 18A: drivers, receivers and analog circuits must still meet external voltage, loading and signal-integrity requirements, so their area does not shrink like dense digital logic. [1], [2] The biggest shrink comes from the NPU, which occupies 36.9% less area. NPU 5 consolidates the same total INT8 MAC count into half as many neural compute engines. Each of the three NCEs has a larger MAC array to make the complete NCE envelope 22.6% larger than an NPU 4 engine. Consolidation also halves the number of scratchpads and SHAVE DSPs, from 12 to 6. The MAC array handles matrix multiplication and convolution, while SHAVE executes vector and custom operations that fit the array poorly. [1], [2], [35] The paired floorplans identify each NCE envelope and its scratchpad, MAC, and SHAVE regions. Each measured MAC polygon is counted once per NCE in the area accounting below. The scratchpads store weights, activations, and intermediate results near the MAC arrays, allowing repeated use without fetching them again from DRAM. Halving their number delivers the largest measured area saving but leaves less local storage for the same total MAC count. Layers that no longer fit locally require smaller working tiles or more transfers of intermediate data. The benefit depends on keeping the enlarged arrays busy while managing that tighter storage budget. [36] NPU 5 also adds native FP8. Using half the operand width of FP16 reduces storage and transfer demand, helping workloads fit the smaller local memory budget. Lower precision and format-dependent range make scaling and model validation part of deployment. Hardware activation functions further reduce work that would otherwise occupy the programmable DSPs. [1], [2] Microsoft requires an NPU to deliver at least 40 TOPS for Copilot+ PCs. Both Lunar Lake and Panther Lake meet this threshold, but Panther Lake uses significantly less silicon. GPU tiles Panther Lake is Intel’s first product with Xe3, its latest GPU architecture. It offers two different GPU tiles: a smaller GT1 tile with 4 Xe3 cores on Intel 3 and a larger GT2 tile with 12 Xe3 cores on TSMC N3E. Panther Lake allows us to compare the same GPU architecture across both Intel 3 and TSMC N3E. Wildcat Lake adds a third Xe3 implementation on Intel 18A. A future newsletter will detail Xe3 and its implementation differences across all three process nodes. GT2 scales Xe3 to a different physical layout, with render slices arranged vertically instead of GT1’s horizontal arrangement. Slice placement sets the distances to shared cache banks and the D2D interface. Those wires consume area and add delay, so scaling the number of Xe cores also requires a new balance of cache placement, routing and timing. [1] What’s immediately obvious is that the GT2 tile on TSMC N3E has much smaller Xe cores than GT1. These block areas include logic, caches, and routing. An Xe core on the GT1 tile is ~69% larger than one on Lunar Lake, and ~55% larger than one on GT2. Intel 3 therefore uses substantially more area per Xe core. The block-area gap exceeds the measured logic and SRAM density gaps, bringing routing, timing targets, cell mix, and floorplan allocation into the comparison. The measured vector/matrix engine region is almost unchanged between Lunar Lake and Panther Lake’s GT2 tile. Xe3 retains eight 512-bit vector engines and eight 2048-bit XMX engines per core. Its gains also come from feeding those engines more effectively: more resident threads hide stalls, and variable register allocation lets shaders trade registers per thread against the number of threads kept active. [1] The shared L1/SLM capacity increased by 33% from 192 KiB to 256 KiB, while its area increased only 5%, raising effective density by 27%. L1 retains reused cache lines, while software-managed SLM lets a thread group share data locally. Both reduce traffic to more distant memory. Allocating more SLM per group can also limit how many groups reside on a core at once. [1], [37] The GT1 tile carries 4 MiB of L2 against 16 MiB on the GT2 tile. GT1 divides its L2 cache into four 1 MiB banks, while GT2 uses eight 2 MiB banks. Each bank contains 128 macros, but each N3E macro stores 16 KiB, twice the Intel 3 macro’s 8 KiB capacity. The N3E macro is only 54% larger while holding twice as many bits, giving it 30% higher density: ~23.7 Mbit/mm² versus 18.3 Mbit/mm². Including bank-level circuitry, the gap widens to ~16.9 Mbit/mm² on GT2 versus ~10.4 Mbit/mm² on GT1. GT2 gains density with its macros storing more bits per unit area, and those macros occupy more of each cache bank. Larger macros spread decoder and sense-amplifier overhead across more storage, while a more compact bank layout reduces the share spent on control and routing. The compromise is longer wordlines and bitlines that carry more capacitance. [34] I/O tile Panther Lake uses two I/O tile variants, both fabricated on TSMC N6. The smaller one provides 4 PCIe 5.0 and 8 PCIe 4.0 lanes and serves lower-tier systems as well as those without a discrete GPU, while the larger one adds 8 PCIe 5.0 lanes, bringing the total to 20 lanes, for discrete-GPU connectivity. Panther Lake SKUs with the larger 10- or 12-Xe GPUs use the smaller I/O tile. [38] The smaller I/O tile adds a PCIe 4.0 block and a Thunderbolt block to Lunar Lake’s I/O layout, providing four additional PCIe 4.0 lanes and another Thunderbolt 4 port. Its repeated N6 blocks retain nearly identical areas and layouts. Reusing these proven PHYs and controllers avoids porting and requalifying external interfaces on 18A, where faster digital logic offers less benefit to circuits constrained by the off-chip link. [38] SemiAnalysis’s teardown lab (STEEL) dives deep into the world’s advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. We’re hiring technical experts from system to transistor and everywhere in between. Check out our Careers page. Panther Lake offers scalability and modularity through its disaggregated packaging that partition compute, GPU, and I/O silicon into separate tiles allowing for a suite of tile configurations. This partitioning makes the package part of Intel’s node economics as it determines how much leading-edge wafer area each product consumes, which functions can remain on other processes, and how much configuration freedom Intel can offer from a shared set of tiles. Furthermore, fabricating the compute and GPU tiles separately confines the new 18A process to the compute tile and allows graphics and I/O to use other, more established, and more cost-effective processes. For Panther Lake, the GPU and I/O tiles are assembled alongside the compute tile on a passive silicon base using Foveros-S. Intel’s current technology brief lists a nominal 36 µm pitch for Foveros-S. Through-silicon vias (TSVs) in the base connect the fine wiring above to the larger package connections below. The functional tiles sit side by side on that passive base in a 2.5D configuration. [39] Our cross-section through the compute and GPU tiles shows the package’s wiring hierarchy. Microbumps connect each active tile to the passive silicon base; its fine redistribution layer (RDL) carries the short, dense tile-to-tile links. TSVs carry connections through the base to the package substrate, which fans them out to the much coarser motherboard solder joints. The base supplies interconnect, while computation remains in the active tiles above it. [39] At the compute-tile edge, the higher-magnification inset shows a local microbump spacing of approximately 25.24 µm and a feature width of 12.33 µm. These local spacings are finer than Intel’s nominal Foveros-S value. The X-ray fields further confirm tighter neighboring bumps, consistent across every die-to-die area found on each tile. Additional X-ray analysis is offered after the paywall. Putting the memory controller beside the CPU removes the D2D transfer that CPU memory requests required in Meteor Lake and Arrow Lake. This avoids the extra transmitter, receiver, and link traversal, saving interface energy and latency. Panther Lake’s separate GPU still crosses a D2D link to reach DRAM, so its larger local caches also help contain package traffic. [1], [40] Smaller dies are less likely to contain a random fatal defect, and screening them before assembly prevents one bad tile from consuming a complete package of good silicon. Reuse also spreads design and qualification work across more products. Against those gains, Intel pays for the passive base, D2D circuits, extra bonding and test steps, and losses during assembly. Cost per working product across the portfolio captures the combined effect of wafer yield, reuse, test, and assembly. [29] Wildcat Lake packaging Intel launched Core Series 3, formerly Wildcat Lake, on 16 April 2026 for value mobile and edge systems. Wildcat Lake keeps 18A but removes the passive base and combines more functions on one die to simplify the package. The two products therefore reveal two distinct ways to commercialize the same leading-edge process. [41] Wildcat Lake’s 18A die combines up to two Cougar Cove P-cores, four Darkmont LP E-cores, two Xe3 cores and a smaller NPU. A separate platform-controller die supplies I/O, connected through UCIe, Intel’s first processor implementation of the standard. Consolidating graphics remove a tile boundary and the passive base, reducing assembly complexity for a modest-bandwidth value product. It also ties CPU and graphics scaling to the same die, giving up Panther Lake’s ability to swap in a much larger GPU. [42], [43] In July 2021, Intel CEO Pat Gelsinger set out an ambitious process roadmap aimed at regaining performance leadership by 2025, later described as five nodes in four years. Five years and one CEO later, Intel’s comeback story is not as unambiguously positive as Pat may have hoped. [44], [45] Intel once set the pace for process technology, bringing high-k metal gate technology and FinFETs into volume production years ahead of the rest of the industry. Its 22 nm FinFET process reached consumers with Ivy Bridge in 2012. [46] Intel’s integrated device manufacturing (IDM) model allowed its architects and process engineers to co-optimize products and processes. Starting with Sandy Bridge, Intel dominated x86, while AMD struggled with Bulldozer. That lead faltered at 14 nm and broke at 10 nm. Intel targeted a massive 2.7× density increase, but the node arrived years late and required several revisions before it could support Intel’s full lineup. This delay forced Intel to stretch 14 nm across six generations, while TSMC moved ahead in process technology and AMD recovered in x86. By 2019, Intel was still shipping 14 nm across most of its product stack, with its 10 nm client ramp focused on Ice Lake mobile processors. Meanwhile, TSMC was shipping N7 and N7+, and AMD’s Zen 2 compute chiplets used N7 to raise core counts and improve efficiency. Intel’s process failures were central to its decline, but unsound business decisions furthered their downward slide. Product delays compounded product mistakes, pushing client, server, and FPGA roadmaps off schedule. Several attempts to enter AI (Nervana and Gaudi) and networking (Tofino) also failed to establish lasting businesses. Intel’s recovery has focused on consumer CPUs and advanced packaging. Tiger Lake, Alder Lake, Lunar Lake and now Panther Lake have restored Intel’s consumer roadmap. On the process side, Intel 4 shipped with Meteor Lake, Intel 3 with Granite Rapids and Sierra Forest, and Intel 18A with Panther Lake. Intel has also made advanced packaging part of its foundry offering. However, Intel is still playing catch-up in servers. Several Xeon generations arrived years late and trailed contemporary AMD and Arm server CPUs in performance, efficiency, and core count. The process roadmap is back, but Intel does not hold the same process-technology leadership position it held prior to 10 nm. The introduction of gate-all-around nanosheets and backside power delivery are two of the biggest changes to transistor integration in a decade. Intel took on both changes at once: 18A paired its first RibbonFET with PowerVia in Panther Lake. Panther Lake is a substantial manufacturing milestone. Our cross-sections show how RibbonFET and PowerVia reshape local contacts and wiring, while the floorplans show where architectural consolidation and process choices save area. A sustained competitive lead depends on product performance, cost, yield, and the next implementation. The SemiAnalysis STEEL teardown lab breaks down advanced datacenter and AI hardware. To learn more about our pipeline or to commission a teardown, contact sales@semianalysis.com. WE’RE HIRING: Architecture, floorplan, packaging, manufacturing, and labs experts. Opportunities from system to transistor and everywhere in between. Check out our Careers page.. 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Available: https://www.intel.com/content/www/us/en/newsroom/news/client-computing/intel-outlines-architectures-for-agentic-ai-at-hot-chips-2026.html [44] Intel, “Intel accelerates process and packaging innovations,” Intel Investor Relations, Jul. 26, 2021. Accessed: Sep. 14, 2026. [Online]. Available: https://www.intc.com/filings-reports/all-sec-filings/content/0001193125-21-224438/d199788dex991.htm [45] Intel, “Intel reports third-quarter 2021 financial results,” Intel Investor Relations, Oct. 21, 2021. Accessed: Sep. 14, 2026. [Online]. Available: https://www.intc.com/news-events/press-releases/detail/1505/intel-reports-third-quarter-2021-financial-results [46] Intel, “3rd generation Intel Core processors bring exciting new experiences and fun to the PC,” Intel Investor Relations, Apr. 23, 2012. Accessed: Sep. 14, 2026. [Online]. Available: https://www.intc.com/news-events/press-releases/detail/577/3rd-generation-intel-core-processors-bring-exciting
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The Alternative for Germany (AfD), classified as far-right by German authorities, made history by becoming the largest party in the state parliament, winning 43.8 per cent of the vote — twice its share in the previous election. The Christian Democratic Union (CDU), which had governed the state continuously for 24 years, won just 17.2 per cent, its worst result ever in Saxony-Anhalt. On the night the results were announced, the atmosphere at the CDU gathering was unusually calm. There was neither shock nor argument, as if the defeat had long been expected. Several veteran party members who had spent years working in the state government said: “Defeat is not a bad thing. It is time to make changes.” This state election has not only upended Saxony-Anhalt’s political landscape, but also laid bare the deep tensions between Germany’s traditional party structure and model of governance, on the one hand, and an increasingly polarised society on the other. Its repercussions are already being felt at the federal level, making Saxony-Anhalt a useful case study of the broader trend towards political polarisation and realignment in Europe. Governing Difficulties after Electoral Victory The most immediate consequence of the election is a historic setback for the mainstream party order that took shape in post-war Germany. In Saxony-Anhalt, the AfD has leapt from a peripheral party to the largest political force in the state. Its electoral base has expanded beyond the traditional category of “marginal protest voters” to take on the characteristics of a cross-class coalition. The party has not only consolidated its support in rural areas, but also attracted many middle-class voters and even members of the social elite with stable jobs, their own homes, and substantial incomes. It has thus evolved from a “protest party” into one with the potential to govern. Despite its commanding lead in the vote, however, the AfD faces an institutional obstacle to governing the state: the mainstream parties’ long-standing “firewall” against it. Neither of the two potential routes to forming a government appears likely to break the current political deadlock. The first would be a coalition of establishment parties, led by the CDU and bringing together the Social Democratic Party (SPD), the Greens, the Left Party (Die Linke) and the Sahra Wagenknecht Alliance (BSW) in a cross-camp government. In terms of parliamentary arithmetic, such a coalition could prevent the AfD from forming a government and preserve the outward stability of the traditional political order. Yet these parties are fundamentally divided over key issues including immigration, the energy transition, economic management, and cultural and education policy. Coalition negotiations would therefore be extremely difficult, and even if a government could be formed, it would most likely prove short-lived. More importantly, an alliance of establishment parties aimed at keeping the largest party out of government would play directly into the AfD’s narrative that “political elites are suppressing public opinion”. It could deepen perceptions of political unfairness, further strengthening the AfD’s political capital, and creating a dynamic in which “the more it is suppressed, the more people vote for it”. Ulrich Siegmund, the AfD’s candidate for state premier, has said that if efforts to form a government fail because other parties refuse to cooperate, the AfD will push for a fresh election, which he believes could deliver the party an absolute majority of seats. This points to more intense political battles ahead. The second option would be a coalition between the AfD and the BSW. Together, the two parties would command a simple majority in parliament, making this, on paper, the quickest route to forming a government. The BSW is the only elected party that has not ruled out cooperation with the AfD, and the two parties share some common ground, including on policy towards Russia. There is therefore a degree of political basis for cooperation. Were such a coalition to materialise, Germany would see its first state government jointly formed by a party defined as far-right and one with a far-left background, creating what might be called a “bipolar anti-establishment alliance”. Such an outcome would fundamentally break with the ideological boundaries of post-war German party politics. It is worth noting that even if the AfD ultimately fails to enter the state government, its roughly 47 per cent share of parliamentary seats would give it a powerful blocking minority. Without its consent, major decisions requiring a two-thirds majority — including constitutional amendments, significant budgetary adjustments, and state-level institutional reforms — would be extremely difficult to pass. Therefore, whoever ultimately forms the government, the AfD will be an unavoidable force in Saxony-Anhalt politics, with a direct influence on the state’s legislative process. Systemic Failures in Germany’s Governance Model The Saxony-Anhalt election result reflects a systemic failure of Germany’s post-war mainstream-party model of governance to adapt to rapidly changing socioeconomic conditions. It stems from multiple, mutually reinforcing structural tensions and highlights the existing political system’s difficulty in adapting to “an increasingly polarised society First, collective anxiety has replaced individual material hardship as a central driver of political mobilisation. The rise of the AfD can no longer be explained simply by poverty or social marginalisation. Its increasingly cross-class electoral base suggests that what is driving voters towards the party is, above all, concern about the broader direction of society. This anxiety about the future of the political community goes beyond individual gains and losses. In political discourse, economic anxiety has become closely intertwined with immigration, while immigration and refugee issues are, in essence, questions of social fairness. This perception turns conflicts over the distribution of social resources into negative assessments of governing parties, providing a broad social basis for far-right political narratives. Second, regional disparities and East German identity have undermined the strategy of addressing eastern Germany’s structural challenges at the regional level. More than three decades after German reunification, eastern states such as Saxony-Anhalt have experienced periods of economic growth, but their underlying economic structures remain weak, and household incomes and wealth remain significantly below those in western Germany. At the same time, they continue to face population outflow, an ageing population, labour shortages, and other structural challenges. At a deeper level, historical experiences — including the collapse of the former East German economic system, mass unemployment during the transition, and the westward shift of decision-making power over major issues — have left some residents with a sense of being “second-class citizens” and of being excluded. For years, the German government treated the “syndrome” of reunification as a regional problem to be gradually addressed at the local level. That approach is becoming increasingly unsustainable, as regional development disparities emerge as a core structural factor shaping national politics. Third, the erosion of institutional trust is perhaps the most decisive factor. AfD supporters tend to distrust establishment institutions, including parliament, government, and the mainstream media. Their concerns about economic security, pensions, and social fairness are significantly greater than the social average. Increasingly, their support for the AfD reflects not an expectation that the existing system can be improved, but a search for an alternative to the current political order. Such a systemic deficit of trust will be extremely difficult for the traditional parties to repair in the short term. Fourth, a generational shift in political mobilisation has amplified political polarisation. Unlike traditional parties, which rely heavily on offline rallies and mainstream media coverage, the AfD has developed a social-media mobilisation strategy built around “raising an issue — identifying who is responsible — offering a simplified solution — building a shared identity”. It turns complex social tensions into concise political narratives, rapidly channelling public sentiment into political support. The contrast on the eve of the election was particularly telling. The establishment parties, together with trade unions and churches, organised an offline march attended by more than 10,000 people, but its reach was largely confined to those present and to traditional media coverage. The AfD held a much smaller indoor event, yet livestreaming on TikTok, YouTube, and other platforms, combined with the involvement of online influencers, gave it a reach and mobilising capacity far beyond that of the march. The contrast illustrates how the traditional parties’ methods of political mobilisation are increasingly struggling to keep pace with a political environment transformed by changes in media technology. A Microcosm of Structural Political Change in Europe The shockwaves from the Saxony-Anhalt election quickly travelled beyond the state to the federal level. Calls for political accountability followed immediately after the results were announced. The governing CDU and SPD are now under enormous pressure, while Chancellor Friedrich Merz and Vice Chancellor Lars Klingbeil face an unprecedented test. Political polarisation in Germany is no longer simply a regional phenomenon. The post-war model of multiparty government by establishment parties is breaking down and being reshaped. Viewed in a broader European context, the Saxony-Anhalt election is part of a continent-wide wave of party polarisation, mainstream-party decline, and rising right-wing forces. Far from an isolated phenomenon, it is a microcosm of the structural political changes unfolding across Europe. Weak economic growth, cultural tensions over immigration, and declining trust in institutions are fuelling the rise of right-wing forces in several countries, challenging the liberal internationalist order established in post-war Europe. As a core member state of the European Union, Germany’s ability to adapt its political system and the direction of its politics will have profound implications for both European integration and the evolution of the international order. Subscribe [ Pekingnology China’s Germany watchers take stock of Berlin’s uneasy turn On 7 December 2025, nearly 50 Chinese scholars and policy researchers gathered in Beijing for the 2025年德国形势年终研讨会 “2025 Year-End Seminar on the Situation in Germany… Read more 9 months ago · 31 likes · 1 comment · YIRUI LI and Yuxuan JIA ](https://www.pekingnology.com/p/chinas-germany-watchers-take-stock?utm_source=substack&utm_campaign=post_embed&utm_medium=web&embedding_publication_id=1151841) [ Jiang Feng on Germany's 2025 and beyond: no easy exit ](https://www.eastisread.com/p/jiang-feng-on-germanys-2025-and-beyond) Yirui LI and Yuxuan JIA · Jan 24 The following is an op-ed by Jiang Feng, published on 29 December 2025 at Shanghai Observer 上观新闻, the digital platform of Jiefang Daily, the official newspaper of the Shanghai Municipal Committee of the Communist Party of China (CPC). [ Read full story ](https://www.eastisread.com/p/jiang-feng-on-germanys-2025-and-beyond)
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In Good Health: The Evolution Of Prostate Cancer Treatment
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Can AI solve our mental health access problem?
Last week I asked you what worries you most about AI in health. It was close, but your top answer was “AI giving bad health advice.” Last week’s poll results: You’re in good company. This concern was top of mind at a conference I joined at Stanford last week, where researchers, clinicians, and people who build AI systems spent a day debating trust and safety in health AI. Stepping back, I’m also hearing your emerging concerns about AI’s impact on our well-being generally. I see this as a matter of public health, and we’ll take it in pieces as we learn together. Today we’ll focus on AI chatbots used for therapy for mental health. Early this month, Governor Newsom vetoed Senate Bill 903, California’s most ambitious attempt to regulate AI use for mental health. It’s at the center of active debate, and raises the questions patients, family members, citizens, and voters will face as AI moves deeper into health care. Let’s work through it. What is “AI-based therapy”? It’s really two things: purpose-built mental health apps designed to deliver structured support, and general chatbots like ChatGPT, Claude, and Gemini that people increasingly use for emotional support—even if they weren’t built for it. Spoiler alert: I don’t know whether the shift toward AI therapy is good or bad. The evidence isn’t there yet. But I do know it’s already happening, and I have some ideas about how we can roll it out with safety in mind. The therapy dilemma, in a nutshell Mental health challenges are common, and strain health and well-being across populations. Therapy (interactive dialogue with a trained, empathetic practitioner) helps many people heal. The demand for licensed therapists far exceeds the supply in California, and AI-based therapy can narrow that gap. AI-based therapy remains novel, unproven, and not well tested. Right off the bat, we can see we’re dealing with trade-offs here. Since the main driver of demand for therapy from a robot is lack of access to therapy from a human, we’ll start there. It’s too hard to find and afford a human therapist California is short roughly 55,000 licensed, non-prescribing therapists and counselors, about 40% of what we need. Psychiatrists, who rely on talk therapy as a complement to prescribed medications, are even more scarce. Eight counties have none, and density ranges from 1.7 per 100,000 residents in San Benito County, to 68.1 in Marin County. My wife is a psychiatrist in Marin, and even here access is tight. If it’s hard in the best-supplied county, imagine rural Sierra County, or the San Joaquin Valley. In 2024, more than half of Californians who tried to make a mental health appointment struggled to find a provider who took their insurance, compared with 14% for physical health care. When Senate staff posed as “secret shopper” patients and called 120 mental health providers in Medicare Advantage networks, they landed an appointment less than once for every five tries. Insurers pay behavioral health clinicians about 22% less than medical and surgical clinicians for comparable office visits. On top of that, billing denials and prior authorizations hit hardest at the solo and small practices common in mental health. Psychiatrists opt out of Medicare at the highest rate of any specialty. In many places, a cash practice for therapy fills quickly with patients paying $250 or more an hour, with no insurance paperwork at all. Families who can pay cash find providers more easily. Those who rely on insurance, including Medi-Cal enrollees, older adults, rural residents, and non-English speakers, compete for what’s left. So we can’t pretend the human system works, and we can’t blame people for turning to AI for support when they’re in distress. AI is filling the gap It’s estimated that roughly a quarter of AI users use it for mental health support. If you have internet, it’s available 24/7, it’s cheap, and it speaks your language. Uninsured adults are about twice as likely as insured adults to do it (30% vs. 14%). It feels anonymous in ways that may enable people to ask things they’re unsure or embarrassed about. The largely hidden, personal use makes it hard to study whether it’s actually helping people with their mental health issues, but researchers are trying. Does AI therapy work? A 2026 analysis of nearly 40 randomized trials found chatbots showed a real but small reduction in depression symptoms. But most of these trials were compared to an alternative of no therapy, not a human therapist. So the benefit of AI therapy is probably real, but modest, and mostly untested against the alternative of human contact. We need more studies. Serious concerns OpenAI’s own estimate is that more than a million ChatGPT users each week show signs of suicidal planning or intent. These are high stakes encounters, and AI doesn’t always get it right. That’s partly because a chatbot can sound like a therapist, but it has no license, no duty of care, and it’s not clear who to hold accountable when it gets things wrong. AI is also designed to help users in whatever task they’re seeking to accomplish. People may feel like they’re getting therapy, but they’re mainly getting a convincing conversation. It’s easy for an AI companion to wander into gray areas, like playing along with “creative writing” that may be about the user’s own suicidal intent. Courts are driving safety conversations A wave of lawsuits have been filed on behalf of families claiming that chatbots pushed people they loved toward self-harm, including teens who died by suicide. The first settlements came this year. OpenAI is headquartered in San Francisco, and dozens of cases alleging that ChatGPT drove users to suicide or self-harm are now before a San Francisco judge. Character.ai has filed for bankruptcy after several states brought lawsuits accusing the chatbot of pushing dangerous content to kids. But the technology seems to be improving. Last month, an independent evaluation found that newer AI models “almost never endorse suicide.” That’s progress, but our societal appetite for even one preventable death is very low. So how do we move forward? Finding a middle ground Earlier this month the governor vetoed Senate Bill 903, a bill designed to place guardrails on the use of AI for therapy. The bill would have prohibited any AI-based platform from being advertised as psychotherapy, and would have required a licensed professional to review and approve each encounter where AI was used to support therapeutic decisions. Newsom called it overly broad, since even routine screening questions would have needed clinician sign-off. Knowing we’re already short on mental health providers, requiring human review of AI encounters may not relieve our access problems. Still, the answer isn’t no oversight. Here’s one feasible short term solution. Rather than reviewing each encounter, a licensed clinician can design the guardrails: what counts as a crisis, what triggers an immediate handoff to a human, and what gets sampled for audit each month. The AI runs inside that structure. Conversations get checked, failures get reported, and a real clinician owns the framework. Medicine already has models to learn from. The FDA process for rolling out newly approved medications is an example. After a product reaches patients, we keep watching for adverse events. Patient-facing AI needs the same “digital pharmacovigilance”: systematic tracking of harms, near misses, and the types of groups that get hurt and why. It’s also critical that users know that they can reach a human if they’re in crisis. Most chatbots now include messages like these: Bottom line The rush to use unproven AI tools for mental health support is mostly a workaround, a sign of a health system people can’t get into. We need better access to proven care from licensed clinicians. That takes reimbursement that makes accepting insurance viable, and a bigger workforce. But, built and tested well, AI could be part of the answer. It could be the 2 a.m. check-in when no one else is awake, or a way for patients to practice skills their therapist taught them. It could be the first step to get someone the right level of care, and take paperwork off clinicians’ plates so they spend more time with patients. None of this is simple. The SB 903 veto doesn’t end the debate, and the legislature will be back. In the meantime, those of us using these tools need to stay informed, ask hard questions, and hold the companies building them accountable. I’ll try to do my part, and we’ll keep learning together. Love,Matt P.S. If you or someone you know is struggling with mental health challenges, emotional distress, substance use problems, or just needs to talk, call or text 988- you’ll reach a real person— or chat at 988lifeline.org 24/7. Dr. Matt Willis is the author of Your Local Epidemiologist in California. A California native, he’s served as a primary care physician, CDC epidemiologist, and public health officer for Marin County, where he guided the pandemic response. He lives in Marin with his family and their dogs, Teddy and Ramona. Thank you Cynthia He, MD, PhD, and Parnika Saxena, MD, for their guidance in preparing this article. Cynthia works in an outpatient mental health clinic, treating patients who have Medi-Cal or, sometimes, no insurance. Parnika works in an inpatient psychiatric unit, treating patients with public or private insurance or self-pay ability. All opinions are their own and do not represent their employers.
Gears of War: E-Day sells 230K copies
Gears of War: E-Day has sold 230K copies since its advance-access launch on October 1 and full release on October 6. Steam accounts for 168K of those, with Xbox (console and PC) selling 62K. But there’s more to this story, as Xbox makes up the bulk of revenue. E-Day is the best-reviewed Gears game in nearly two decades (and the best one ever made, in my opinion). The Coalition has made a banger here (it’s currently in my top 10 of the year). Despite E-Day’s undeniable quality, this is a soft result. And it’s down to the business model, really. E-Day has made $37M so far, thanks to the Premium upgrade On Xbox, Game Pass is cannibalising much of the premium revenue. Our estimates show that 1.7M folks accessed E-Day via their subscription rather than a copy. But Xbox is having it both ways – or having it halfway, at least – via its Premium Edition Game Pass upgrade. Game Pass subscribers could pay $30 (or their local equivalent) for up to five days of early access starting October 1. Our estimates show that of the 1.7M who accessed E-Day through Game Pass, 722K paid for the upgrade. Between the review embargo lifting on October 1 and the full release, E-Day managed to shift another 250K early-access upgrades – no doubt helped by the campaign’s rave reviews. So despite selling far fewer copies on Steam, Xbox accounts for almost three-quarters of the revenue (roughly $26M of the $37M, versus about $11M on Steam). So “230K copies” undersells the paying audience. Including the 722K upgrades, nearly 950K people actually paid something for E-Day. The $30 upgrade is a halfstep from cannibalisation, but will Xbox go all the way? While E-Day is a sublime game, these are soft numbers for a flagship when Xbox badly needs revenue wins. E-Day sold 62K copies on Xbox against 722K Premium upgrades, so for every one copy sold on Xbox, nearly 12 Game Pass upgrades were sold. The $70 premium SKU is – functionally – dead on Xbox. Normally you can’t see what a Game Pass player would have paid, because the game’s just there in the subscription. But the $30 early-access upgrade estimate shows that 722K people demonstrated they’ll spend real money on this game. In a world without day-one Game Pass, many of these folks would have bought E-Day at $70. They paid $30 for five days early access to something they don’t own. Xbox is, in effect, charging its most valuable customers the least, based on a hangover from a tried-and-exhausted strategy from a previous administration. Those 722K willing-to-pay players generated about $21.7M via the upgrade. If three quarters of this group – mostly US and European audiences – bought E-Day outright, that’s nearly $40M. Of course, Game Pass does bring in meaningful recurring revenue, and E-Day is adding value for hundreds of thousands of subscribers. However, Game Pass is no longer growing, so Xbox is at a crossroads. Xbox is reportedly looking to do a Netflix and bolt on an ad-supported tier to pad it further. But that will just set a new floor, and leadership keeps telling us the priority now is revenue growth, which is subscriber-speak for ARPU. Xbox has already pulled Call of Duty from day-one Game Pass after day-one inclusion hammered its sales, with new CoD titles now arriving on the service around a year late. We know that some Microsoft executives believe the service devalues games outright, and rumours (which Microsoft has dismissed so far, to be fair) suggest that day-one releases could be taken off Game Pass. Want more free estimates and insights in your inbox twice a week? Subscribe below! Subscribe When a game this well-reviewed does this softly on its home platform, the model – not the game – gets brought into question. What else E-Day’s early adopters have played (including this month so far) Looking at E-Day‘s players on Xbox, most have played the franchise before (86% have played Gears 5, 76% Gears 4), and every game on the crossover list is either a shooter or a title from an Xbox-owned studio (though Game Pass is inflating those numbers, of course, more on that later): As for what else Xbox’s E-Day players have played this month, the top three are Fortnite (16%), Roblox (7%), and Call of Duty (6%). Another 5% played Minecraft Dungeons II, which is also on Game Pass and launched a couple of days before Gears‘ advance-access date. Many Game Pass players are happy to check out most big new additions. Want more free estimates and insights in your inbox twice a week? Subscribe below! Subscribe Over on Steam, the top crossover games are also mostly shooters (slightly more PC-coded ones), including Space Marine 2, which was itself heavily inspired by Gears: Looking at what E-Day‘s Steam players are into this month shows who they are – as subscriptions don’t skew the data. The top three are Wardogs (13%), Deadlock (12%), and CS2 (10%), so you’ve got the restless shooter crowd checking out the new hotness. A little further down are Helldivers 2 and Space Marine 2, your co-op PVE shooter players who’ll feel right at home in Horde mode. Game Pass is skewing the playtime distribution on Xbox Looking at the playtime distribution in our platform, E-Day players on Steam are – relatively speaking – playing for longer: 54% of E-Day players on Xbox have played for five hours or less (versus 32% on Steam) 19% of Xbox players played for over 15 hours (versus 33% on Steam) 14% of Xbox players played for over 20 hours (22% on Steam) The absolute number of people playing for over 15, 20, and 50 hours is, of course, bigger on Xbox, thanks to the sheer volume of folks who came in through Game Pass (upgraders included). None of that is cause for alarm. Game Pass is the reason Xbox playtime skews lower, as when a game is free to try, people try it and bounce without putting in even an hour (17% under an hour on Xbox versus 6% on Steam). Want more free estimates and insights in your inbox twice a week? Subscribe below! Subscribe The subscription brings in tourists alongside the committed, dragging down the average even when the game is excellent (but also perhaps winning over the uninitiated). It’s standard across every subscription-included title, on PS Plus too. Forza Horizon 6, for instance, had 11% of its Xbox players bounce under an hour, versus just 2% on Steam. So, Xbox’s crossroads So there we have it. Gears of War: E-Day is an incredible game whose revenues have been stifled by subscription inclusion and exclusivity. It’s the best-reviewed entry in the series in fifteen-odd years, but it still turned into one of the year’s softer flagship launches, not because players didn’t want it, but because Xbox’s own storefront gave its most willing buyers a reason not to pay. Which leaves Xbox at a crossroads. Will it keep making Gears games when the financial returns are this thin and the margins this low? And if it does, does the next one arrive off Game Pass at day one – the way CoD now does, or even on PlayStation? I think it should. Alright, back to E-Day for me! The last word Reply to this email – or reach out here – if you have any feedback for the newsletter – or want to request a game for us to cover. [Alinea Analytics boasts the most accurate PC and console estimates in the business. Game makers use our platform to understand their audience, keep an eye on the competition, monitor sales trends, and spot new opportunities. We equip game studios and financial institutions with accurate data and the confidence to make smarter, data-driven decisions. Want to talk about all things games market data? We’d love to chat!]
Trump administration misspells United States twice while promoting AI
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Marlon James and Douglas Stuart have chance to become 5th multiple winner of Booker Prize book award
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Christian McCaffrey scores twice
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Trump administration misspells United States twice while promoting AI
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Apple Watch Series 10 vs. Series 12 Buyer's Guide: Should You Upgrade?
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Kings fall to Golden Knights in the Empire Classic
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Trump SBA to Extend Comment Period After Ranking Member Markey Leads Effort to Rescind SBA Policy that Reclassifies Billion-Dollar Businesses as “Small Businesses”
Trump admin policy would reclassify 114,000 larger businesses as “small” to access small business resources and win federal contracts meant for small businesses Letter (PDF) (Washington, September 23) – This week, the Small Business Administration (SBA) announced its plans to extend the deadline to submit comments on its controversial proposed rule regarding small business size standards until November 20. The Trump SBA’s announcement came shortly after Ranking Member Edward J. Markey (D-Mass.), alongside 12 of his Senate colleagues, sent a letter to Administrator Kelly Loeffler demanding that the Trump SBA rescind a harmful policy that would dramatically redefine what a small business is. The Administration’s proposed policy would change the small business size standard to designate 114,000 larger companies some with annual revenue above $1 billion—as small businesses, giving these businesses access to small business resources and federal contracts typically set aside for actual small businesses. In the letter, Ranking Member Markey and the lawmakers emphasized that small businesses will be shut out of the federal contracting space as government agencies award contracts to larger businesses, causing small businesses to lose revenue, lay off workers, or close their businesses entirely. “For more than 70 years, SBA’s mission has been clear: promote and protect the interests and viability of small businesses. By proceeding with this proposed methodology and rule, SBA moves further away from its mission of facilitating healthy small business participation in the U.S. economy. We urge SBA to rescind these proposals, meet in earnest with small businesses across the country, and discuss the proposal and methodology with congressional committees of jurisdiction. SBA must be committed to developing measured increases to the size standards that do not reward large, billion-dollar companies but instead helps our small businesses survive, grow, and thrive.” The lawmakers highlighted the following points in their letter: Under the Trump SBA’s new size standards, the highest receipts-based standard would exceed $1 billion in annual revenue—more than 20 times the current $47 million maximum—and the highest employee-based standard would reach 3,600 employees—more than twice the current 1,500 employee maximum. Specific increases include an increase in size of nearly 492% for banks, 1,500% for law firms, and more than 2,051% for private equity firms. Of the 114,000 businesses that would be newly classified as small, more than 37,000 of these businesses have collectively won more than 100,000 federal contracts worth approximately $71 billion in Fiscal Year 2025 alone without a small business designation. If SBA included the awards won by these 37,000 businesses in its Fiscal Year 2025 analysis, small business contracts would have accounted for 38% of all federal contracts, instead of the 27% that SBA announced this summer. The letter was co-signed by Senators Mazie Hirono (D-Hawaii), Angela Alsobrooks (D-Md.), Richard Blumenthal (D-Conn.), Christopher Coons (D-Dela.), Elissa Slotkin (D-Mich.), Chris Van Hollen (D-Md.), Jacky Rosen (D-Nev.), Elizabeth Warren (D-Mass.), Tim Kaine (D-Va.), Brian Schatz (D-Hawaii), Mark Warner (D-Va.), and Ruben Gallego (D-Ariz.). Ranking Member Markey is fighting to protect small businesses in Massachusetts and across the country from the Trump SBA’s harmful policies that put big businesses and billionaires over American small businesses, workers, and families. In August, Ranking Member Markey slammed the Trump SBA’s proposal to overhaul its small business size standards to benefit big businesses over small businesses. In July, Ranking Member Markey and House Small Business Committee Ranking Member Nydia M. Velázquez (D-NY-7) introduced a Congressional Review Act (CRA) resolution to rescind the Trump administration’s policy that bans green card holders from accessing essential Small Business Administration (SBA) loans to start and grow their businesses. Also in July, Ranking Member Markey and Senator Hirono submitted a comment letter to the Small Business Administration (SBA) opposing a proposed rule change by Trump’s SBA to the 8(a) Business Development Program that would harm underserved small business owners and entrepreneurs. In June, Ranking Member Markey released a new report highlighting Trump’s drastic reduction in federal contracting dollars awarded to American small businesses. ###
TWICE’s Jihyo Departs JYP Entertainment After 21 Years + Launches New Agency EMITHAUS
Jihyo is beginning a journey with a new company! On October 21, the TWICE member took to her Instagram to share the following handwritten letter: Hello, this is Jihyo. I’m writing today because there’s something I’d like to share with you. After 21 years, my journey with JYP Entertainment, which began when I was just a child, has come to an end. Trying to put 21 years into just a few words is harder than I thought it would be.From childhood through my teenage years and into adulthood, I’ve spent most of my life at JYP.There were good days and difficult ones, but one thing I know for certain is that every one of those moments has shaped who I am today.I want to express my sincere gratitude to everyone at JYP who has been by my side and helped me grow over the years.I will always cherish the time we shared and the memories we made together. To me, independence is not so much a conclusion about the time that has passed, but a choice about how I want to live going forward.As the first step in this new chapter, I have established my own company, EMITHAUS.Just as “EMIT” means to “express or release,” I hope this will be a place where I can freely explore and bring to life even the possibilities within me that I have yet to discover.As I step away from a familiar environment and begin working in new ways, I will approach every decision and every endeavor with even greater thoughtfulness and responsibility. I also want to make it clear that this decision does not mean saying goodbye to the team I’ve been part of for so long.TWICE is an irreplaceable part of my life.Just as I cherish all the years we’ve shared, I look forward to all the moments still ahead of us.I will continue to stand on stage with my members and keep building more memories together for many years to come. Above all, I want to thank ONCE for believing in me and standing by my side for the past 11 years.I know that watching someone grow and change through so many stages of life and continuing to support them along the way is never something to be taken for granted.Thank you for giving me the courage to keep moving forward through your unwavering trust, love, and support.I will continue to fill the years ahead with choices and efforts that stay true to who I am and keep growing as an artist who lives up to all the love and support you’ve given me. Thank you. https://www.instagram.com/p/DevZGTkmTD2/ Jihyo is the third TWICE member to officially leave JYP Entertainment following Jeongyeon and Chaeyoung. Wishing Jihyo all the best on her new start!
‘Those interactions won’t always happen through a screen’: Qualcomm
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Ebola outbreak update: Cases and deaths; Dungu health zone, Haut-Uélé province now affected
A total of 73 new confirmed cases of Ebola Virus Disease (EVD) were reported on September 18, 2026, including 25 community deaths. Of these confirmed cases, 46 were from Ituri province, 18 from North Kivu, 6 from Haut-Uélé, and 3 from Tshopo. A new health zone, Dungu, in Haut-Uélé province, was affected during the day. As this zone borders South Sudan, strengthening cross-border surveillance is necessary. During the day on September 18, 2026, 12 deaths within Ebola Treatment Centers (ETCs)—10 in Ituri and 2 in North Kivu—were unfortunately recorded, bringing the total number of deaths for the day to 37. However, 41 patients were declared recovered (30 in Ituri, 6 in Haut-Uélé, 3 in North Kivu, and 2 in Tshopo) after testing negative for EVD twice. Since the start of the epidemic in the Democratic Republic of the Congo (DRC), a cumulative total of 7,614 confirmed cases, including 3,676 deaths, has been recorded, representing a case fatality rate of 48.3%. The epicenter remains Ituri province, which accounts for 77.2% of the confirmed cases reported across the seven affected provinces and also accounts for 63.0% of the new confirmed cases. A new health zone was affected on September 18, 2026. Consequently, 63 out of 167 health zones (37.7%) across 7 provinces are affected. Subscribe to Outbreak News TV on YouTube Response measures feature 97% traveler screening at entry points, surveillance expansion to new area Dungu, and community outreach sensitizing over 110,000 people in one day. The Democratic Republic of the Congo’s health system faces deep, structural constraints that predate the current Ebola outbreak and make epidemic response far harder. These problems are most acute in rural areas and the conflict-affected east. Outbreak News Today is a reader-supported publication. To receive new posts and support my work, consider becoming a free or paid subscriber. Subscribe Eastern provinces have seen health facilities damaged, looted, or abandoned. Insecurity delays patients, blocks supply deliveries, and exposes staff to attacks. Millions of displaced people live in camps with poor water, sanitation, and health services, increasing outbreak risk. Vast distances and poor roads mean many people walk hours or days to reach care. These same weaknesses explain why Ebola has continued to spread into new, under-prepared health zones even as some original hotspots show improvement: surveillance, laboratory turnaround, contact tracing, and infection control remain thin outside the best-supported sites. The Ministry of Health and partners have scaled up treatment centres, laboratories, and vaccination in the current outbreak, and some digital surveillance systems (DHIS2) provide a useful backbone. However, the underlying gaps in staffing, basic infrastructure, reliable funding, and logistics have not been closed. Without sustained investment in those foundations, the system will remain vulnerable to both routine disease burden and the next large outbreak. If you like the reporting on Outbreak News Today, please consider a paid subscription for $5/month or $30 a year. Help support the cause of this niche journalism. It is appreciated.
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